#ifndef _AMT630HV160_RDC_H_
#define _AMT630HV160_RDC_H_

#ifdef __cplusplus
extern "C" {
#endif

#define RDC_DDR				((rdc_ddr_t *)REGS_RDC_DDR_BASE)
#define RDC_SRAM			((rdc_sram_t *)REGS_RDC_SRAM_BASE)

#define RDC_DDR_IRQ_CPU		(1<<4)  // 该中断产生时将触发CPU中断
#define RDC_DDR_IRQ_MCU		(1<<3)	// 该中断产生时将触发MCU中断
#define RDC_DDR_IRQ_CHBUS	(1<<2)  // 该中断产生时将触发CPU中断
#define RDC_DDR_IRQ_GBUS	(1<<1)  // 该中断产生时将触发CPU中断
#define RDC_DDR_IRQ_VBUS	(1<<0)  // 该中断产生时将触发CPU中断

#define RDC_SRAM_IRQ_MCU	(1<<1)	// 该中断产生时将触发MCU中断
#define RDC_SRAM_IRQ_OTHER	(1<<0)  // 该中断产生时将触发CPU中断

typedef enum{
	RDC_M_LCD = 0,
	RDC_M_ITU,
	RDC_M_MFC,
	RDC_M_GPU,
	RDC_M_QOI,
	RDC_M_BLEND,
	RDC_M_PXP,
	RDC_M_WRAP,
	RDC_M_DMA,
	RDC_M_USB,
	RDC_M_SD0,
	RDC_M_SD1,
	RDC_M_ETH,
	RDC_M_MCU,
	RDC_M_CPU,
}rdc_master_e;

typedef struct{
	__IO uint32_t	CTRL;
	__IO uint32_t	RESERVED_04[3];
	__IO uint32_t	BLK_MAX;
	__IO uint32_t	BLK_CFG;
	__IO uint32_t	BLK_IDX_ADDR;
	__IO uint32_t	BLK_LUT;
	__IO uint32_t	IRQ_STAT;
	__IO uint32_t	IRQ_CLEAR;
	__IO uint32_t	IRQ_ENABLE;
	__IO uint32_t	IRQ_INFO1_VBUS;
	__IO uint32_t	IRQ_INFO2_VBUS;
	__IO uint32_t	IRQ_INFO1_GBUS;
	__IO uint32_t	IRQ_INFO2_GBUS;
	__IO uint32_t	IRQ_INFO1_CHBUS;
	__IO uint32_t	IRQ_INFO2_CHBUS;
	__IO uint32_t	IRQ_INFO1_MCU;
	__IO uint32_t	IRQ_INFO2_MCU;
	__IO uint32_t	IRQ_INFO1_CPU;
	__IO uint32_t	IRQ_INFO2_CPU;
	__IO uint32_t	IRQ_SET;
	__IO uint32_t	LUT_MASTER_SEL;
}rdc_ddr_t;

typedef struct{
	__IO uint32_t	CTRL;
	__IO uint32_t	RESERVED_04[3];
	__IO uint32_t	BLK_MAX;
	__IO uint32_t	BLK_CFG;
	__IO uint32_t	RESERVED_10[1];
	__IO uint32_t	BLK_LUT;
	__IO uint32_t	IRQ_STAT;
	__IO uint32_t	IRQ_CLEAR;
	__IO uint32_t	IRQ_ENABLE;
	__IO uint32_t	IRQ_INFO1_OTHERS;
	__IO uint32_t	IRQ_INFO2_OTHERS;
	__IO uint32_t	RESERVED_34[4];
	__IO uint32_t	IRQ_INFO1_MCU;
	__IO uint32_t	IRQ_INFO2_MCU;
	__IO uint32_t	RESERVED2[2];
	__IO uint32_t	IRQ_SET;
	__IO uint32_t	LUT_MASTER_SEL;
}rdc_sram_t;

typedef struct {
	uint32_t violation_addr;
	uint32_t AxPROT:1;
	uint32_t ERR_MULTI:1;
	uint32_t ERR_BOTH:1;
	uint32_t WnR:1;
	uint16_t AxID;
}rdc_irq_info_t;


void rdc_init(void);


/*
 *@param:
 *	access:
 *		0: not allow access  1: allow access
 *@note:
 *	seg size = 1 MB.
 *  seg max = 512.
 */
int rdc_ddr_set_master_mem_range(rdc_ddr_t *rdc, rdc_master_e rdc_master,
									uint32_t seg_start, uint32_t seg_end, uint8_t access);

/*
 *@brief:
 *	start with seg_offset to find the first eligible region.
 *@param:
 *	access:
 *		0: not allow access  1: allow access
 *@note:
 *	seg size = 1 MB.
 *	seg max = 512.
 */
int rdc_ddr_get_master_mem_range(rdc_ddr_t *rdc, rdc_master_e rdc_master,
									uint32_t seg_offset,
									uint32_t *seg_start, uint32_t *seg_end, uint8_t access);

/*
 *@brief:
 *	获取master在某段上的访问权限。
 *@return:
 *	0: 不允许访问	1: 允许访问
 */
int rdc_ddr_get_master_mem_seg_access_sta(rdc_ddr_t *rdc,
									rdc_master_e rdc_master, uint32_t seg);


/*
 *@param
 *	access:
 *		0: not allow access  1: allow access
 *@note:
 *	seg size = 128 KB.
 *  seg max = 32.
 */
int rdc_sram_set_master_mem_range(rdc_sram_t *rdc, rdc_master_e rdc_master,
								uint32_t seg_start, uint32_t seg_end, uint8_t access);

/*
 *@brief:
 *	start with seg_offset to find the first eligible region.
 *@param:
 *	access:
 *		0: not allow access  1: allow access
 *@note:
 *	seg size = 128 KB.
 *	seg max = 32.
 */
int rdc_sram_get_master_mem_range(rdc_sram_t *rdc, rdc_master_e rdc_master,
									uint32_t seg_offset,
									uint32_t *seg_start, uint32_t *seg_end, uint8_t access);

/*
 *@brief:
 *	获取master在某段上的访问权限。
 *@return:
 *	0: 不允许访问	1: 允许访问
 */
int rdc_sram_get_master_mem_seg_access_sta(rdc_sram_t *rdc,
									rdc_master_e rdc_master, uint32_t seg);


#ifdef __cplusplus
}
#endif

#endif /* _AMT630HV160_RDC_H_ */