#include "FreeRTOS.h" #include "board.h" #include "chip.h" #if VIDEO_IN_FORMAT == VIN_AHD_720P_25 #define HSA 0x2e #define HBP 0x25 #define HSD 0x02 #define HLINE 0x555 #define VSA 0x06 #define VBP 0x09 #define VFP 0x06 #define VACT 0x2d0 #define LUN_NUM 4 #define CLK_DIV 0x11 //500/17=29M #endif #if VIDEO_IN_FORMAT == VIN_AHD_1080P_25 #define HSA 0x2c #define HBP 0x94 #define HSD 0x02 #define HLINE 0xA50 #define VSA 0x05 #define VBP 0x24 #define VFP 0x04 #define VACT 0x438 #define LUN_NUM 4 #define CLK_DIV 0x6 //500/6=83.3.4M #endif #if VIDEO_IN_FORMAT == VIN_CVBS_NTSC #define HSA 0x2e #define HBP 0x25 #define HSD 0x02 #define HLINE 0x350 #define VSA 0x06 #define VBP 0x09 #define VFP 0x06 #define VACT 0xf0 #define LUN_NUM 2 #define CLK_DIV 0x20 //500/32=15.6M #endif static void ApbWriteFun(unsigned int addr, unsigned int data) { * (volatile unsigned int *) addr = data; } static unsigned int ApbReadFun(unsigned int addr) { return (* (volatile unsigned int *) addr); } unsigned char csi_read_reg(unsigned int addr) { unsigned int rdata; unsigned int val; //read phy val = 0x10000 | addr; ApbWriteFun(0x51b00054, val); ApbWriteFun(0x51b00050, 0x2); ApbWriteFun(0x51b00050, 0x0); rdata = ApbReadFun(0x51b00054); rdata = (rdata >> 8)&0xFF; return rdata; } void csi_write_reg(unsigned int addr,unsigned int regval) { unsigned int val = 0; ApbWriteFun(0x51b00054, addr); val = 0x10000 | addr; ApbWriteFun(0x51b00054, val); ApbWriteFun(0x51b00050, 0x2); ApbWriteFun(0x51b00050, 0x0); ApbWriteFun(0x51b00054, regval); ApbWriteFun(0x51b00050, 0x2); ApbWriteFun(0x51b00050, 0x0); } void csi_init(void) { //reset csi unsigned int regval = 0; regval = ApbReadFun(0x50000188); regval &=~(3<<5 | 1<<1 ); ApbWriteFun(0x50000188,regval); udelay(20); regval |=(3<<5 | 1<<1); ApbWriteFun(0x50000188,regval); udelay(20); ApbWriteFun(0x500000a0,0x0000101c); //CSI_MIPI_EN = 0 // gpu clk 500M ApbWriteFun(0x50000198,(CLK_DIV-1)); //==================== host phy cfg=========================// ApbWriteFun(0x51b00040,0x00000000); //power down phy ApbWriteFun(0x51b00044,0x00000000); //reset phy ApbWriteFun(0x51b00040,0x00000001); //power down phy ApbWriteFun(0x51b00044,0x00000001); //reset phy //csi phy reset delay 5ms vTaskDelay(pdMS_TO_TICKS(5)); regval = 0xff; csi_write_reg(0x34,regval); csi_write_reg(0x34,0x01); csi_write_reg(0x44,regval); csi_write_reg(0x44,0x11); //600M csi_write_reg(0x54,regval); csi_write_reg(0x54,0x01); csi_write_reg(0x84,regval); csi_write_reg(0x84,0x01); csi_write_reg(0x94,regval); //================mipi host=================// if(LUN_NUM == 4) ApbWriteFun(0x51b00004,0x00000003); //4 CHANAEL else if(LUN_NUM == 2) ApbWriteFun(0x51b00004,0x00000001); //2 CHANAEL ApbWriteFun(0x51b00080,0x00000000); //ipi mode: 0: camera timing; 1: controller timing ApbWriteFun(0x51b00088,0x0000001e); //data type //config csi timing ApbWriteFun(0x51b00090,HSA); //hsa ApbWriteFun(0x51b00094,HBP); //hbp ApbWriteFun(0x51b00098,HSD); //hsd ApbWriteFun(0x51b0009c,HLINE); //hline ApbWriteFun(0x51b000b0,VSA); //vsa ApbWriteFun(0x51b000b4,VBP); //vbp ApbWriteFun(0x51b000b8,VFP); //vfp ApbWriteFun(0x51b000bc,VACT); //vact ApbWriteFun(0x51b00008,0x00000001); //csi2_resetn active low //================mipi recover=================// ApbWriteFun(0x50000190,0x00000002); //mipi_ctl_reg[15:0] -> {bist_mode, hsync_mode, de_inv, hsync_inv, vsync_inv, data_type[1:0]} ApbWriteFun(0x5000019c,HLINE); //csi_cfg1_reg[14:0] -> {csi_total_pix} regval = (VACT + VSA + VBP)<<16 | VACT; ApbWriteFun(0x500001a0,regval); //csi_cfg2_reg -> {de_last_line[30:16], csi_act_line[14:0]} ApbWriteFun(0x500001a4,0x02e00010); //csi_cfg3_reg -> {de_h_fall[30:16],de_h_rise[14:0]} ApbWriteFun(0x500001a8,0x00300002); //csi_cfg4_reg -> {hsync_h_fall[30:16],hsync_h_rise[14:0]} //3.3V ApbWriteFun(0x500000a0,0x0000101d); //CSI_MIPI_EN = 1 vTaskDelay(pdMS_TO_TICKS(500)); printf(">>>>>>>>>csi init over!!!!\n"); }