amt630hv160-sdk-release/amt630hv160-freertos-beta/ArkmicroFiles/libcpu-amt630hv160/include/amt630hv160.h

#ifndef __AMT630HV160__H
#define __AMT630HV160__H

#ifdef __cplusplus
 extern "C" {
#endif

#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#include <stdint.h>
#ifdef __cplusplus
  #define __I  volatile       /**< Defines 'read-only'  permissions */
#else
  #define __I  volatile const /**< Defines 'read-only'  permissions */
#endif
#define   __O  volatile       /**< Defines 'write-only' permissions */
#define   __IO volatile       /**< Defines 'read/write' permissions */
#endif

#include "os_adapt.h"

typedef enum IRQn
{
  LCD_IRQn				=  (32+0),
  MFC_IRQn				=  (32+1),
  GPU_IRQn				=  (32+2),
  USB_IRQn				=  (32+3),
  PXP_IRQn				=  (32+4),
  DMA_IRQn				=  (32+5),
  SDMMC0_IRQn			=  (32+6),
  SDMMC1_IRQn			=  (32+7),
  BLEND2D_IRQn			=  (32+8),
  QOI_IRQn				=  (32+9),
  ETH_IRQn				=  (32+10),
  WRAP_IRQn				=  (32+11),
  RDC_DDR_IRQn			=  (32+12),
  RDC_SRAM_IRQn			=  (32+13),
  SEMA_IRQn				=  (32+15),

  SPI0_IRQn				=  (32+16),
  SPI2_IRQn				=  (32+17),
  I2C0_IRQn				=  (32+18),
  I2C1_IRQn				=  (32+19),
  UART0_IRQn			=  (32+20),
  UART1_IRQn			=  (32+21),
  UART2_IRQn			=  (32+22),
  UART3_IRQn			=  (32+23),
  GPIOA_IRQn			=  (32+24),
  GPIOB_IRQn			=  (32+25),
  GPIOC_IRQn			=  (32+26),
  GPIOD_IRQn			=  (32+27),
  TIMER0_IRQn			=  (32+28),
  TIMER1_IRQn			=  (32+29),
  TIMER2_IRQn			=  (32+30),
  I2S1_IRQn				=  (32+31),
  ITU_IRQn				=  (32+32),
  WDT_IRQn				=  (32+33),
  I2S_IRQn				=  (32+34),
  RTC_ALM_IRQn			=  (32+35),
  RTC_PRD_IRQn			=  (32+36),
  ADC_IRQn				=  (32+37),
  PWM_IRQn				=  (32+38),
  TIMER3_IRQn			=  (32+39),
  RCRT_IRQn				=  (32+40),
  DDRCTL_INT_N_IRQn		=  (32+41),
  SPI1_IRQn				=  (32+42),
  CSI_IRQn				=  (32+43),
  ADC1_IRQn				=  (32+44),
  ADC2_IRQn				=  (32+45),
  GPIOE_IRQn			=  (32+46),
  MAILBOX_IRQn			=  (32+48),


  MAX_IRQ_NUM, 			 			/**< Number of peripheral IDs */
} IRQn_Type;

/*@}*/

/* ************************************************************************** */
/*   BASE ADDRESS DEFINITIONS FOR AMT630HV160 */
/* ************************************************************************** */
/** \addtogroup AMT630HV160_base Peripheral Base Address Definitions */
/*@{*/

#define REGS_USB_BASE		(0x40000000U)
#define REGS_SDMMC0_BASE	(0x40100000U)
#define REGS_DMAC_BASE		(0x40200000U)
#define REGS_LCD_BASE		(0x40300000U)
#define REGS_SDMMC1_BASE	(0x40400000U)
#define REGS_GPU_BASE		(0x40500000U)
#define REGS_PXP_BASE		(0x40600000U)
#define REGS_MFC_BASE		(0X40700000U)
#define REGS_ITU_BASE		(0x40800000U)
#define REGS_QOI_BASE		(0x40900000U)
#define REGS_BLEND2D_BASE	(0x40a00000U)
#define REGS_ETH_BASE		(0x40b00000U)
#define REGS_WRAP_BASE		(0x40c00000U)
#define REGS_SPI0_BASE 		(0x40d00000U)
#define REGS_SPI2_BASE 		(0x40d80000U)
#define REGS_CRC_BASE 		(0x40e00000U)
#define REGS_MAILBOX_BASE 	(0x40e80000U)
#define REGS_SEMA_BASE 		(0x40f00000U)

#define REGS_SYSCTL_BASE	(0x50000000U)
#define REGS_SPI1_BASE		(0x50200000U)
#define REGS_IIC0_BASE		(0x50300000U)
#define REGS_IIC1_BASE		(0x50400000U)
#define REGS_UART0_BASE		(0x50500000U)
#define REGS_UART1_BASE		(0X50600000U)
#define REGS_UART2_BASE		(0X50700000U)
#define REGS_UART3_BASE		(0X50800000U)
#define REGS_GPIO_BASE		(0x50900000U)
#define REGS_TIMER_BASE		(0x50a00000U)
#define REGS_PWM_BASE		(0x50b00000U)
#define REGS_WDT_BASE		(0x50C00000U)
#define REGS_I2S_BASE		(0x50d00000U)
#define REGS_I2S1_BASE		(0x50f00000U)

#define REGS_RTC_BASE		(0x51000000U)
#define REGS_ADC_BASE		(0x51100000U)
#define REGS_ADC1_BASE		(0x51200000U)
#define REGS_ADC2_BASE		(0x51300000U)
#define REGS_DDRCTL_BASE	(0x51400000U)
#define REGS_DDRPHY_BASE	(0x51500000U)
#define REGS_VBUS_BASE		(0X51600000U)
#define REGS_GBUS_BASE		(0X51700000U)
#define REGS_CHBUS_BASE		(0X51800000U)
#define REGS_CABUS_BASE		(0X51900000U)
#define REGS_DSI_BASE		(0x51A00000U)
#define REGS_CSI_BASE		(0x51B00000U)
#define REGS_RCRT_BASE		(0x51c00000U)
#define REGS_RDC_DDR_BASE	(0X51d00000U)
#define REGS_RDC_SRAM_BASE	(0X51e00000U)
#define REGS_GIC_BASE		(0xE0B00000U)


/* ************************************************************************** */
/*   ELECTRICAL DEFINITIONS FOR AMT630HV100 */
/* ************************************************************************** */

#ifdef __cplusplus
}
#endif

/*@}*/

#endif /* __AMT630HV160__H */