修复某处DDR配置错误，实际效果和修改前一致

u-boot/arch/arm/mach-arkmicro/ddr_ark1668ed.c

@@ -695,7 +695,7 @@ restart:
 
 		| (((tRRD + 1) / 2) << 8)			//11:8  t_rrd, Minimum time between activates from bank "a" to bank "b"
 
-		| (2 << 22)					//19:16 t_ccd, is the minimum time between two reads or two writes.
+		| (2 << 16)					//19:16 t_ccd, is the minimum time between two reads or two writes.
 
 		| (((tRCD + 1) / 2) << 24)		//28:24 t_rcd, Indicates the minimum time from activate to read or write command to same bank.
 		;