introduction.rst 4.8 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. ============
  3. Introduction
  4. ============
  5. The Linux compute accelerators subsystem is designed to expose compute
  6. accelerators in a common way to user-space and provide a common set of
  7. functionality.
  8. These devices can be either stand-alone ASICs or IP blocks inside an SoC/GPU.
  9. Although these devices are typically designed to accelerate
  10. Machine-Learning (ML) and/or Deep-Learning (DL) computations, the accel layer
  11. is not limited to handling these types of accelerators.
  12. Typically, a compute accelerator will belong to one of the following
  13. categories:
  14. - Edge AI - doing inference at an edge device. It can be an embedded ASIC/FPGA,
  15. or an IP inside a SoC (e.g. laptop web camera). These devices
  16. are typically configured using registers and can work with or without DMA.
  17. - Inference data-center - single/multi user devices in a large server. This
  18. type of device can be stand-alone or an IP inside a SoC or a GPU. It will
  19. have on-board DRAM (to hold the DL topology), DMA engines and
  20. command submission queues (either kernel or user-space queues).
  21. It might also have an MMU to manage multiple users and might also enable
  22. virtualization (SR-IOV) to support multiple VMs on the same device. In
  23. addition, these devices will usually have some tools, such as profiler and
  24. debugger.
  25. - Training data-center - Similar to Inference data-center cards, but typically
  26. have more computational power and memory b/w (e.g. HBM) and will likely have
  27. a method of scaling-up/out, i.e. connecting to other training cards inside
  28. the server or in other servers, respectively.
  29. All these devices typically have different runtime user-space software stacks,
  30. that are tailored-made to their h/w. In addition, they will also probably
  31. include a compiler to generate programs to their custom-made computational
  32. engines. Typically, the common layer in user-space will be the DL frameworks,
  33. such as PyTorch and TensorFlow.
  34. Sharing code with DRM
  35. =====================
  36. Because this type of devices can be an IP inside GPUs or have similar
  37. characteristics as those of GPUs, the accel subsystem will use the
  38. DRM subsystem's code and functionality. i.e. the accel core code will
  39. be part of the DRM subsystem and an accel device will be a new type of DRM
  40. device.
  41. This will allow us to leverage the extensive DRM code-base and
  42. collaborate with DRM developers that have experience with this type of
  43. devices. In addition, new features that will be added for the accelerator
  44. drivers can be of use to GPU drivers as well.
  45. Differentiation from GPUs
  46. =========================
  47. Because we want to prevent the extensive user-space graphic software stack
  48. from trying to use an accelerator as a GPU, the compute accelerators will be
  49. differentiated from GPUs by using a new major number and new device char files.
  50. Furthermore, the drivers will be located in a separate place in the kernel
  51. tree - drivers/accel/.
  52. The accelerator devices will be exposed to the user space with the dedicated
  53. 261 major number and will have the following convention:
  54. - device char files - /dev/accel/accel\*
  55. - sysfs - /sys/class/accel/accel\*/
  56. - debugfs - /sys/kernel/debug/accel/\*/
  57. Getting Started
  58. ===============
  59. First, read the DRM documentation at Documentation/gpu/index.rst.
  60. Not only it will explain how to write a new DRM driver but it will also
  61. contain all the information on how to contribute, the Code Of Conduct and
  62. what is the coding style/documentation. All of that is the same for the
  63. accel subsystem.
  64. Second, make sure the kernel is configured with CONFIG_DRM_ACCEL.
  65. To expose your device as an accelerator, two changes are needed to
  66. be done in your driver (as opposed to a standard DRM driver):
  67. - Add the DRIVER_COMPUTE_ACCEL feature flag in your drm_driver's
  68. driver_features field. It is important to note that this driver feature is
  69. mutually exclusive with DRIVER_RENDER and DRIVER_MODESET. Devices that want
  70. to expose both graphics and compute device char files should be handled by
  71. two drivers that are connected using the auxiliary bus framework.
  72. - Change the open callback in your driver fops structure to accel_open().
  73. Alternatively, your driver can use DEFINE_DRM_ACCEL_FOPS macro to easily
  74. set the correct function operations pointers structure.
  75. External References
  76. ===================
  77. email threads
  78. -------------
  79. * `Initial discussion on the New subsystem for acceleration devices <https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/>`_ - Oded Gabbay (2022)
  80. * `patch-set to add the new subsystem <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>`_ - Oded Gabbay (2022)
  81. Conference talks
  82. ----------------
  83. * `LPC 2022 Accelerators BOF outcomes summary <https://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html>`_ - Dave Airlie (2022)