this_cpu_ops.rst 11 KB

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  1. ===================
  2. this_cpu operations
  3. ===================
  4. :Author: Christoph Lameter, August 4th, 2014
  5. :Author: Pranith Kumar, Aug 2nd, 2014
  6. this_cpu operations are a way of optimizing access to per cpu
  7. variables associated with the *currently* executing processor. This is
  8. done through the use of segment registers (or a dedicated register where
  9. the cpu permanently stored the beginning of the per cpu area for a
  10. specific processor).
  11. this_cpu operations add a per cpu variable offset to the processor
  12. specific per cpu base and encode that operation in the instruction
  13. operating on the per cpu variable.
  14. This means that there are no atomicity issues between the calculation of
  15. the offset and the operation on the data. Therefore it is not
  16. necessary to disable preemption or interrupts to ensure that the
  17. processor is not changed between the calculation of the address and
  18. the operation on the data.
  19. Read-modify-write operations are of particular interest. Frequently
  20. processors have special lower latency instructions that can operate
  21. without the typical synchronization overhead, but still provide some
  22. sort of relaxed atomicity guarantees. The x86, for example, can execute
  23. RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
  24. lock prefix and the associated latency penalty.
  25. Access to the variable without the lock prefix is not synchronized but
  26. synchronization is not necessary since we are dealing with per cpu
  27. data specific to the currently executing processor. Only the current
  28. processor should be accessing that variable and therefore there are no
  29. concurrency issues with other processors in the system.
  30. Please note that accesses by remote processors to a per cpu area are
  31. exceptional situations and may impact performance and/or correctness
  32. (remote write operations) of local RMW operations via this_cpu_*.
  33. The main use of the this_cpu operations has been to optimize counter
  34. operations.
  35. The following this_cpu() operations with implied preemption protection
  36. are defined. These operations can be used without worrying about
  37. preemption and interrupts::
  38. this_cpu_read(pcp)
  39. this_cpu_write(pcp, val)
  40. this_cpu_add(pcp, val)
  41. this_cpu_and(pcp, val)
  42. this_cpu_or(pcp, val)
  43. this_cpu_add_return(pcp, val)
  44. this_cpu_xchg(pcp, nval)
  45. this_cpu_cmpxchg(pcp, oval, nval)
  46. this_cpu_sub(pcp, val)
  47. this_cpu_inc(pcp)
  48. this_cpu_dec(pcp)
  49. this_cpu_sub_return(pcp, val)
  50. this_cpu_inc_return(pcp)
  51. this_cpu_dec_return(pcp)
  52. Inner working of this_cpu operations
  53. ------------------------------------
  54. On x86 the fs: or the gs: segment registers contain the base of the
  55. per cpu area. It is then possible to simply use the segment override
  56. to relocate a per cpu relative address to the proper per cpu area for
  57. the processor. So the relocation to the per cpu base is encoded in the
  58. instruction via a segment register prefix.
  59. For example::
  60. DEFINE_PER_CPU(int, x);
  61. int z;
  62. z = this_cpu_read(x);
  63. results in a single instruction::
  64. mov ax, gs:[x]
  65. instead of a sequence of calculation of the address and then a fetch
  66. from that address which occurs with the per cpu operations. Before
  67. this_cpu_ops such sequence also required preempt disable/enable to
  68. prevent the kernel from moving the thread to a different processor
  69. while the calculation is performed.
  70. Consider the following this_cpu operation::
  71. this_cpu_inc(x)
  72. The above results in the following single instruction (no lock prefix!)::
  73. inc gs:[x]
  74. instead of the following operations required if there is no segment
  75. register::
  76. int *y;
  77. int cpu;
  78. cpu = get_cpu();
  79. y = per_cpu_ptr(&x, cpu);
  80. (*y)++;
  81. put_cpu();
  82. Note that these operations can only be used on per cpu data that is
  83. reserved for a specific processor. Without disabling preemption in the
  84. surrounding code this_cpu_inc() will only guarantee that one of the
  85. per cpu counters is correctly incremented. However, there is no
  86. guarantee that the OS will not move the process directly before or
  87. after the this_cpu instruction is executed. In general this means that
  88. the value of the individual counters for each processor are
  89. meaningless. The sum of all the per cpu counters is the only value
  90. that is of interest.
  91. Per cpu variables are used for performance reasons. Bouncing cache
  92. lines can be avoided if multiple processors concurrently go through
  93. the same code paths. Since each processor has its own per cpu
  94. variables no concurrent cache line updates take place. The price that
  95. has to be paid for this optimization is the need to add up the per cpu
  96. counters when the value of a counter is needed.
  97. Special operations
  98. ------------------
  99. ::
  100. y = this_cpu_ptr(&x)
  101. Takes the offset of a per cpu variable (&x !) and returns the address
  102. of the per cpu variable that belongs to the currently executing
  103. processor. this_cpu_ptr avoids multiple steps that the common
  104. get_cpu/put_cpu sequence requires. No processor number is
  105. available. Instead, the offset of the local per cpu area is simply
  106. added to the per cpu offset.
  107. Note that this operation is usually used in a code segment when
  108. preemption has been disabled. The pointer is then used to
  109. access local per cpu data in a critical section. When preemption
  110. is re-enabled this pointer is usually no longer useful since it may
  111. no longer point to per cpu data of the current processor.
  112. Per cpu variables and offsets
  113. -----------------------------
  114. Per cpu variables have *offsets* to the beginning of the per cpu
  115. area. They do not have addresses although they look like that in the
  116. code. Offsets cannot be directly dereferenced. The offset must be
  117. added to a base pointer of a per cpu area of a processor in order to
  118. form a valid address.
  119. Therefore the use of x or &x outside of the context of per cpu
  120. operations is invalid and will generally be treated like a NULL
  121. pointer dereference.
  122. ::
  123. DEFINE_PER_CPU(int, x);
  124. In the context of per cpu operations the above implies that x is a per
  125. cpu variable. Most this_cpu operations take a cpu variable.
  126. ::
  127. int __percpu *p = &x;
  128. &x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
  129. takes the offset of a per cpu variable which makes this look a bit
  130. strange.
  131. Operations on a field of a per cpu structure
  132. --------------------------------------------
  133. Let's say we have a percpu structure::
  134. struct s {
  135. int n,m;
  136. };
  137. DEFINE_PER_CPU(struct s, p);
  138. Operations on these fields are straightforward::
  139. this_cpu_inc(p.m)
  140. z = this_cpu_cmpxchg(p.m, 0, 1);
  141. If we have an offset to struct s::
  142. struct s __percpu *ps = &p;
  143. this_cpu_dec(ps->m);
  144. z = this_cpu_inc_return(ps->n);
  145. The calculation of the pointer may require the use of this_cpu_ptr()
  146. if we do not make use of this_cpu ops later to manipulate fields::
  147. struct s *pp;
  148. pp = this_cpu_ptr(&p);
  149. pp->m--;
  150. z = pp->n++;
  151. Variants of this_cpu ops
  152. ------------------------
  153. this_cpu ops are interrupt safe. Some architectures do not support
  154. these per cpu local operations. In that case the operation must be
  155. replaced by code that disables interrupts, then does the operations
  156. that are guaranteed to be atomic and then re-enable interrupts. Doing
  157. so is expensive. If there are other reasons why the scheduler cannot
  158. change the processor we are executing on then there is no reason to
  159. disable interrupts. For that purpose the following __this_cpu operations
  160. are provided.
  161. These operations have no guarantee against concurrent interrupts or
  162. preemption. If a per cpu variable is not used in an interrupt context
  163. and the scheduler cannot preempt, then they are safe. If any interrupts
  164. still occur while an operation is in progress and if the interrupt too
  165. modifies the variable, then RMW actions can not be guaranteed to be
  166. safe::
  167. __this_cpu_read(pcp)
  168. __this_cpu_write(pcp, val)
  169. __this_cpu_add(pcp, val)
  170. __this_cpu_and(pcp, val)
  171. __this_cpu_or(pcp, val)
  172. __this_cpu_add_return(pcp, val)
  173. __this_cpu_xchg(pcp, nval)
  174. __this_cpu_cmpxchg(pcp, oval, nval)
  175. __this_cpu_sub(pcp, val)
  176. __this_cpu_inc(pcp)
  177. __this_cpu_dec(pcp)
  178. __this_cpu_sub_return(pcp, val)
  179. __this_cpu_inc_return(pcp)
  180. __this_cpu_dec_return(pcp)
  181. Will increment x and will not fall-back to code that disables
  182. interrupts on platforms that cannot accomplish atomicity through
  183. address relocation and a Read-Modify-Write operation in the same
  184. instruction.
  185. &this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)
  186. --------------------------------------------
  187. The first operation takes the offset and forms an address and then
  188. adds the offset of the n field. This may result in two add
  189. instructions emitted by the compiler.
  190. The second one first adds the two offsets and then does the
  191. relocation. IMHO the second form looks cleaner and has an easier time
  192. with (). The second form also is consistent with the way
  193. this_cpu_read() and friends are used.
  194. Remote access to per cpu data
  195. ------------------------------
  196. Per cpu data structures are designed to be used by one cpu exclusively.
  197. If you use the variables as intended, this_cpu_ops() are guaranteed to
  198. be "atomic" as no other CPU has access to these data structures.
  199. There are special cases where you might need to access per cpu data
  200. structures remotely. It is usually safe to do a remote read access
  201. and that is frequently done to summarize counters. Remote write access
  202. something which could be problematic because this_cpu ops do not
  203. have lock semantics. A remote write may interfere with a this_cpu
  204. RMW operation.
  205. Remote write accesses to percpu data structures are highly discouraged
  206. unless absolutely necessary. Please consider using an IPI to wake up
  207. the remote CPU and perform the update to its per cpu area.
  208. To access per-cpu data structure remotely, typically the per_cpu_ptr()
  209. function is used::
  210. DEFINE_PER_CPU(struct data, datap);
  211. struct data *p = per_cpu_ptr(&datap, cpu);
  212. This makes it explicit that we are getting ready to access a percpu
  213. area remotely.
  214. You can also do the following to convert the datap offset to an address::
  215. struct data *p = this_cpu_ptr(&datap);
  216. but, passing of pointers calculated via this_cpu_ptr to other cpus is
  217. unusual and should be avoided.
  218. Remote access are typically only for reading the status of another cpus
  219. per cpu data. Write accesses can cause unique problems due to the
  220. relaxed synchronization requirements for this_cpu operations.
  221. One example that illustrates some concerns with write operations is
  222. the following scenario that occurs because two per cpu variables
  223. share a cache-line but the relaxed synchronization is applied to
  224. only one process updating the cache-line.
  225. Consider the following example::
  226. struct test {
  227. atomic_t a;
  228. int b;
  229. };
  230. DEFINE_PER_CPU(struct test, onecacheline);
  231. There is some concern about what would happen if the field 'a' is updated
  232. remotely from one processor and the local processor would use this_cpu ops
  233. to update field b. Care should be taken that such simultaneous accesses to
  234. data within the same cache line are avoided. Also costly synchronization
  235. may be necessary. IPIs are generally recommended in such scenarios instead
  236. of a remote write to the per cpu area of another processor.
  237. Even in cases where the remote writes are rare, please bear in
  238. mind that a remote write will evict the cache line from the processor
  239. that most likely will access it. If the processor wakes up and finds a
  240. missing local cache line of a per cpu area, its performance and hence
  241. the wake up times will be affected.