brcm,bcm2835-dsi0.yaml 1.7 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/brcm,bcm2835-dsi0.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Broadcom VC4 (VideoCore4) DSI Controller
  7. maintainers:
  8. - Eric Anholt <eric@anholt.net>
  9. allOf:
  10. - $ref: dsi-controller.yaml#
  11. properties:
  12. "#clock-cells":
  13. const: 1
  14. compatible:
  15. enum:
  16. - brcm,bcm2711-dsi1
  17. - brcm,bcm2835-dsi0
  18. - brcm,bcm2835-dsi1
  19. reg:
  20. maxItems: 1
  21. clocks:
  22. items:
  23. - description: The DSI PLL clock feeding the DSI analog PHY
  24. - description: The DSI ESC clock
  25. - description: The DSI pixel clock
  26. clock-names:
  27. items:
  28. - const: phy
  29. - const: escape
  30. - const: pixel
  31. clock-output-names: true
  32. # FIXME: The meta-schemas don't seem to allow it for now
  33. # items:
  34. # - description: The DSI byte clock for the PHY
  35. # - description: The DSI DDR2 clock
  36. # - description: The DSI DDR clock
  37. interrupts:
  38. maxItems: 1
  39. power-domains:
  40. maxItems: 1
  41. required:
  42. - "#clock-cells"
  43. - compatible
  44. - reg
  45. - clocks
  46. - clock-names
  47. - clock-output-names
  48. - interrupts
  49. unevaluatedProperties: false
  50. examples:
  51. - |
  52. #include <dt-bindings/clock/bcm2835.h>
  53. dsi1: dsi@7e700000 {
  54. compatible = "brcm,bcm2835-dsi1";
  55. reg = <0x7e700000 0x8c>;
  56. interrupts = <2 12>;
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59. #clock-cells = <1>;
  60. clocks = <&clocks BCM2835_PLLD_DSI1>,
  61. <&clocks BCM2835_CLOCK_DSI1E>,
  62. <&clocks BCM2835_CLOCK_DSI1P>;
  63. clock-names = "phy", "escape", "pixel";
  64. clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";
  65. };
  66. ...