cdns,mhdp8546.yaml 3.7 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Cadence MHDP8546 bridge
  7. maintainers:
  8. - Swapnil Jakhade <sjakhade@cadence.com>
  9. - Yuti Amonkar <yamonkar@cadence.com>
  10. properties:
  11. compatible:
  12. enum:
  13. - cdns,mhdp8546
  14. - ti,j721e-mhdp8546
  15. reg:
  16. minItems: 1
  17. items:
  18. - description:
  19. Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
  20. The AUX and PMA registers are not part of this range, they are instead
  21. included in the associated PHY.
  22. - description:
  23. Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
  24. - description:
  25. Register block of mhdptx sapb registers.
  26. reg-names:
  27. minItems: 1
  28. items:
  29. - const: mhdptx
  30. - const: j721e-intg
  31. - const: mhdptx-sapb
  32. clocks:
  33. maxItems: 1
  34. description:
  35. DP bridge clock, used by the IP to know how to translate a number of
  36. clock cycles into a time (which is used to comply with DP standard timings
  37. and delays).
  38. phys:
  39. maxItems: 1
  40. description:
  41. phandle to the DisplayPort PHY.
  42. phy-names:
  43. items:
  44. - const: dpphy
  45. power-domains:
  46. maxItems: 1
  47. interrupts:
  48. maxItems: 1
  49. ports:
  50. $ref: /schemas/graph.yaml#/properties/ports
  51. properties:
  52. port@0:
  53. $ref: /schemas/graph.yaml#/properties/port
  54. description:
  55. First input port representing the DP bridge input.
  56. port@1:
  57. $ref: /schemas/graph.yaml#/properties/port
  58. description:
  59. Second input port representing the DP bridge input.
  60. port@2:
  61. $ref: /schemas/graph.yaml#/properties/port
  62. description:
  63. Third input port representing the DP bridge input.
  64. port@3:
  65. $ref: /schemas/graph.yaml#/properties/port
  66. description:
  67. Fourth input port representing the DP bridge input.
  68. port@4:
  69. $ref: /schemas/graph.yaml#/properties/port
  70. description:
  71. Output port representing the DP bridge output.
  72. required:
  73. - port@0
  74. - port@4
  75. allOf:
  76. - if:
  77. properties:
  78. compatible:
  79. contains:
  80. const: ti,j721e-mhdp8546
  81. then:
  82. properties:
  83. reg:
  84. minItems: 2
  85. maxItems: 3
  86. reg-names:
  87. minItems: 2
  88. maxItems: 3
  89. else:
  90. properties:
  91. reg:
  92. minItems: 1
  93. maxItems: 2
  94. reg-names:
  95. minItems: 1
  96. maxItems: 2
  97. required:
  98. - compatible
  99. - clocks
  100. - reg
  101. - reg-names
  102. - phys
  103. - phy-names
  104. - interrupts
  105. - ports
  106. additionalProperties: false
  107. examples:
  108. - |
  109. #include <dt-bindings/interrupt-controller/arm-gic.h>
  110. bus {
  111. #address-cells = <2>;
  112. #size-cells = <2>;
  113. mhdp: dp-bridge@f0fb000000 {
  114. compatible = "cdns,mhdp8546";
  115. reg = <0xf0 0xfb000000 0x0 0x1000000>;
  116. reg-names = "mhdptx";
  117. clocks = <&mhdp_clock>;
  118. phys = <&dp_phy>;
  119. phy-names = "dpphy";
  120. interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
  121. ports {
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. port@0 {
  125. reg = <0>;
  126. dp_bridge_input: endpoint {
  127. remote-endpoint = <&xxx_dpi_output>;
  128. };
  129. };
  130. port@4 {
  131. reg = <4>;
  132. dp_bridge_output: endpoint {
  133. remote-endpoint = <&xxx_dp_connector_input>;
  134. };
  135. };
  136. };
  137. };
  138. };
  139. ...