mediatek,dither.yaml 2.6 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/mediatek/mediatek,dither.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Mediatek display dither processor
  7. maintainers:
  8. - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  9. - Philipp Zabel <p.zabel@pengutronix.de>
  10. description: |
  11. Mediatek display dither processor, namely DITHER, works by approximating
  12. unavailable colors with available colors and by mixing and matching available
  13. colors to mimic unavailable ones.
  14. DITHER device node must be siblings to the central MMSYS_CONFIG node.
  15. For a description of the MMSYS_CONFIG binding, see
  16. Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
  17. for details.
  18. properties:
  19. compatible:
  20. oneOf:
  21. - enum:
  22. - mediatek,mt8183-disp-dither
  23. - items:
  24. - enum:
  25. - mediatek,mt8186-disp-dither
  26. - mediatek,mt8188-disp-dither
  27. - mediatek,mt8192-disp-dither
  28. - mediatek,mt8195-disp-dither
  29. - mediatek,mt8365-disp-dither
  30. - const: mediatek,mt8183-disp-dither
  31. reg:
  32. maxItems: 1
  33. interrupts:
  34. maxItems: 1
  35. power-domains:
  36. description: A phandle and PM domain specifier as defined by bindings of
  37. the power controller specified by phandle. See
  38. Documentation/devicetree/bindings/power/power-domain.yaml for details.
  39. clocks:
  40. items:
  41. - description: DITHER Clock
  42. mediatek,gce-client-reg:
  43. description: The register of client driver can be configured by gce with
  44. 4 arguments defined in this property, such as phandle of gce, subsys id,
  45. register offset and size. Each GCE subsys id is mapping to a client
  46. defined in the header include/dt-bindings/gce/<chip>-gce.h.
  47. $ref: /schemas/types.yaml#/definitions/phandle-array
  48. maxItems: 1
  49. required:
  50. - compatible
  51. - reg
  52. - interrupts
  53. - power-domains
  54. - clocks
  55. additionalProperties: false
  56. examples:
  57. - |
  58. #include <dt-bindings/interrupt-controller/arm-gic.h>
  59. #include <dt-bindings/clock/mt8183-clk.h>
  60. #include <dt-bindings/power/mt8183-power.h>
  61. #include <dt-bindings/gce/mt8183-gce.h>
  62. soc {
  63. #address-cells = <2>;
  64. #size-cells = <2>;
  65. dither0: dither@14012000 {
  66. compatible = "mediatek,mt8183-disp-dither";
  67. reg = <0 0x14012000 0 0x1000>;
  68. interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>;
  69. power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
  70. clocks = <&mmsys CLK_MM_DISP_DITHER0>;
  71. mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
  72. };
  73. };