mdss-common.yaml 2.3 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm Display MDSS common properties
  7. maintainers:
  8. - Krishna Manikandan <quic_mkrishn@quicinc.com>
  9. - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
  10. - Rob Clark <robdclark@gmail.com>
  11. description:
  12. Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
  13. sub-blocks like DPU display controller, DSI and DP interfaces etc.
  14. # Do not select this by default, otherwise it is also selected for qcom,mdss
  15. # devices.
  16. select:
  17. false
  18. properties:
  19. $nodename:
  20. pattern: "^display-subsystem@[0-9a-f]+$"
  21. reg:
  22. maxItems: 1
  23. reg-names:
  24. const: mdss
  25. power-domains:
  26. maxItems: 1
  27. clocks:
  28. minItems: 2
  29. maxItems: 4
  30. clock-names:
  31. minItems: 2
  32. maxItems: 4
  33. interrupts:
  34. maxItems: 1
  35. interrupt-controller: true
  36. "#address-cells": true
  37. "#size-cells": true
  38. "#interrupt-cells":
  39. const: 1
  40. iommus:
  41. minItems: 1
  42. items:
  43. - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
  44. - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
  45. ranges: true
  46. # This is not a perfect description, but it's impossible to discern and match
  47. # the entries like we do with interconnect-names
  48. interconnects:
  49. minItems: 1
  50. items:
  51. - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
  52. - description: Interconnect path from mdp1 port to the data bus
  53. - description: Interconnect path from CPU to the reg bus
  54. interconnect-names:
  55. oneOf:
  56. - minItems: 1
  57. items:
  58. - const: mdp0-mem
  59. - const: cpu-cfg
  60. - minItems: 2
  61. items:
  62. - const: mdp0-mem
  63. - const: mdp1-mem
  64. - const: cpu-cfg
  65. resets:
  66. items:
  67. - description: MDSS_CORE reset
  68. memory-region:
  69. maxItems: 1
  70. description:
  71. Phandle to a node describing a reserved framebuffer memory region.
  72. For example, the splash memory region set up by the bootloader.
  73. required:
  74. - reg
  75. - reg-names
  76. - power-domains
  77. - clocks
  78. - interrupts
  79. - interrupt-controller
  80. - iommus
  81. - ranges
  82. additionalProperties: true