nvidia,tegra20-epp.yaml 1.3 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-epp.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: NVIDIA Tegra Encoder Pre-Processor
  7. maintainers:
  8. - Thierry Reding <thierry.reding@gmail.com>
  9. - Jon Hunter <jonathanh@nvidia.com>
  10. properties:
  11. $nodename:
  12. pattern: "^epp@[0-9a-f]+$"
  13. compatible:
  14. enum:
  15. - nvidia,tegra20-epp
  16. - nvidia,tegra30-epp
  17. - nvidia,tegra114-epp
  18. reg:
  19. maxItems: 1
  20. interrupts:
  21. maxItems: 1
  22. clocks:
  23. maxItems: 1
  24. resets:
  25. items:
  26. - description: module reset
  27. reset-names:
  28. items:
  29. - const: epp
  30. iommus:
  31. maxItems: 1
  32. interconnects:
  33. maxItems: 4
  34. interconnect-names:
  35. maxItems: 4
  36. operating-points-v2: true
  37. power-domains:
  38. items:
  39. - description: phandle to the core power domain
  40. additionalProperties: false
  41. examples:
  42. - |
  43. #include <dt-bindings/clock/tegra20-car.h>
  44. #include <dt-bindings/interrupt-controller/arm-gic.h>
  45. epp@540c0000 {
  46. compatible = "nvidia,tegra20-epp";
  47. reg = <0x540c0000 0x00040000>;
  48. interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
  49. clocks = <&tegra_car TEGRA20_CLK_EPP>;
  50. resets = <&tegra_car 19>;
  51. reset-names = "epp";
  52. };