nvidia,tegra20-gr2d.yaml 1.5 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: NVIDIA 2D graphics engine
  7. maintainers:
  8. - Thierry Reding <thierry.reding@gmail.com>
  9. - Jon Hunter <jonathanh@nvidia.com>
  10. properties:
  11. $nodename:
  12. pattern: "^gr2d@[0-9a-f]+$"
  13. compatible:
  14. enum:
  15. - nvidia,tegra20-gr2d
  16. - nvidia,tegra30-gr2d
  17. - nvidia,tegra114-gr2d
  18. reg:
  19. maxItems: 1
  20. interrupts:
  21. maxItems: 1
  22. clocks:
  23. items:
  24. - description: module clock
  25. resets:
  26. items:
  27. - description: module reset
  28. - description: memory client hotflush reset
  29. reset-names:
  30. items:
  31. - const: 2d
  32. - const: mc
  33. iommus:
  34. maxItems: 1
  35. interconnects:
  36. maxItems: 4
  37. interconnect-names:
  38. maxItems: 4
  39. operating-points-v2: true
  40. power-domains:
  41. items:
  42. - description: phandle to the HEG or core power domain
  43. additionalProperties: false
  44. examples:
  45. - |
  46. #include <dt-bindings/clock/tegra20-car.h>
  47. #include <dt-bindings/interrupt-controller/arm-gic.h>
  48. #include <dt-bindings/memory/tegra20-mc.h>
  49. gr2d@54140000 {
  50. compatible = "nvidia,tegra20-gr2d";
  51. reg = <0x54140000 0x00040000>;
  52. interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  53. clocks = <&tegra_car TEGRA20_CLK_GR2D>;
  54. resets = <&tegra_car 21>, <&mc TEGRA20_MC_RESET_2D>;
  55. reset-names = "2d", "mc";
  56. };