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- # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
- %YAML 1.2
- ---
- $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-mpe.yaml#
- $schema: http://devicetree.org/meta-schemas/core.yaml#
- title: NVIDIA Tegra Video Encoder
- maintainers:
- - Thierry Reding <thierry.reding@gmail.com>
- - Jon Hunter <jonathanh@nvidia.com>
- properties:
- $nodename:
- pattern: "^mpe@[0-9a-f]+$"
- compatible:
- enum:
- - nvidia,tegra20-mpe
- - nvidia,tegra30-mpe
- - nvidia,tegra114-mpe
- reg:
- maxItems: 1
- interrupts:
- maxItems: 1
- clocks:
- items:
- - description: module clock
- resets:
- items:
- - description: module reset
- reset-names:
- items:
- - const: mpe
- iommus:
- maxItems: 1
- interconnects:
- maxItems: 6
- interconnect-names:
- maxItems: 6
- operating-points-v2: true
- power-domains:
- items:
- - description: phandle to the MPE power domain
- additionalProperties: false
- examples:
- - |
- #include <dt-bindings/clock/tegra20-car.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- mpe@54040000 {
- compatible = "nvidia,tegra20-mpe";
- reg = <0x54040000 0x00040000>;
- interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA20_CLK_MPE>;
- resets = <&tegra_car 60>;
- reset-names = "mpe";
- };
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