dts-coding-style.rst 5.2 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. =====================================
  3. Devicetree Sources (DTS) Coding Style
  4. =====================================
  5. When writing Devicetree Sources (DTS) please observe below guidelines. They
  6. should be considered complementary to any rules expressed already in
  7. the Devicetree Specification and the dtc compiler (including W=1 and W=2
  8. builds).
  9. Individual architectures and subarchitectures can define additional rules,
  10. making the coding style stricter.
  11. Naming and Valid Characters
  12. ---------------------------
  13. The Devicetree Specification allows a broad range of characters in node
  14. and property names, but this coding style narrows the range down to achieve
  15. better code readability.
  16. 1. Node and property names can use only the following characters:
  17. * Lowercase characters: [a-z]
  18. * Digits: [0-9]
  19. * Dash: -
  20. 2. Labels can use only the following characters:
  21. * Lowercase characters: [a-z]
  22. * Digits: [0-9]
  23. * Underscore: _
  24. 3. Unless a bus defines differently, unit addresses shall use lowercase
  25. hexadecimal digits, without leading zeros (padding).
  26. 4. Hex values in properties, e.g. "reg", shall use lowercase hex. The address
  27. part can be padded with leading zeros.
  28. Example::
  29. gpi_dma2: dma-controller@a00000 {
  30. compatible = "qcom,sm8550-gpi-dma", "qcom,sm6350-gpi-dma";
  31. reg = <0x0 0x00a00000 0x0 0x60000>;
  32. }
  33. Order of Nodes
  34. --------------
  35. 1. Nodes on any bus, thus using unit addresses for children, shall be
  36. ordered by unit address in ascending order.
  37. Alternatively for some subarchitectures, nodes of the same type can be
  38. grouped together, e.g. all I2C controllers one after another even if this
  39. breaks unit address ordering.
  40. 2. Nodes without unit addresses shall be ordered alpha-numerically by the node
  41. name. For a few node types, they can be ordered by the main property, e.g.
  42. pin configuration states ordered by value of "pins" property.
  43. 3. When extending nodes in the board DTS via &label, the entries shall be
  44. ordered either alpha-numerically or by keeping the order from DTSI, where
  45. the choice depends on the subarchitecture.
  46. The above-described ordering rules are easy to enforce during review, reduce
  47. chances of conflicts for simultaneous additions of new nodes to a file and help
  48. in navigating through the DTS source.
  49. Example::
  50. /* SoC DTSI */
  51. / {
  52. cpus {
  53. /* ... */
  54. };
  55. psci {
  56. /* ... */
  57. };
  58. soc@0 {
  59. dma: dma-controller@10000 {
  60. /* ... */
  61. };
  62. clk: clock-controller@80000 {
  63. /* ... */
  64. };
  65. };
  66. };
  67. /* Board DTS - alphabetical order */
  68. &clk {
  69. /* ... */
  70. };
  71. &dma {
  72. /* ... */
  73. };
  74. /* Board DTS - alternative order, keep as DTSI */
  75. &dma {
  76. /* ... */
  77. };
  78. &clk {
  79. /* ... */
  80. };
  81. Order of Properties in Device Node
  82. ----------------------------------
  83. The following order of properties in device nodes is preferred:
  84. 1. "compatible"
  85. 2. "reg"
  86. 3. "ranges"
  87. 4. Standard/common properties (defined by common bindings, e.g. without
  88. vendor-prefixes)
  89. 5. Vendor-specific properties
  90. 6. "status" (if applicable)
  91. 7. Child nodes, where each node is preceded with a blank line
  92. The "status" property is by default "okay", thus it can be omitted.
  93. The above-described ordering follows this approach:
  94. 1. Most important properties start the node: compatible then bus addressing to
  95. match unit address.
  96. 2. Each node will have common properties in similar place.
  97. 3. Status is the last information to annotate that device node is or is not
  98. finished (board resources are needed).
  99. Example::
  100. /* SoC DTSI */
  101. device_node: device-class@6789abc {
  102. compatible = "vendor,device";
  103. reg = <0x0 0x06789abc 0x0 0xa123>;
  104. ranges = <0x0 0x0 0x06789abc 0x1000>;
  105. #dma-cells = <1>;
  106. clocks = <&clock_controller 0>, <&clock_controller 1>;
  107. clock-names = "bus", "host";
  108. #address-cells = <1>;
  109. #size-cells = <1>;
  110. vendor,custom-property = <2>;
  111. status = "disabled";
  112. child_node: child-class@100 {
  113. reg = <0x100 0x200>;
  114. /* ... */
  115. };
  116. };
  117. /* Board DTS */
  118. &device_node {
  119. vdd-supply = <&board_vreg1>;
  120. status = "okay";
  121. }
  122. Indentation
  123. -----------
  124. 1. Use indentation according to Documentation/process/coding-style.rst.
  125. 2. Each entry in arrays with multiple cells, e.g. "reg" with two IO addresses,
  126. shall be enclosed in <>.
  127. 3. For arrays spanning across lines, it is preferred to align the continued
  128. entries with opening < from the first line.
  129. Example::
  130. thermal-sensor@c271000 {
  131. compatible = "qcom,sm8550-tsens", "qcom,tsens-v2";
  132. reg = <0x0 0x0c271000 0x0 0x1000>,
  133. <0x0 0x0c222000 0x0 0x1000>;
  134. };
  135. Organizing DTSI and DTS
  136. -----------------------
  137. The DTSI and DTS files shall be organized in a way representing the common,
  138. reusable parts of hardware. Typically, this means organizing DTSI and DTS files
  139. into several files:
  140. 1. DTSI with contents of the entire SoC, without nodes for hardware not present
  141. on the SoC.
  142. 2. If applicable: DTSI with common or re-usable parts of the hardware, e.g.
  143. entire System-on-Module.
  144. 3. DTS representing the board.
  145. Hardware components that are present on the board shall be placed in the
  146. board DTS, not in the SoC or SoM DTSI. A partial exception is a common
  147. external reference SoC input clock, which could be coded as a fixed-clock in
  148. the SoC DTSI with its frequency provided by each board DTS.