marvell,nand-controller.yaml 5.1 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Marvell NAND Flash Controller (NFC)
  7. maintainers:
  8. - Miquel Raynal <miquel.raynal@bootlin.com>
  9. properties:
  10. compatible:
  11. oneOf:
  12. - items:
  13. - const: marvell,armada-8k-nand-controller
  14. - const: marvell,armada370-nand-controller
  15. - enum:
  16. - marvell,ac5-nand-controller
  17. - marvell,armada370-nand-controller
  18. - marvell,pxa3xx-nand-controller
  19. - description: legacy bindings
  20. deprecated: true
  21. enum:
  22. - marvell,armada-8k-nand
  23. - marvell,armada370-nand
  24. - marvell,pxa3xx-nand
  25. reg:
  26. maxItems: 1
  27. interrupts:
  28. maxItems: 1
  29. clocks:
  30. description:
  31. Shall reference the NAND controller clocks, the second one is
  32. is only needed for the Armada 7K/8K SoCs
  33. minItems: 1
  34. maxItems: 2
  35. clock-names:
  36. minItems: 1
  37. items:
  38. - const: core
  39. - const: reg
  40. dmas:
  41. maxItems: 1
  42. dma-names:
  43. items:
  44. - const: data
  45. marvell,system-controller:
  46. $ref: /schemas/types.yaml#/definitions/phandle
  47. description: Syscon node that handles NAND controller related registers
  48. patternProperties:
  49. "^nand@[a-f0-9]$":
  50. type: object
  51. $ref: raw-nand-chip.yaml
  52. properties:
  53. reg:
  54. minimum: 0
  55. maximum: 3
  56. nand-rb:
  57. items:
  58. - minimum: 0
  59. maximum: 1
  60. nand-ecc-step-size:
  61. const: 512
  62. nand-ecc-strength:
  63. enum: [1, 4, 8, 12, 16]
  64. nand-ecc-mode:
  65. const: hw
  66. marvell,nand-keep-config:
  67. $ref: /schemas/types.yaml#/definitions/flag
  68. description:
  69. Orders the driver not to take the timings from the core and
  70. leaving them completely untouched. Bootloader timings will then
  71. be used.
  72. marvell,nand-enable-arbiter:
  73. $ref: /schemas/types.yaml#/definitions/flag
  74. description:
  75. To enable the arbiter, all boards blindly used it,
  76. this bit was set by the bootloader for many boards and even if
  77. it is marked reserved in several datasheets, it might be needed to set
  78. it (otherwise it is harmless).
  79. deprecated: true
  80. required:
  81. - reg
  82. - nand-rb
  83. unevaluatedProperties: false
  84. required:
  85. - compatible
  86. - reg
  87. - interrupts
  88. - clocks
  89. allOf:
  90. - $ref: nand-controller.yaml#
  91. - if:
  92. properties:
  93. compatible:
  94. contains:
  95. const: marvell,pxa3xx-nand-controller
  96. then:
  97. required:
  98. - dmas
  99. - dma-names
  100. - if:
  101. properties:
  102. compatible:
  103. contains:
  104. const: marvell,armada-8k-nand-controller
  105. then:
  106. properties:
  107. clocks:
  108. minItems: 2
  109. clock-names:
  110. minItems: 2
  111. required:
  112. - marvell,system-controller
  113. else:
  114. properties:
  115. clocks:
  116. minItems: 1
  117. clock-names:
  118. minItems: 1
  119. unevaluatedProperties: false
  120. examples:
  121. - |
  122. #include <dt-bindings/interrupt-controller/arm-gic.h>
  123. nand_controller: nand-controller@d0000 {
  124. compatible = "marvell,armada370-nand-controller";
  125. reg = <0xd0000 0x54>;
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
  129. clocks = <&coredivclk 0>;
  130. nand@0 {
  131. reg = <0>;
  132. label = "main-storage";
  133. nand-rb = <0>;
  134. nand-ecc-mode = "hw";
  135. marvell,nand-keep-config;
  136. nand-on-flash-bbt;
  137. nand-ecc-strength = <4>;
  138. nand-ecc-step-size = <512>;
  139. partitions {
  140. compatible = "fixed-partitions";
  141. #address-cells = <1>;
  142. #size-cells = <1>;
  143. partition@0 {
  144. label = "Rootfs";
  145. reg = <0x00000000 0x40000000>;
  146. };
  147. };
  148. };
  149. };
  150. - |
  151. cp0_nand_controller: nand-controller@720000 {
  152. compatible = "marvell,armada-8k-nand-controller",
  153. "marvell,armada370-nand-controller";
  154. reg = <0x720000 0x54>;
  155. #address-cells = <1>;
  156. #size-cells = <0>;
  157. interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
  158. clock-names = "core", "reg";
  159. clocks = <&cp0_clk 1 2>,
  160. <&cp0_clk 1 17>;
  161. marvell,system-controller = <&cp0_syscon0>;
  162. nand@0 {
  163. reg = <0>;
  164. label = "main-storage";
  165. nand-rb = <0>;
  166. nand-ecc-mode = "hw";
  167. nand-ecc-strength = <8>;
  168. nand-ecc-step-size = <512>;
  169. };
  170. };
  171. - |
  172. nand-controller@43100000 {
  173. compatible = "marvell,pxa3xx-nand-controller";
  174. reg = <0x43100000 90>;
  175. interrupts = <45>;
  176. clocks = <&clks 1>;
  177. clock-names = "core";
  178. dmas = <&pdma 97 3>;
  179. dma-names = "data";
  180. #address-cells = <1>;
  181. #size-cells = <0>;
  182. nand@0 {
  183. reg = <0>;
  184. nand-rb = <0>;
  185. nand-ecc-mode = "hw";
  186. marvell,nand-keep-config;
  187. };
  188. };
  189. ...