fsl,layerscape-sfp.yaml 1.4 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Freescale Layerscape Security Fuse Processor
  7. maintainers:
  8. - Michael Walle <michael@walle.cc>
  9. description: |
  10. SFP is the security fuse processor which among other things provides a
  11. unique identifier per part.
  12. allOf:
  13. - $ref: nvmem.yaml#
  14. - $ref: nvmem-deprecated-cells.yaml
  15. properties:
  16. compatible:
  17. oneOf:
  18. - description: Trust architecture 2.1 SFP
  19. items:
  20. - const: fsl,ls1021a-sfp
  21. - description: Trust architecture 3.0 SFP
  22. items:
  23. - const: fsl,ls1028a-sfp
  24. reg:
  25. maxItems: 1
  26. clocks:
  27. maxItems: 1
  28. description:
  29. The SFP clock. Typically, this is the platform clock divided by 4.
  30. clock-names:
  31. const: sfp
  32. ta-prog-sfp-supply:
  33. description:
  34. The regulator for the TA_PROG_SFP pin. It will be enabled for programming
  35. and disabled for reading.
  36. required:
  37. - compatible
  38. - reg
  39. - clock-names
  40. - clocks
  41. unevaluatedProperties: false
  42. examples:
  43. - |
  44. #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
  45. efuse@1e80000 {
  46. compatible = "fsl,ls1028a-sfp";
  47. reg = <0x1e80000 0x8000>;
  48. clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
  49. QORIQ_CLK_PLL_DIV(4)>;
  50. clock-names = "sfp";
  51. };