qcom,sc7280-adsp-pil.yaml 5.2 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm SC7280 ADSP Peripheral Image Loader
  7. maintainers:
  8. - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
  9. description:
  10. This document describes the hardware for a component that loads and boots firmware
  11. on the Qualcomm Technology Inc. ADSP.
  12. properties:
  13. compatible:
  14. enum:
  15. - qcom,sc7280-adsp-pil
  16. reg:
  17. items:
  18. - description: qdsp6ss register
  19. - description: efuse q6ss register
  20. iommus:
  21. items:
  22. - description: Phandle to apps_smmu node with sid mask
  23. interrupts:
  24. items:
  25. - description: Watchdog interrupt
  26. - description: Fatal interrupt
  27. - description: Ready interrupt
  28. - description: Handover interrupt
  29. - description: Stop acknowledge interrupt
  30. - description: Shutdown acknowledge interrupt
  31. interrupt-names:
  32. items:
  33. - const: wdog
  34. - const: fatal
  35. - const: ready
  36. - const: handover
  37. - const: stop-ack
  38. - const: shutdown-ack
  39. clocks:
  40. items:
  41. - description: XO clock
  42. - description: GCC CFG NOC LPASS clock
  43. clock-names:
  44. items:
  45. - const: xo
  46. - const: gcc_cfg_noc_lpass
  47. power-domains:
  48. items:
  49. - description: LCX power domain
  50. resets:
  51. items:
  52. - description: PDC AUDIO SYNC RESET
  53. - description: CC LPASS restart
  54. reset-names:
  55. items:
  56. - const: pdc_sync
  57. - const: cc_lpass
  58. memory-region:
  59. maxItems: 1
  60. description: Reference to the reserved-memory for the Hexagon core
  61. qcom,halt-regs:
  62. $ref: /schemas/types.yaml#/definitions/phandle-array
  63. description:
  64. Phandle reference to a syscon representing TCSR followed by the
  65. four offsets within syscon for q6, modem, nc and qv6 halt registers.
  66. items:
  67. - items:
  68. - description: phandle to TCSR_MUTEX registers
  69. - description: offset to the Q6 halt register
  70. - description: offset to the modem halt register
  71. - description: offset to the nc halt register
  72. - description: offset to the vq6 halt register
  73. qcom,smem-states:
  74. $ref: /schemas/types.yaml#/definitions/phandle-array
  75. description: States used by the AP to signal the Hexagon core
  76. items:
  77. - description: Stop the modem
  78. qcom,smem-state-names:
  79. description: The names of the state bits used for SMP2P output
  80. const: stop
  81. qcom,qmp:
  82. $ref: /schemas/types.yaml#/definitions/phandle
  83. description: Reference to the AOSS side-channel message RAM.
  84. glink-edge:
  85. $ref: qcom,glink-edge.yaml#
  86. type: object
  87. unevaluatedProperties: false
  88. description: |
  89. Qualcomm G-Link subnode which represents communication edge, channels
  90. and devices related to the ADSP.
  91. properties:
  92. label:
  93. const: lpass
  94. gpr: true
  95. apr: false
  96. fastrpc: false
  97. required:
  98. - label
  99. required:
  100. - compatible
  101. - reg
  102. - interrupts
  103. - interrupt-names
  104. - clocks
  105. - clock-names
  106. - power-domains
  107. - resets
  108. - reset-names
  109. - qcom,halt-regs
  110. - memory-region
  111. - qcom,smem-states
  112. - qcom,smem-state-names
  113. - qcom,qmp
  114. additionalProperties: false
  115. examples:
  116. - |
  117. #include <dt-bindings/interrupt-controller/arm-gic.h>
  118. #include <dt-bindings/clock/qcom,rpmh.h>
  119. #include <dt-bindings/clock/qcom,gcc-sc7280.h>
  120. #include <dt-bindings/clock/qcom,lpass-sc7280.h>
  121. #include <dt-bindings/reset/qcom,sdm845-aoss.h>
  122. #include <dt-bindings/reset/qcom,sdm845-pdc.h>
  123. #include <dt-bindings/power/qcom-rpmpd.h>
  124. #include <dt-bindings/mailbox/qcom-ipcc.h>
  125. remoteproc@3000000 {
  126. compatible = "qcom,sc7280-adsp-pil";
  127. reg = <0x03000000 0x5000>,
  128. <0x0355b000 0x10>;
  129. interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,
  130. <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
  131. <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
  132. <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
  133. <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
  134. <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
  135. interrupt-names = "wdog", "fatal", "ready",
  136. "handover", "stop-ack", "shutdown-ack";
  137. clocks = <&rpmhcc RPMH_CXO_CLK>,
  138. <&gcc GCC_CFG_NOC_LPASS_CLK>;
  139. clock-names = "xo", "gcc_cfg_noc_lpass";
  140. power-domains = <&rpmhpd SC7280_LCX>;
  141. resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
  142. <&aoss_reset AOSS_CC_LPASS_RESTART>;
  143. reset-names = "pdc_sync", "cc_lpass";
  144. qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
  145. memory-region = <&adsp_mem>;
  146. qcom,smem-states = <&adsp_smp2p_out 0>;
  147. qcom,smem-state-names = "stop";
  148. qcom,qmp = <&aoss_qmp>;
  149. glink-edge {
  150. interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
  151. IPCC_MPROC_SIGNAL_GLINK_QMP
  152. IRQ_TYPE_EDGE_RISING>;
  153. mboxes = <&ipcc IPCC_CLIENT_LPASS
  154. IPCC_MPROC_SIGNAL_GLINK_QMP>;
  155. label = "lpass";
  156. qcom,remote-pid = <2>;
  157. };
  158. };