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- # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
- %YAML 1.2
- ---
- $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
- $schema: http://devicetree.org/meta-schemas/core.yaml#
- title: Qualcomm SC7280 ADSP Peripheral Image Loader
- maintainers:
- - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
- description:
- This document describes the hardware for a component that loads and boots firmware
- on the Qualcomm Technology Inc. ADSP.
- properties:
- compatible:
- enum:
- - qcom,sc7280-adsp-pil
- reg:
- items:
- - description: qdsp6ss register
- - description: efuse q6ss register
- iommus:
- items:
- - description: Phandle to apps_smmu node with sid mask
- interrupts:
- items:
- - description: Watchdog interrupt
- - description: Fatal interrupt
- - description: Ready interrupt
- - description: Handover interrupt
- - description: Stop acknowledge interrupt
- - description: Shutdown acknowledge interrupt
- interrupt-names:
- items:
- - const: wdog
- - const: fatal
- - const: ready
- - const: handover
- - const: stop-ack
- - const: shutdown-ack
- clocks:
- items:
- - description: XO clock
- - description: GCC CFG NOC LPASS clock
- clock-names:
- items:
- - const: xo
- - const: gcc_cfg_noc_lpass
- power-domains:
- items:
- - description: LCX power domain
- resets:
- items:
- - description: PDC AUDIO SYNC RESET
- - description: CC LPASS restart
- reset-names:
- items:
- - const: pdc_sync
- - const: cc_lpass
- memory-region:
- maxItems: 1
- description: Reference to the reserved-memory for the Hexagon core
- qcom,halt-regs:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- description:
- Phandle reference to a syscon representing TCSR followed by the
- four offsets within syscon for q6, modem, nc and qv6 halt registers.
- items:
- - items:
- - description: phandle to TCSR_MUTEX registers
- - description: offset to the Q6 halt register
- - description: offset to the modem halt register
- - description: offset to the nc halt register
- - description: offset to the vq6 halt register
- qcom,smem-states:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- description: States used by the AP to signal the Hexagon core
- items:
- - description: Stop the modem
- qcom,smem-state-names:
- description: The names of the state bits used for SMP2P output
- const: stop
- qcom,qmp:
- $ref: /schemas/types.yaml#/definitions/phandle
- description: Reference to the AOSS side-channel message RAM.
- glink-edge:
- $ref: qcom,glink-edge.yaml#
- type: object
- unevaluatedProperties: false
- description: |
- Qualcomm G-Link subnode which represents communication edge, channels
- and devices related to the ADSP.
- properties:
- label:
- const: lpass
- gpr: true
- apr: false
- fastrpc: false
- required:
- - label
- required:
- - compatible
- - reg
- - interrupts
- - interrupt-names
- - clocks
- - clock-names
- - power-domains
- - resets
- - reset-names
- - qcom,halt-regs
- - memory-region
- - qcom,smem-states
- - qcom,smem-state-names
- - qcom,qmp
- additionalProperties: false
- examples:
- - |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/qcom,rpmh.h>
- #include <dt-bindings/clock/qcom,gcc-sc7280.h>
- #include <dt-bindings/clock/qcom,lpass-sc7280.h>
- #include <dt-bindings/reset/qcom,sdm845-aoss.h>
- #include <dt-bindings/reset/qcom,sdm845-pdc.h>
- #include <dt-bindings/power/qcom-rpmpd.h>
- #include <dt-bindings/mailbox/qcom-ipcc.h>
- remoteproc@3000000 {
- compatible = "qcom,sc7280-adsp-pil";
- reg = <0x03000000 0x5000>,
- <0x0355b000 0x10>;
- interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack", "shutdown-ack";
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_CFG_NOC_LPASS_CLK>;
- clock-names = "xo", "gcc_cfg_noc_lpass";
- power-domains = <&rpmhpd SC7280_LCX>;
- resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
- <&aoss_reset AOSS_CC_LPASS_RESTART>;
- reset-names = "pdc_sync", "cc_lpass";
- qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
- memory-region = <&adsp_mem>;
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
- qcom,qmp = <&aoss_qmp>;
- glink-edge {
- interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
- IPCC_MPROC_SIGNAL_GLINK_QMP
- IRQ_TYPE_EDGE_RISING>;
- mboxes = <&ipcc IPCC_CLIENT_LPASS
- IPCC_MPROC_SIGNAL_GLINK_QMP>;
- label = "lpass";
- qcom,remote-pid = <2>;
- };
- };
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