| 123456789101112131415161718192021222324252627282930313233343536373839404142 |
- ============================
- C-SKY Multi-processors Timer
- ============================
- C-SKY multi-processors timer is designed for C-SKY SMP system and the
- regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
- - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
- - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
- - PTIM_CCVR "cr<3, 14>" Current counter value reg.
- - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
- ==============================
- timer node bindings definition
- ==============================
- Description: Describes SMP timer
- PROPERTIES
- - compatible
- Usage: required
- Value type: <string>
- Definition: must be "csky,mptimer"
- - clocks
- Usage: required
- Value type: <node>
- Definition: must be input clk node
- - interrupts
- Usage: required
- Value type: <u32>
- Definition: must be timer irq num defined by soc
- Examples:
- ---------
- timer: timer {
- compatible = "csky,mptimer";
- clocks = <&dummy_apb_clk>;
- interrupts = <16>;
- interrupt-parent = <&intc>;
- };
|