i2c-protocol.rst 3.0 KB

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  1. ================
  2. The I2C Protocol
  3. ================
  4. This document is an overview of the basic I2C transactions and the kernel
  5. APIs to perform them.
  6. Key to symbols
  7. ==============
  8. =============== =============================================================
  9. S Start condition
  10. P Stop condition
  11. Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0.
  12. A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
  13. Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
  14. get a 10 bit I2C address.
  15. Data (8 bits) A plain data byte.
  16. [..] Data sent by I2C device, as opposed to data sent by the
  17. host adapter.
  18. =============== =============================================================
  19. Simple send transaction
  20. =======================
  21. Implemented by i2c_master_send()::
  22. S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
  23. Simple receive transaction
  24. ==========================
  25. Implemented by i2c_master_recv()::
  26. S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
  27. Combined transactions
  28. =====================
  29. Implemented by i2c_transfer().
  30. They are just like the above transactions, but instead of a stop
  31. condition P a start condition S is sent and the transaction continues.
  32. An example of a byte read, followed by a byte write::
  33. S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
  34. Modified transactions
  35. =====================
  36. The following modifications to the I2C protocol can also be generated by
  37. setting these flags for I2C messages. With the exception of I2C_M_NOSTART, they
  38. are usually only needed to work around device issues:
  39. I2C_M_IGNORE_NAK:
  40. Normally message is interrupted immediately if there is [NA] from the
  41. client. Setting this flag treats any [NA] as [A], and all of
  42. message is sent.
  43. These messages may still fail to SCL lo->hi timeout.
  44. I2C_M_NO_RD_ACK:
  45. In a read message, master A/NA bit is skipped.
  46. I2C_M_NOSTART:
  47. In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
  48. point. For example, setting I2C_M_NOSTART on the second partial message
  49. generates something like::
  50. S Addr Rd [A] [Data] NA Data [A] P
  51. If you set the I2C_M_NOSTART variable for the first partial message,
  52. we do not generate Addr, but we do generate the start condition S.
  53. This will probably confuse all other clients on your bus, so don't
  54. try this.
  55. This is often used to gather transmits from multiple data buffers in
  56. system memory into something that appears as a single transfer to the
  57. I2C device but may also be used between direction changes by some
  58. rare devices.
  59. I2C_M_REV_DIR_ADDR:
  60. This toggles the Rd/Wr flag. That is, if you want to do a write, but
  61. need to emit an Rd instead of a Wr, or vice versa, you set this
  62. flag. For example::
  63. S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
  64. I2C_M_STOP:
  65. Force a stop condition (P) after the message. Some I2C related protocols
  66. like SCCB require that. Normally, you really don't want to get interrupted
  67. between the messages of one transfer.