vmemmap_dedup.rst 12 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. =========================================
  3. A vmemmap diet for HugeTLB and Device DAX
  4. =========================================
  5. HugeTLB
  6. =======
  7. This section is to explain how HugeTLB Vmemmap Optimization (HVO) works.
  8. The ``struct page`` structures are used to describe a physical page frame. By
  9. default, there is a one-to-one mapping from a page frame to its corresponding
  10. ``struct page``.
  11. HugeTLB pages consist of multiple base page size pages and is supported by many
  12. architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more
  13. details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
  14. currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page
  15. consists of 512 base pages and a 1GB HugeTLB page consists of 262144 base pages.
  16. For each base page, there is a corresponding ``struct page``.
  17. Within the HugeTLB subsystem, only the first 4 ``struct page`` are used to
  18. contain unique information about a HugeTLB page. ``__NR_USED_SUBPAGE`` provides
  19. this upper limit. The only 'useful' information in the remaining ``struct page``
  20. is the compound_head field, and this field is the same for all tail pages.
  21. By removing redundant ``struct page`` for HugeTLB pages, memory can be returned
  22. to the buddy allocator for other uses.
  23. Different architectures support different HugeTLB pages. For example, the
  24. following table is the HugeTLB page size supported by x86 and arm64
  25. architectures. Because arm64 supports 4k, 16k, and 64k base pages and
  26. supports contiguous entries, so it supports many kinds of sizes of HugeTLB
  27. page.
  28. +--------------+-----------+-----------------------------------------------+
  29. | Architecture | Page Size | HugeTLB Page Size |
  30. +--------------+-----------+-----------+-----------+-----------+-----------+
  31. | x86-64 | 4KB | 2MB | 1GB | | |
  32. +--------------+-----------+-----------+-----------+-----------+-----------+
  33. | | 4KB | 64KB | 2MB | 32MB | 1GB |
  34. | +-----------+-----------+-----------+-----------+-----------+
  35. | arm64 | 16KB | 2MB | 32MB | 1GB | |
  36. | +-----------+-----------+-----------+-----------+-----------+
  37. | | 64KB | 2MB | 512MB | 16GB | |
  38. +--------------+-----------+-----------+-----------+-----------+-----------+
  39. When the system boot up, every HugeTLB page has more than one ``struct page``
  40. structs which size is (unit: pages)::
  41. struct_size = HugeTLB_Size / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE
  42. Where HugeTLB_Size is the size of the HugeTLB page. We know that the size
  43. of the HugeTLB page is always n times PAGE_SIZE. So we can get the following
  44. relationship::
  45. HugeTLB_Size = n * PAGE_SIZE
  46. Then::
  47. struct_size = n * PAGE_SIZE / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE
  48. = n * sizeof(struct page) / PAGE_SIZE
  49. We can use huge mapping at the pud/pmd level for the HugeTLB page.
  50. For the HugeTLB page of the pmd level mapping, then::
  51. struct_size = n * sizeof(struct page) / PAGE_SIZE
  52. = PAGE_SIZE / sizeof(pte_t) * sizeof(struct page) / PAGE_SIZE
  53. = sizeof(struct page) / sizeof(pte_t)
  54. = 64 / 8
  55. = 8 (pages)
  56. Where n is how many pte entries which one page can contains. So the value of
  57. n is (PAGE_SIZE / sizeof(pte_t)).
  58. This optimization only supports 64-bit system, so the value of sizeof(pte_t)
  59. is 8. And this optimization also applicable only when the size of ``struct page``
  60. is a power of two. In most cases, the size of ``struct page`` is 64 bytes (e.g.
  61. x86-64 and arm64). So if we use pmd level mapping for a HugeTLB page, the
  62. size of ``struct page`` structs of it is 8 page frames which size depends on the
  63. size of the base page.
  64. For the HugeTLB page of the pud level mapping, then::
  65. struct_size = PAGE_SIZE / sizeof(pmd_t) * struct_size(pmd)
  66. = PAGE_SIZE / 8 * 8 (pages)
  67. = PAGE_SIZE (pages)
  68. Where the struct_size(pmd) is the size of the ``struct page`` structs of a
  69. HugeTLB page of the pmd level mapping.
  70. E.g.: A 2MB HugeTLB page on x86_64 consists in 8 page frames while 1GB
  71. HugeTLB page consists in 4096.
  72. Next, we take the pmd level mapping of the HugeTLB page as an example to
  73. show the internal implementation of this optimization. There are 8 pages
  74. ``struct page`` structs associated with a HugeTLB page which is pmd mapped.
  75. Here is how things look before optimization::
  76. HugeTLB struct pages(8 pages) page frame(8 pages)
  77. +-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+
  78. | | | 0 | -------------> | 0 |
  79. | | +-----------+ +-----------+
  80. | | | 1 | -------------> | 1 |
  81. | | +-----------+ +-----------+
  82. | | | 2 | -------------> | 2 |
  83. | | +-----------+ +-----------+
  84. | | | 3 | -------------> | 3 |
  85. | | +-----------+ +-----------+
  86. | | | 4 | -------------> | 4 |
  87. | PMD | +-----------+ +-----------+
  88. | level | | 5 | -------------> | 5 |
  89. | mapping | +-----------+ +-----------+
  90. | | | 6 | -------------> | 6 |
  91. | | +-----------+ +-----------+
  92. | | | 7 | -------------> | 7 |
  93. | | +-----------+ +-----------+
  94. | |
  95. | |
  96. | |
  97. +-----------+
  98. The value of page->compound_head is the same for all tail pages. The first
  99. page of ``struct page`` (page 0) associated with the HugeTLB page contains the 4
  100. ``struct page`` necessary to describe the HugeTLB. The only use of the remaining
  101. pages of ``struct page`` (page 1 to page 7) is to point to page->compound_head.
  102. Therefore, we can remap pages 1 to 7 to page 0. Only 1 page of ``struct page``
  103. will be used for each HugeTLB page. This will allow us to free the remaining
  104. 7 pages to the buddy allocator.
  105. Here is how things look after remapping::
  106. HugeTLB struct pages(8 pages) page frame(8 pages)
  107. +-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+
  108. | | | 0 | -------------> | 0 |
  109. | | +-----------+ +-----------+
  110. | | | 1 | ---------------^ ^ ^ ^ ^ ^ ^
  111. | | +-----------+ | | | | | |
  112. | | | 2 | -----------------+ | | | | |
  113. | | +-----------+ | | | | |
  114. | | | 3 | -------------------+ | | | |
  115. | | +-----------+ | | | |
  116. | | | 4 | ---------------------+ | | |
  117. | PMD | +-----------+ | | |
  118. | level | | 5 | -----------------------+ | |
  119. | mapping | +-----------+ | |
  120. | | | 6 | -------------------------+ |
  121. | | +-----------+ |
  122. | | | 7 | ---------------------------+
  123. | | +-----------+
  124. | |
  125. | |
  126. | |
  127. +-----------+
  128. When a HugeTLB is freed to the buddy system, we should allocate 7 pages for
  129. vmemmap pages and restore the previous mapping relationship.
  130. For the HugeTLB page of the pud level mapping. It is similar to the former.
  131. We also can use this approach to free (PAGE_SIZE - 1) vmemmap pages.
  132. Apart from the HugeTLB page of the pmd/pud level mapping, some architectures
  133. (e.g. aarch64) provides a contiguous bit in the translation table entries
  134. that hints to the MMU to indicate that it is one of a contiguous set of
  135. entries that can be cached in a single TLB entry.
  136. The contiguous bit is used to increase the mapping size at the pmd and pte
  137. (last) level. So this type of HugeTLB page can be optimized only when its
  138. size of the ``struct page`` structs is greater than **1** page.
  139. Notice: The head vmemmap page is not freed to the buddy allocator and all
  140. tail vmemmap pages are mapped to the head vmemmap page frame. So we can see
  141. more than one ``struct page`` struct with ``PG_head`` (e.g. 8 per 2 MB HugeTLB
  142. page) associated with each HugeTLB page. The ``compound_head()`` can handle
  143. this correctly. There is only **one** head ``struct page``, the tail
  144. ``struct page`` with ``PG_head`` are fake head ``struct page``. We need an
  145. approach to distinguish between those two different types of ``struct page`` so
  146. that ``compound_head()`` can return the real head ``struct page`` when the
  147. parameter is the tail ``struct page`` but with ``PG_head``.
  148. Device DAX
  149. ==========
  150. The device-dax interface uses the same tail deduplication technique explained
  151. in the previous chapter, except when used with the vmemmap in
  152. the device (altmap).
  153. The following page sizes are supported in DAX: PAGE_SIZE (4K on x86_64),
  154. PMD_SIZE (2M on x86_64) and PUD_SIZE (1G on x86_64).
  155. For powerpc equivalent details see Documentation/arch/powerpc/vmemmap_dedup.rst
  156. The differences with HugeTLB are relatively minor.
  157. It only use 3 ``struct page`` for storing all information as opposed
  158. to 4 on HugeTLB pages.
  159. There's no remapping of vmemmap given that device-dax memory is not part of
  160. System RAM ranges initialized at boot. Thus the tail page deduplication
  161. happens at a later stage when we populate the sections. HugeTLB reuses the
  162. the head vmemmap page representing, whereas device-dax reuses the tail
  163. vmemmap page. This results in only half of the savings compared to HugeTLB.
  164. Deduplicated tail pages are not mapped read-only.
  165. Here's how things look like on device-dax after the sections are populated::
  166. +-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+
  167. | | | 0 | -------------> | 0 |
  168. | | +-----------+ +-----------+
  169. | | | 1 | -------------> | 1 |
  170. | | +-----------+ +-----------+
  171. | | | 2 | ----------------^ ^ ^ ^ ^ ^
  172. | | +-----------+ | | | | |
  173. | | | 3 | ------------------+ | | | |
  174. | | +-----------+ | | | |
  175. | | | 4 | --------------------+ | | |
  176. | PMD | +-----------+ | | |
  177. | level | | 5 | ----------------------+ | |
  178. | mapping | +-----------+ | |
  179. | | | 6 | ------------------------+ |
  180. | | +-----------+ |
  181. | | | 7 | --------------------------+
  182. | | +-----------+
  183. | |
  184. | |
  185. | |
  186. +-----------+