swp_emulate.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/kernel/swp_emulate.c
  4. *
  5. * Copyright (C) 2009 ARM Limited
  6. * __user_* functions adapted from include/asm/uaccess.h
  7. *
  8. * Implements emulation of the SWP/SWPB instructions using load-exclusive and
  9. * store-exclusive for processors that have them disabled (or future ones that
  10. * might not implement them).
  11. *
  12. * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
  13. * Where: Rt = destination
  14. * Rt2 = source
  15. * Rn = address
  16. */
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/proc_fs.h>
  20. #include <linux/seq_file.h>
  21. #include <linux/sched.h>
  22. #include <linux/sched/mm.h>
  23. #include <linux/syscalls.h>
  24. #include <linux/perf_event.h>
  25. #include <asm/opcodes.h>
  26. #include <asm/system_info.h>
  27. #include <asm/traps.h>
  28. #include <linux/uaccess.h>
  29. /*
  30. * Error-checking SWP macros implemented using ldrex{b}/strex{b}
  31. */
  32. #define __user_swpX_asm(data, addr, res, temp, B) \
  33. __asm__ __volatile__( \
  34. ".arch armv7-a\n" \
  35. "0: ldrex"B" %2, [%3]\n" \
  36. "1: strex"B" %0, %1, [%3]\n" \
  37. " cmp %0, #0\n" \
  38. " moveq %1, %2\n" \
  39. " movne %0, %4\n" \
  40. "2:\n" \
  41. " .section .text.fixup,\"ax\"\n" \
  42. " .align 2\n" \
  43. "3: mov %0, %5\n" \
  44. " b 2b\n" \
  45. " .previous\n" \
  46. " .section __ex_table,\"a\"\n" \
  47. " .align 3\n" \
  48. " .long 0b, 3b\n" \
  49. " .long 1b, 3b\n" \
  50. " .previous" \
  51. : "=&r" (res), "+r" (data), "=&r" (temp) \
  52. : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \
  53. : "cc", "memory")
  54. #define __user_swp_asm(data, addr, res, temp) \
  55. __user_swpX_asm(data, addr, res, temp, "")
  56. #define __user_swpb_asm(data, addr, res, temp) \
  57. __user_swpX_asm(data, addr, res, temp, "b")
  58. /*
  59. * Macros/defines for extracting register numbers from instruction.
  60. */
  61. #define EXTRACT_REG_NUM(instruction, offset) \
  62. (((instruction) & (0xf << (offset))) >> (offset))
  63. #define RN_OFFSET 16
  64. #define RT_OFFSET 12
  65. #define RT2_OFFSET 0
  66. /*
  67. * Bit 22 of the instruction encoding distinguishes between
  68. * the SWP and SWPB variants (bit set means SWPB).
  69. */
  70. #define TYPE_SWPB (1 << 22)
  71. static unsigned long swpcounter;
  72. static unsigned long swpbcounter;
  73. static unsigned long abtcounter;
  74. static pid_t previous_pid;
  75. #ifdef CONFIG_PROC_FS
  76. static int proc_status_show(struct seq_file *m, void *v)
  77. {
  78. seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
  79. seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
  80. seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
  81. if (previous_pid != 0)
  82. seq_printf(m, "Last process:\t\t%d\n", previous_pid);
  83. return 0;
  84. }
  85. #endif
  86. /*
  87. * Set up process info to signal segmentation fault - called on access error.
  88. */
  89. static void set_segfault(struct pt_regs *regs, unsigned long addr)
  90. {
  91. int si_code;
  92. mmap_read_lock(current->mm);
  93. if (find_vma(current->mm, addr) == NULL)
  94. si_code = SEGV_MAPERR;
  95. else
  96. si_code = SEGV_ACCERR;
  97. mmap_read_unlock(current->mm);
  98. pr_debug("SWP{B} emulation: access caused memory abort!\n");
  99. arm_notify_die("Illegal memory access", regs,
  100. SIGSEGV, si_code,
  101. (void __user *)instruction_pointer(regs),
  102. 0, 0);
  103. abtcounter++;
  104. }
  105. static int emulate_swpX(unsigned int address, unsigned int *data,
  106. unsigned int type)
  107. {
  108. unsigned int res = 0;
  109. if ((type != TYPE_SWPB) && (address & 0x3)) {
  110. /* SWP to unaligned address not permitted */
  111. pr_debug("SWP instruction on unaligned pointer!\n");
  112. return -EFAULT;
  113. }
  114. while (1) {
  115. unsigned long temp;
  116. unsigned int __ua_flags;
  117. __ua_flags = uaccess_save_and_enable();
  118. if (type == TYPE_SWPB)
  119. __user_swpb_asm(*data, address, res, temp);
  120. else
  121. __user_swp_asm(*data, address, res, temp);
  122. uaccess_restore(__ua_flags);
  123. if (likely(res != -EAGAIN) || signal_pending(current))
  124. break;
  125. cond_resched();
  126. }
  127. if (res == 0) {
  128. if (type == TYPE_SWPB)
  129. swpbcounter++;
  130. else
  131. swpcounter++;
  132. }
  133. return res;
  134. }
  135. /*
  136. * swp_handler logs the id of calling process, dissects the instruction, sanity
  137. * checks the memory location, calls emulate_swpX for the actual operation and
  138. * deals with fixup/error handling before returning
  139. */
  140. static int swp_handler(struct pt_regs *regs, unsigned int instr)
  141. {
  142. unsigned int address, destreg, data, type;
  143. unsigned int res = 0;
  144. perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
  145. res = arm_check_condition(instr, regs->ARM_cpsr);
  146. switch (res) {
  147. case ARM_OPCODE_CONDTEST_PASS:
  148. break;
  149. case ARM_OPCODE_CONDTEST_FAIL:
  150. /* Condition failed - return to next instruction */
  151. regs->ARM_pc += 4;
  152. return 0;
  153. case ARM_OPCODE_CONDTEST_UNCOND:
  154. /* If unconditional encoding - not a SWP, undef */
  155. return -EFAULT;
  156. default:
  157. return -EINVAL;
  158. }
  159. if (current->pid != previous_pid) {
  160. pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
  161. current->comm, (unsigned long)current->pid);
  162. previous_pid = current->pid;
  163. }
  164. address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
  165. data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
  166. destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
  167. type = instr & TYPE_SWPB;
  168. pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
  169. EXTRACT_REG_NUM(instr, RN_OFFSET), address,
  170. destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
  171. /* Check access in reasonable access range for both SWP and SWPB */
  172. if (!access_ok((void __user *)(address & ~3), 4)) {
  173. pr_debug("SWP{B} emulation: access to %p not allowed!\n",
  174. (void *)address);
  175. res = -EFAULT;
  176. } else {
  177. res = emulate_swpX(address, &data, type);
  178. }
  179. if (res == 0) {
  180. /*
  181. * On successful emulation, revert the adjustment to the PC
  182. * made in kernel/traps.c in order to resume execution at the
  183. * instruction following the SWP{B}.
  184. */
  185. regs->ARM_pc += 4;
  186. regs->uregs[destreg] = data;
  187. } else if (res == -EFAULT) {
  188. /*
  189. * Memory errors do not mean emulation failed.
  190. * Set up signal info to return SEGV, then return OK
  191. */
  192. set_segfault(regs, address);
  193. }
  194. return 0;
  195. }
  196. /*
  197. * Only emulate SWP/SWPB executed in ARM state/User mode.
  198. * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
  199. */
  200. static struct undef_hook swp_hook = {
  201. .instr_mask = 0x0fb00ff0,
  202. .instr_val = 0x01000090,
  203. .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
  204. .cpsr_val = USR_MODE,
  205. .fn = swp_handler
  206. };
  207. /*
  208. * Register handler and create status file in /proc/cpu
  209. * Invoked as late_initcall, since not needed before init spawned.
  210. */
  211. static int __init swp_emulation_init(void)
  212. {
  213. if (cpu_architecture() < CPU_ARCH_ARMv7)
  214. return 0;
  215. #ifdef CONFIG_PROC_FS
  216. if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
  217. proc_status_show))
  218. return -ENOMEM;
  219. #endif /* CONFIG_PROC_FS */
  220. pr_notice("Registering SWP/SWPB emulation handler\n");
  221. register_undef_hook(&swp_hook);
  222. return 0;
  223. }
  224. late_initcall(swp_emulation_init);