init.c 15 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 2000 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  9. * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
  10. */
  11. #include <linux/bug.h>
  12. #include <linux/init.h>
  13. #include <linux/export.h>
  14. #include <linux/signal.h>
  15. #include <linux/sched.h>
  16. #include <linux/smp.h>
  17. #include <linux/kernel.h>
  18. #include <linux/errno.h>
  19. #include <linux/string.h>
  20. #include <linux/types.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/mman.h>
  24. #include <linux/mm.h>
  25. #include <linux/memblock.h>
  26. #include <linux/highmem.h>
  27. #include <linux/swap.h>
  28. #include <linux/proc_fs.h>
  29. #include <linux/pfn.h>
  30. #include <linux/hardirq.h>
  31. #include <linux/gfp.h>
  32. #include <linux/kcore.h>
  33. #include <linux/initrd.h>
  34. #include <linux/execmem.h>
  35. #include <asm/bootinfo.h>
  36. #include <asm/cachectl.h>
  37. #include <asm/cpu.h>
  38. #include <asm/dma.h>
  39. #include <asm/maar.h>
  40. #include <asm/mmu_context.h>
  41. #include <asm/mmzone.h>
  42. #include <asm/sections.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/tlb.h>
  45. #include <asm/fixmap.h>
  46. /*
  47. * We have up to 8 empty zeroed pages so we can map one of the right colour
  48. * when needed. This is necessary only on R4000 / R4400 SC and MC versions
  49. * where we have to avoid VCED / VECI exceptions for good performance at
  50. * any price. Since page is never written to after the initialization we
  51. * don't have to care about aliases on other CPUs.
  52. */
  53. unsigned long empty_zero_page, zero_page_mask;
  54. EXPORT_SYMBOL_GPL(empty_zero_page);
  55. EXPORT_SYMBOL(zero_page_mask);
  56. /*
  57. * Not static inline because used by IP27 special magic initialization code
  58. */
  59. void setup_zero_pages(void)
  60. {
  61. unsigned int order, i;
  62. struct page *page;
  63. if (cpu_has_vce)
  64. order = 3;
  65. else
  66. order = 0;
  67. empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
  68. if (!empty_zero_page)
  69. panic("Oh boy, that early out of memory?");
  70. page = virt_to_page((void *)empty_zero_page);
  71. split_page(page, order);
  72. for (i = 0; i < (1 << order); i++, page++)
  73. mark_page_reserved(page);
  74. zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
  75. }
  76. static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
  77. {
  78. enum fixed_addresses idx;
  79. unsigned int old_mmid;
  80. unsigned long vaddr, flags, entrylo;
  81. unsigned long old_ctx;
  82. pte_t pte;
  83. int tlbidx;
  84. BUG_ON(folio_test_dcache_dirty(page_folio(page)));
  85. preempt_disable();
  86. pagefault_disable();
  87. idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
  88. idx += in_interrupt() ? FIX_N_COLOURS : 0;
  89. vaddr = __fix_to_virt(FIX_CMAP_END - idx);
  90. pte = mk_pte(page, prot);
  91. #if defined(CONFIG_XPA)
  92. entrylo = pte_to_entrylo(pte.pte_high);
  93. #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
  94. entrylo = pte.pte_high;
  95. #else
  96. entrylo = pte_to_entrylo(pte_val(pte));
  97. #endif
  98. local_irq_save(flags);
  99. old_ctx = read_c0_entryhi();
  100. write_c0_entryhi(vaddr & (PAGE_MASK << 1));
  101. write_c0_entrylo0(entrylo);
  102. write_c0_entrylo1(entrylo);
  103. if (cpu_has_mmid) {
  104. old_mmid = read_c0_memorymapid();
  105. write_c0_memorymapid(MMID_KERNEL_WIRED);
  106. }
  107. #ifdef CONFIG_XPA
  108. if (cpu_has_xpa) {
  109. entrylo = (pte.pte_low & _PFNX_MASK);
  110. writex_c0_entrylo0(entrylo);
  111. writex_c0_entrylo1(entrylo);
  112. }
  113. #endif
  114. tlbidx = num_wired_entries();
  115. write_c0_wired(tlbidx + 1);
  116. write_c0_index(tlbidx);
  117. mtc0_tlbw_hazard();
  118. tlb_write_indexed();
  119. tlbw_use_hazard();
  120. write_c0_entryhi(old_ctx);
  121. if (cpu_has_mmid)
  122. write_c0_memorymapid(old_mmid);
  123. local_irq_restore(flags);
  124. return (void*) vaddr;
  125. }
  126. void *kmap_coherent(struct page *page, unsigned long addr)
  127. {
  128. return __kmap_pgprot(page, addr, PAGE_KERNEL);
  129. }
  130. void *kmap_noncoherent(struct page *page, unsigned long addr)
  131. {
  132. return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);
  133. }
  134. void kunmap_coherent(void)
  135. {
  136. unsigned int wired;
  137. unsigned long flags, old_ctx;
  138. local_irq_save(flags);
  139. old_ctx = read_c0_entryhi();
  140. wired = num_wired_entries() - 1;
  141. write_c0_wired(wired);
  142. write_c0_index(wired);
  143. write_c0_entryhi(UNIQUE_ENTRYHI(wired));
  144. write_c0_entrylo0(0);
  145. write_c0_entrylo1(0);
  146. mtc0_tlbw_hazard();
  147. tlb_write_indexed();
  148. tlbw_use_hazard();
  149. write_c0_entryhi(old_ctx);
  150. local_irq_restore(flags);
  151. pagefault_enable();
  152. preempt_enable();
  153. }
  154. void copy_user_highpage(struct page *to, struct page *from,
  155. unsigned long vaddr, struct vm_area_struct *vma)
  156. {
  157. struct folio *src = page_folio(from);
  158. void *vfrom, *vto;
  159. vto = kmap_atomic(to);
  160. if (cpu_has_dc_aliases &&
  161. folio_mapped(src) && !folio_test_dcache_dirty(src)) {
  162. vfrom = kmap_coherent(from, vaddr);
  163. copy_page(vto, vfrom);
  164. kunmap_coherent();
  165. } else {
  166. vfrom = kmap_atomic(from);
  167. copy_page(vto, vfrom);
  168. kunmap_atomic(vfrom);
  169. }
  170. if ((!cpu_has_ic_fills_f_dc) ||
  171. pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
  172. flush_data_cache_page((unsigned long)vto);
  173. kunmap_atomic(vto);
  174. /* Make sure this page is cleared on other CPU's too before using it */
  175. smp_wmb();
  176. }
  177. void copy_to_user_page(struct vm_area_struct *vma,
  178. struct page *page, unsigned long vaddr, void *dst, const void *src,
  179. unsigned long len)
  180. {
  181. struct folio *folio = page_folio(page);
  182. if (cpu_has_dc_aliases &&
  183. folio_mapped(folio) && !folio_test_dcache_dirty(folio)) {
  184. void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
  185. memcpy(vto, src, len);
  186. kunmap_coherent();
  187. } else {
  188. memcpy(dst, src, len);
  189. if (cpu_has_dc_aliases)
  190. folio_set_dcache_dirty(folio);
  191. }
  192. if (vma->vm_flags & VM_EXEC)
  193. flush_cache_page(vma, vaddr, page_to_pfn(page));
  194. }
  195. void copy_from_user_page(struct vm_area_struct *vma,
  196. struct page *page, unsigned long vaddr, void *dst, const void *src,
  197. unsigned long len)
  198. {
  199. struct folio *folio = page_folio(page);
  200. if (cpu_has_dc_aliases &&
  201. folio_mapped(folio) && !folio_test_dcache_dirty(folio)) {
  202. void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
  203. memcpy(dst, vfrom, len);
  204. kunmap_coherent();
  205. } else {
  206. memcpy(dst, src, len);
  207. if (cpu_has_dc_aliases)
  208. folio_set_dcache_dirty(folio);
  209. }
  210. }
  211. EXPORT_SYMBOL_GPL(copy_from_user_page);
  212. void __init fixrange_init(unsigned long start, unsigned long end,
  213. pgd_t *pgd_base)
  214. {
  215. #ifdef CONFIG_HIGHMEM
  216. pgd_t *pgd;
  217. pud_t *pud;
  218. pmd_t *pmd;
  219. pte_t *pte;
  220. int i, j, k;
  221. unsigned long vaddr;
  222. vaddr = start;
  223. i = pgd_index(vaddr);
  224. j = pud_index(vaddr);
  225. k = pmd_index(vaddr);
  226. pgd = pgd_base + i;
  227. for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
  228. pud = (pud_t *)pgd;
  229. for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
  230. pmd = (pmd_t *)pud;
  231. for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
  232. if (pmd_none(*pmd)) {
  233. pte = (pte_t *) memblock_alloc_low(PAGE_SIZE,
  234. PAGE_SIZE);
  235. if (!pte)
  236. panic("%s: Failed to allocate %lu bytes align=%lx\n",
  237. __func__, PAGE_SIZE,
  238. PAGE_SIZE);
  239. set_pmd(pmd, __pmd((unsigned long)pte));
  240. BUG_ON(pte != pte_offset_kernel(pmd, 0));
  241. }
  242. vaddr += PMD_SIZE;
  243. }
  244. k = 0;
  245. }
  246. j = 0;
  247. }
  248. #endif
  249. }
  250. struct maar_walk_info {
  251. struct maar_config cfg[16];
  252. unsigned int num_cfg;
  253. };
  254. static int maar_res_walk(unsigned long start_pfn, unsigned long nr_pages,
  255. void *data)
  256. {
  257. struct maar_walk_info *wi = data;
  258. struct maar_config *cfg = &wi->cfg[wi->num_cfg];
  259. unsigned int maar_align;
  260. /* MAAR registers hold physical addresses right shifted by 4 bits */
  261. maar_align = BIT(MIPS_MAAR_ADDR_SHIFT + 4);
  262. /* Fill in the MAAR config entry */
  263. cfg->lower = ALIGN(PFN_PHYS(start_pfn), maar_align);
  264. cfg->upper = ALIGN_DOWN(PFN_PHYS(start_pfn + nr_pages), maar_align) - 1;
  265. cfg->attrs = MIPS_MAAR_S;
  266. /* Ensure we don't overflow the cfg array */
  267. if (!WARN_ON(wi->num_cfg >= ARRAY_SIZE(wi->cfg)))
  268. wi->num_cfg++;
  269. return 0;
  270. }
  271. unsigned __weak platform_maar_init(unsigned num_pairs)
  272. {
  273. unsigned int num_configured;
  274. struct maar_walk_info wi;
  275. wi.num_cfg = 0;
  276. walk_system_ram_range(0, max_pfn, &wi, maar_res_walk);
  277. num_configured = maar_config(wi.cfg, wi.num_cfg, num_pairs);
  278. if (num_configured < wi.num_cfg)
  279. pr_warn("Not enough MAAR pairs (%u) for all memory regions (%u)\n",
  280. num_pairs, wi.num_cfg);
  281. return num_configured;
  282. }
  283. void maar_init(void)
  284. {
  285. unsigned num_maars, used, i;
  286. phys_addr_t lower, upper, attr;
  287. static struct {
  288. struct maar_config cfgs[3];
  289. unsigned used;
  290. } recorded = { { { 0 } }, 0 };
  291. if (!cpu_has_maar)
  292. return;
  293. /* Detect the number of MAARs */
  294. write_c0_maari(~0);
  295. back_to_back_c0_hazard();
  296. num_maars = read_c0_maari() + 1;
  297. /* MAARs should be in pairs */
  298. WARN_ON(num_maars % 2);
  299. /* Set MAARs using values we recorded already */
  300. if (recorded.used) {
  301. used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
  302. BUG_ON(used != recorded.used);
  303. } else {
  304. /* Configure the required MAARs */
  305. used = platform_maar_init(num_maars / 2);
  306. }
  307. /* Disable any further MAARs */
  308. for (i = (used * 2); i < num_maars; i++) {
  309. write_c0_maari(i);
  310. back_to_back_c0_hazard();
  311. write_c0_maar(0);
  312. back_to_back_c0_hazard();
  313. }
  314. if (recorded.used)
  315. return;
  316. pr_info("MAAR configuration:\n");
  317. for (i = 0; i < num_maars; i += 2) {
  318. write_c0_maari(i);
  319. back_to_back_c0_hazard();
  320. upper = read_c0_maar();
  321. #ifdef CONFIG_XPA
  322. upper |= (phys_addr_t)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT;
  323. #endif
  324. write_c0_maari(i + 1);
  325. back_to_back_c0_hazard();
  326. lower = read_c0_maar();
  327. #ifdef CONFIG_XPA
  328. lower |= (phys_addr_t)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT;
  329. #endif
  330. attr = lower & upper;
  331. lower = (lower & MIPS_MAAR_ADDR) << 4;
  332. upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
  333. pr_info(" [%d]: ", i / 2);
  334. if ((attr & MIPS_MAAR_V) != MIPS_MAAR_V) {
  335. pr_cont("disabled\n");
  336. continue;
  337. }
  338. pr_cont("%pa-%pa", &lower, &upper);
  339. if (attr & MIPS_MAAR_S)
  340. pr_cont(" speculate");
  341. pr_cont("\n");
  342. /* Record the setup for use on secondary CPUs */
  343. if (used <= ARRAY_SIZE(recorded.cfgs)) {
  344. recorded.cfgs[recorded.used].lower = lower;
  345. recorded.cfgs[recorded.used].upper = upper;
  346. recorded.cfgs[recorded.used].attrs = attr;
  347. recorded.used++;
  348. }
  349. }
  350. }
  351. #ifndef CONFIG_NUMA
  352. void __init paging_init(void)
  353. {
  354. unsigned long max_zone_pfns[MAX_NR_ZONES];
  355. pagetable_init();
  356. #ifdef CONFIG_ZONE_DMA
  357. max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
  358. #endif
  359. #ifdef CONFIG_ZONE_DMA32
  360. max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
  361. #endif
  362. max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
  363. #ifdef CONFIG_HIGHMEM
  364. max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
  365. if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
  366. printk(KERN_WARNING "This processor doesn't support highmem."
  367. " %ldk highmem ignored\n",
  368. (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
  369. max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
  370. max_mapnr = max_low_pfn;
  371. } else if (highend_pfn) {
  372. max_mapnr = highend_pfn;
  373. } else {
  374. max_mapnr = max_low_pfn;
  375. }
  376. #else
  377. max_mapnr = max_low_pfn;
  378. #endif
  379. high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
  380. free_area_init(max_zone_pfns);
  381. }
  382. #ifdef CONFIG_64BIT
  383. static struct kcore_list kcore_kseg0;
  384. #endif
  385. static inline void __init mem_init_free_highmem(void)
  386. {
  387. #ifdef CONFIG_HIGHMEM
  388. unsigned long tmp;
  389. if (cpu_has_dc_aliases)
  390. return;
  391. for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
  392. struct page *page = pfn_to_page(tmp);
  393. if (!memblock_is_memory(PFN_PHYS(tmp)))
  394. SetPageReserved(page);
  395. else
  396. free_highmem_page(page);
  397. }
  398. #endif
  399. }
  400. void __init mem_init(void)
  401. {
  402. /*
  403. * When PFN_PTE_SHIFT is greater than PAGE_SHIFT we won't have enough PTE
  404. * bits to hold a full 32b physical address on MIPS32 systems.
  405. */
  406. BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT) && (PFN_PTE_SHIFT > PAGE_SHIFT));
  407. maar_init();
  408. memblock_free_all();
  409. setup_zero_pages(); /* Setup zeroed pages. */
  410. mem_init_free_highmem();
  411. #ifdef CONFIG_64BIT
  412. if ((unsigned long) &_text > (unsigned long) CKSEG0)
  413. /* The -4 is a hack so that user tools don't have to handle
  414. the overflow. */
  415. kclist_add(&kcore_kseg0, (void *) CKSEG0,
  416. 0x80000000 - 4, KCORE_TEXT);
  417. #endif
  418. }
  419. #endif /* !CONFIG_NUMA */
  420. void free_init_pages(const char *what, unsigned long begin, unsigned long end)
  421. {
  422. unsigned long pfn;
  423. for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
  424. struct page *page = pfn_to_page(pfn);
  425. void *addr = phys_to_virt(PFN_PHYS(pfn));
  426. memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
  427. free_reserved_page(page);
  428. }
  429. printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
  430. }
  431. void (*free_init_pages_eva)(void *begin, void *end) = NULL;
  432. void __weak __init prom_free_prom_memory(void)
  433. {
  434. /* nothing to do */
  435. }
  436. void __ref free_initmem(void)
  437. {
  438. prom_free_prom_memory();
  439. /*
  440. * Let the platform define a specific function to free the
  441. * init section since EVA may have used any possible mapping
  442. * between virtual and physical addresses.
  443. */
  444. if (free_init_pages_eva)
  445. free_init_pages_eva((void *)&__init_begin, (void *)&__init_end);
  446. else
  447. free_initmem_default(POISON_FREE_INITMEM);
  448. }
  449. #ifdef CONFIG_HAVE_SETUP_PER_CPU_AREA
  450. unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
  451. EXPORT_SYMBOL(__per_cpu_offset);
  452. static int __init pcpu_cpu_distance(unsigned int from, unsigned int to)
  453. {
  454. return node_distance(cpu_to_node(from), cpu_to_node(to));
  455. }
  456. static int __init pcpu_cpu_to_node(int cpu)
  457. {
  458. return cpu_to_node(cpu);
  459. }
  460. void __init setup_per_cpu_areas(void)
  461. {
  462. unsigned long delta;
  463. unsigned int cpu;
  464. int rc;
  465. /*
  466. * Always reserve area for module percpu variables. That's
  467. * what the legacy allocator did.
  468. */
  469. rc = pcpu_embed_first_chunk(PERCPU_MODULE_RESERVE,
  470. PERCPU_DYNAMIC_RESERVE, PAGE_SIZE,
  471. pcpu_cpu_distance,
  472. pcpu_cpu_to_node);
  473. if (rc < 0)
  474. panic("Failed to initialize percpu areas.");
  475. delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
  476. for_each_possible_cpu(cpu)
  477. __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
  478. }
  479. #endif
  480. #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
  481. unsigned long pgd_current[NR_CPUS];
  482. #endif
  483. /*
  484. * Align swapper_pg_dir in to 64K, allows its address to be loaded
  485. * with a single LUI instruction in the TLB handlers. If we used
  486. * __aligned(64K), its size would get rounded up to the alignment
  487. * size, and waste space. So we place it in its own section and align
  488. * it in the linker script.
  489. */
  490. pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(".bss..swapper_pg_dir");
  491. #ifndef __PAGETABLE_PUD_FOLDED
  492. pud_t invalid_pud_table[PTRS_PER_PUD] __page_aligned_bss;
  493. #endif
  494. #ifndef __PAGETABLE_PMD_FOLDED
  495. pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
  496. EXPORT_SYMBOL_GPL(invalid_pmd_table);
  497. #endif
  498. pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
  499. EXPORT_SYMBOL(invalid_pte_table);
  500. #ifdef CONFIG_EXECMEM
  501. #ifdef MODULES_VADDR
  502. static struct execmem_info execmem_info __ro_after_init;
  503. struct execmem_info __init *execmem_arch_setup(void)
  504. {
  505. execmem_info = (struct execmem_info){
  506. .ranges = {
  507. [EXECMEM_DEFAULT] = {
  508. .start = MODULES_VADDR,
  509. .end = MODULES_END,
  510. .pgprot = PAGE_KERNEL,
  511. .alignment = 1,
  512. },
  513. },
  514. };
  515. return &execmem_info;
  516. }
  517. #endif
  518. #endif /* CONFIG_EXECMEM */