aes-riscv64-zvkned-zvkb.S 4.7 KB

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  1. /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
  2. //
  3. // This file is dual-licensed, meaning that you can use it under your
  4. // choice of either of the following two licenses:
  5. //
  6. // Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
  7. //
  8. // Licensed under the Apache License 2.0 (the "License"). You can obtain
  9. // a copy in the file LICENSE in the source distribution or at
  10. // https://www.openssl.org/source/license.html
  11. //
  12. // or
  13. //
  14. // Copyright (c) 2023, Jerry Shih <jerry.shih@sifive.com>
  15. // Copyright 2024 Google LLC
  16. // All rights reserved.
  17. //
  18. // Redistribution and use in source and binary forms, with or without
  19. // modification, are permitted provided that the following conditions
  20. // are met:
  21. // 1. Redistributions of source code must retain the above copyright
  22. // notice, this list of conditions and the following disclaimer.
  23. // 2. Redistributions in binary form must reproduce the above copyright
  24. // notice, this list of conditions and the following disclaimer in the
  25. // documentation and/or other materials provided with the distribution.
  26. //
  27. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  30. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  32. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  33. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  34. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  35. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  36. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  37. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. // The generated code of this file depends on the following RISC-V extensions:
  39. // - RV64I
  40. // - RISC-V Vector ('V') with VLEN >= 128
  41. // - RISC-V Vector AES block cipher extension ('Zvkned')
  42. // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
  43. #include <linux/linkage.h>
  44. .text
  45. .option arch, +zvkned, +zvkb
  46. #include "aes-macros.S"
  47. #define KEYP a0
  48. #define INP a1
  49. #define OUTP a2
  50. #define LEN a3
  51. #define IVP a4
  52. #define LEN32 a5
  53. #define VL_E32 a6
  54. #define VL_BLOCKS a7
  55. .macro aes_ctr32_crypt keylen
  56. // LEN32 = number of blocks, rounded up, in 32-bit words.
  57. addi t0, LEN, 15
  58. srli t0, t0, 4
  59. slli LEN32, t0, 2
  60. // Create a mask that selects the last 32-bit word of each 128-bit
  61. // block. This is the word that contains the (big-endian) counter.
  62. li t0, 0x88
  63. vsetvli t1, zero, e8, m1, ta, ma
  64. vmv.v.x v0, t0
  65. // Load the IV into v31. The last 32-bit word contains the counter.
  66. vsetivli zero, 4, e32, m1, ta, ma
  67. vle32.v v31, (IVP)
  68. // Convert the big-endian counter into little-endian.
  69. vsetivli zero, 4, e32, m1, ta, mu
  70. vrev8.v v31, v31, v0.t
  71. // Splat the IV to v16 (with LMUL=4). The number of copies is the
  72. // maximum number of blocks that will be processed per iteration.
  73. vsetvli zero, LEN32, e32, m4, ta, ma
  74. vmv.v.i v16, 0
  75. vaesz.vs v16, v31
  76. // v20 = [x, x, x, 0, x, x, x, 1, ...]
  77. viota.m v20, v0, v0.t
  78. // v16 = [IV0, IV1, IV2, counter+0, IV0, IV1, IV2, counter+1, ...]
  79. vsetvli VL_E32, LEN32, e32, m4, ta, mu
  80. vadd.vv v16, v16, v20, v0.t
  81. j 2f
  82. 1:
  83. // Set the number of blocks to process in this iteration. vl=VL_E32 is
  84. // the length in 32-bit words, i.e. 4 times the number of blocks.
  85. vsetvli VL_E32, LEN32, e32, m4, ta, mu
  86. // Increment the counters by the number of blocks processed in the
  87. // previous iteration.
  88. vadd.vx v16, v16, VL_BLOCKS, v0.t
  89. 2:
  90. // Prepare the AES inputs into v24.
  91. vmv.v.v v24, v16
  92. vrev8.v v24, v24, v0.t // Convert counters back to big-endian.
  93. // Encrypt the AES inputs to create the next portion of the keystream.
  94. aes_encrypt v24, \keylen
  95. // XOR the data with the keystream.
  96. vsetvli t0, LEN, e8, m4, ta, ma
  97. vle8.v v20, (INP)
  98. vxor.vv v20, v20, v24
  99. vse8.v v20, (OUTP)
  100. // Advance the pointers and update the remaining length.
  101. add INP, INP, t0
  102. add OUTP, OUTP, t0
  103. sub LEN, LEN, t0
  104. sub LEN32, LEN32, VL_E32
  105. srli VL_BLOCKS, VL_E32, 2
  106. // Repeat if more data remains.
  107. bnez LEN, 1b
  108. // Update *IVP to contain the next counter.
  109. vsetivli zero, 4, e32, m1, ta, mu
  110. vadd.vx v16, v16, VL_BLOCKS, v0.t
  111. vrev8.v v16, v16, v0.t // Convert counters back to big-endian.
  112. vse32.v v16, (IVP)
  113. ret
  114. .endm
  115. // void aes_ctr32_crypt_zvkned_zvkb(const struct crypto_aes_ctx *key,
  116. // const u8 *in, u8 *out, size_t len,
  117. // u8 iv[16]);
  118. SYM_FUNC_START(aes_ctr32_crypt_zvkned_zvkb)
  119. aes_begin KEYP, 128f, 192f
  120. aes_ctr32_crypt 256
  121. 128:
  122. aes_ctr32_crypt 128
  123. 192:
  124. aes_ctr32_crypt 192
  125. SYM_FUNC_END(aes_ctr32_crypt_zvkned_zvkb)