smp.c 13 KB

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  1. /*
  2. * Xtensa SMP support functions.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2008 - 2013 Tensilica Inc.
  9. *
  10. * Chris Zankel <chris@zankel.net>
  11. * Joe Taylor <joe@tensilica.com>
  12. * Pete Delaney <piet@tensilica.com
  13. */
  14. #include <linux/cpu.h>
  15. #include <linux/cpumask.h>
  16. #include <linux/delay.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/irqdomain.h>
  20. #include <linux/irq.h>
  21. #include <linux/kdebug.h>
  22. #include <linux/module.h>
  23. #include <linux/profile.h>
  24. #include <linux/sched/mm.h>
  25. #include <linux/sched/hotplug.h>
  26. #include <linux/sched/task_stack.h>
  27. #include <linux/reboot.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/smp.h>
  30. #include <linux/thread_info.h>
  31. #include <asm/cacheflush.h>
  32. #include <asm/coprocessor.h>
  33. #include <asm/kdebug.h>
  34. #include <asm/mmu_context.h>
  35. #include <asm/mxregs.h>
  36. #include <asm/platform.h>
  37. #include <asm/tlbflush.h>
  38. #include <asm/traps.h>
  39. #ifdef CONFIG_SMP
  40. # if XCHAL_HAVE_S32C1I == 0
  41. # error "The S32C1I option is required for SMP."
  42. # endif
  43. #endif
  44. static void system_invalidate_dcache_range(unsigned long start,
  45. unsigned long size);
  46. static void system_flush_invalidate_dcache_range(unsigned long start,
  47. unsigned long size);
  48. /* IPI (Inter Process Interrupt) */
  49. #define IPI_IRQ 0
  50. static irqreturn_t ipi_interrupt(int irq, void *dev_id);
  51. void ipi_init(void)
  52. {
  53. unsigned irq = irq_create_mapping(NULL, IPI_IRQ);
  54. if (request_irq(irq, ipi_interrupt, IRQF_PERCPU, "ipi", NULL))
  55. pr_err("Failed to request irq %u (ipi)\n", irq);
  56. }
  57. static inline unsigned int get_core_count(void)
  58. {
  59. /* Bits 18..21 of SYSCFGID contain the core count minus 1. */
  60. unsigned int syscfgid = get_er(SYSCFGID);
  61. return ((syscfgid >> 18) & 0xf) + 1;
  62. }
  63. static inline int get_core_id(void)
  64. {
  65. /* Bits 0...18 of SYSCFGID contain the core id */
  66. unsigned int core_id = get_er(SYSCFGID);
  67. return core_id & 0x3fff;
  68. }
  69. void __init smp_prepare_cpus(unsigned int max_cpus)
  70. {
  71. unsigned i;
  72. for_each_possible_cpu(i)
  73. set_cpu_present(i, true);
  74. }
  75. void __init smp_init_cpus(void)
  76. {
  77. unsigned i;
  78. unsigned int ncpus = get_core_count();
  79. unsigned int core_id = get_core_id();
  80. pr_info("%s: Core Count = %d\n", __func__, ncpus);
  81. pr_info("%s: Core Id = %d\n", __func__, core_id);
  82. if (ncpus > NR_CPUS) {
  83. ncpus = NR_CPUS;
  84. pr_info("%s: limiting core count by %d\n", __func__, ncpus);
  85. }
  86. for (i = 0; i < ncpus; ++i)
  87. set_cpu_possible(i, true);
  88. }
  89. void __init smp_prepare_boot_cpu(void)
  90. {
  91. unsigned int cpu = smp_processor_id();
  92. BUG_ON(cpu != 0);
  93. cpu_asid_cache(cpu) = ASID_USER_FIRST;
  94. }
  95. void __init smp_cpus_done(unsigned int max_cpus)
  96. {
  97. }
  98. static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */
  99. static DECLARE_COMPLETION(cpu_running);
  100. void secondary_start_kernel(void)
  101. {
  102. struct mm_struct *mm = &init_mm;
  103. unsigned int cpu = smp_processor_id();
  104. init_mmu();
  105. #ifdef CONFIG_DEBUG_MISC
  106. if (boot_secondary_processors == 0) {
  107. pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n",
  108. __func__, boot_secondary_processors, cpu);
  109. for (;;)
  110. __asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL));
  111. }
  112. pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n",
  113. __func__, boot_secondary_processors, cpu);
  114. #endif
  115. /* Init EXCSAVE1 */
  116. secondary_trap_init();
  117. /* All kernel threads share the same mm context. */
  118. mmget(mm);
  119. mmgrab(mm);
  120. current->active_mm = mm;
  121. cpumask_set_cpu(cpu, mm_cpumask(mm));
  122. enter_lazy_tlb(mm, current);
  123. trace_hardirqs_off();
  124. calibrate_delay();
  125. notify_cpu_starting(cpu);
  126. secondary_init_irq();
  127. local_timer_setup(cpu);
  128. set_cpu_online(cpu, true);
  129. local_irq_enable();
  130. complete(&cpu_running);
  131. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  132. }
  133. static void mx_cpu_start(void *p)
  134. {
  135. unsigned cpu = (unsigned)p;
  136. unsigned long run_stall_mask = get_er(MPSCORE);
  137. set_er(run_stall_mask & ~(1u << cpu), MPSCORE);
  138. pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
  139. __func__, cpu, run_stall_mask, get_er(MPSCORE));
  140. }
  141. static void mx_cpu_stop(void *p)
  142. {
  143. unsigned cpu = (unsigned)p;
  144. unsigned long run_stall_mask = get_er(MPSCORE);
  145. set_er(run_stall_mask | (1u << cpu), MPSCORE);
  146. pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
  147. __func__, cpu, run_stall_mask, get_er(MPSCORE));
  148. }
  149. #ifdef CONFIG_HOTPLUG_CPU
  150. unsigned long cpu_start_id __cacheline_aligned;
  151. #endif
  152. unsigned long cpu_start_ccount;
  153. static int boot_secondary(unsigned int cpu, struct task_struct *ts)
  154. {
  155. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  156. unsigned long ccount;
  157. int i;
  158. #ifdef CONFIG_HOTPLUG_CPU
  159. WRITE_ONCE(cpu_start_id, cpu);
  160. /* Pairs with the third memw in the cpu_restart */
  161. mb();
  162. system_flush_invalidate_dcache_range((unsigned long)&cpu_start_id,
  163. sizeof(cpu_start_id));
  164. #endif
  165. smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1);
  166. for (i = 0; i < 2; ++i) {
  167. do
  168. ccount = get_ccount();
  169. while (!ccount);
  170. WRITE_ONCE(cpu_start_ccount, ccount);
  171. do {
  172. /*
  173. * Pairs with the first two memws in the
  174. * .Lboot_secondary.
  175. */
  176. mb();
  177. ccount = READ_ONCE(cpu_start_ccount);
  178. } while (ccount && time_before(jiffies, timeout));
  179. if (ccount) {
  180. smp_call_function_single(0, mx_cpu_stop,
  181. (void *)cpu, 1);
  182. WRITE_ONCE(cpu_start_ccount, 0);
  183. return -EIO;
  184. }
  185. }
  186. return 0;
  187. }
  188. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  189. {
  190. int ret = 0;
  191. if (cpu_asid_cache(cpu) == 0)
  192. cpu_asid_cache(cpu) = ASID_USER_FIRST;
  193. start_info.stack = (unsigned long)task_pt_regs(idle);
  194. wmb();
  195. pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n",
  196. __func__, cpu, idle, start_info.stack);
  197. init_completion(&cpu_running);
  198. ret = boot_secondary(cpu, idle);
  199. if (ret == 0) {
  200. wait_for_completion_timeout(&cpu_running,
  201. msecs_to_jiffies(1000));
  202. if (!cpu_online(cpu))
  203. ret = -EIO;
  204. }
  205. if (ret)
  206. pr_err("CPU %u failed to boot\n", cpu);
  207. return ret;
  208. }
  209. #ifdef CONFIG_HOTPLUG_CPU
  210. /*
  211. * __cpu_disable runs on the processor to be shutdown.
  212. */
  213. int __cpu_disable(void)
  214. {
  215. unsigned int cpu = smp_processor_id();
  216. /*
  217. * Take this CPU offline. Once we clear this, we can't return,
  218. * and we must not schedule until we're ready to give up the cpu.
  219. */
  220. set_cpu_online(cpu, false);
  221. #if XTENSA_HAVE_COPROCESSORS
  222. /*
  223. * Flush coprocessor contexts that are active on the current CPU.
  224. */
  225. local_coprocessors_flush_release_all();
  226. #endif
  227. /*
  228. * OK - migrate IRQs away from this CPU
  229. */
  230. migrate_irqs();
  231. /*
  232. * Flush user cache and TLB mappings, and then remove this CPU
  233. * from the vm mask set of all processes.
  234. */
  235. local_flush_cache_all();
  236. local_flush_tlb_all();
  237. invalidate_page_directory();
  238. clear_tasks_mm_cpumask(cpu);
  239. return 0;
  240. }
  241. static void platform_cpu_kill(unsigned int cpu)
  242. {
  243. smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true);
  244. }
  245. /*
  246. * called on the thread which is asking for a CPU to be shutdown -
  247. * waits until shutdown has completed, or it is timed out.
  248. */
  249. void __cpu_die(unsigned int cpu)
  250. {
  251. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  252. while (time_before(jiffies, timeout)) {
  253. system_invalidate_dcache_range((unsigned long)&cpu_start_id,
  254. sizeof(cpu_start_id));
  255. /* Pairs with the second memw in the cpu_restart */
  256. mb();
  257. if (READ_ONCE(cpu_start_id) == -cpu) {
  258. platform_cpu_kill(cpu);
  259. return;
  260. }
  261. }
  262. pr_err("CPU%u: unable to kill\n", cpu);
  263. }
  264. void __noreturn arch_cpu_idle_dead(void)
  265. {
  266. cpu_die();
  267. }
  268. /*
  269. * Called from the idle thread for the CPU which has been shutdown.
  270. *
  271. * Note that we disable IRQs here, but do not re-enable them
  272. * before returning to the caller. This is also the behaviour
  273. * of the other hotplug-cpu capable cores, so presumably coming
  274. * out of idle fixes this.
  275. */
  276. void __ref cpu_die(void)
  277. {
  278. idle_task_exit();
  279. local_irq_disable();
  280. __asm__ __volatile__(
  281. " movi a2, cpu_restart\n"
  282. " jx a2\n");
  283. BUG();
  284. }
  285. #endif /* CONFIG_HOTPLUG_CPU */
  286. enum ipi_msg_type {
  287. IPI_RESCHEDULE = 0,
  288. IPI_CALL_FUNC,
  289. IPI_CPU_STOP,
  290. IPI_MAX
  291. };
  292. static const struct {
  293. const char *short_text;
  294. const char *long_text;
  295. } ipi_text[] = {
  296. { .short_text = "RES", .long_text = "Rescheduling interrupts" },
  297. { .short_text = "CAL", .long_text = "Function call interrupts" },
  298. { .short_text = "DIE", .long_text = "CPU shutdown interrupts" },
  299. };
  300. struct ipi_data {
  301. unsigned long ipi_count[IPI_MAX];
  302. };
  303. static DEFINE_PER_CPU(struct ipi_data, ipi_data);
  304. static void send_ipi_message(const struct cpumask *callmask,
  305. enum ipi_msg_type msg_id)
  306. {
  307. int index;
  308. unsigned long mask = 0;
  309. for_each_cpu(index, callmask)
  310. mask |= 1 << index;
  311. set_er(mask, MIPISET(msg_id));
  312. }
  313. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  314. {
  315. send_ipi_message(mask, IPI_CALL_FUNC);
  316. }
  317. void arch_send_call_function_single_ipi(int cpu)
  318. {
  319. send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
  320. }
  321. void arch_smp_send_reschedule(int cpu)
  322. {
  323. send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
  324. }
  325. void smp_send_stop(void)
  326. {
  327. struct cpumask targets;
  328. cpumask_copy(&targets, cpu_online_mask);
  329. cpumask_clear_cpu(smp_processor_id(), &targets);
  330. send_ipi_message(&targets, IPI_CPU_STOP);
  331. }
  332. static void ipi_cpu_stop(unsigned int cpu)
  333. {
  334. set_cpu_online(cpu, false);
  335. machine_halt();
  336. }
  337. irqreturn_t ipi_interrupt(int irq, void *dev_id)
  338. {
  339. unsigned int cpu = smp_processor_id();
  340. struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
  341. for (;;) {
  342. unsigned int msg;
  343. msg = get_er(MIPICAUSE(cpu));
  344. set_er(msg, MIPICAUSE(cpu));
  345. if (!msg)
  346. break;
  347. if (msg & (1 << IPI_CALL_FUNC)) {
  348. ++ipi->ipi_count[IPI_CALL_FUNC];
  349. generic_smp_call_function_interrupt();
  350. }
  351. if (msg & (1 << IPI_RESCHEDULE)) {
  352. ++ipi->ipi_count[IPI_RESCHEDULE];
  353. scheduler_ipi();
  354. }
  355. if (msg & (1 << IPI_CPU_STOP)) {
  356. ++ipi->ipi_count[IPI_CPU_STOP];
  357. ipi_cpu_stop(cpu);
  358. }
  359. }
  360. return IRQ_HANDLED;
  361. }
  362. void show_ipi_list(struct seq_file *p, int prec)
  363. {
  364. unsigned int cpu;
  365. unsigned i;
  366. for (i = 0; i < IPI_MAX; ++i) {
  367. seq_printf(p, "%*s:", prec, ipi_text[i].short_text);
  368. for_each_online_cpu(cpu)
  369. seq_printf(p, " %10lu",
  370. per_cpu(ipi_data, cpu).ipi_count[i]);
  371. seq_printf(p, " %s\n", ipi_text[i].long_text);
  372. }
  373. }
  374. int setup_profiling_timer(unsigned int multiplier)
  375. {
  376. pr_debug("setup_profiling_timer %d\n", multiplier);
  377. return 0;
  378. }
  379. /* TLB flush functions */
  380. struct flush_data {
  381. struct vm_area_struct *vma;
  382. unsigned long addr1;
  383. unsigned long addr2;
  384. };
  385. static void ipi_flush_tlb_all(void *arg)
  386. {
  387. local_flush_tlb_all();
  388. }
  389. void flush_tlb_all(void)
  390. {
  391. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  392. }
  393. static void ipi_flush_tlb_mm(void *arg)
  394. {
  395. local_flush_tlb_mm(arg);
  396. }
  397. void flush_tlb_mm(struct mm_struct *mm)
  398. {
  399. on_each_cpu(ipi_flush_tlb_mm, mm, 1);
  400. }
  401. static void ipi_flush_tlb_page(void *arg)
  402. {
  403. struct flush_data *fd = arg;
  404. local_flush_tlb_page(fd->vma, fd->addr1);
  405. }
  406. void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
  407. {
  408. struct flush_data fd = {
  409. .vma = vma,
  410. .addr1 = addr,
  411. };
  412. on_each_cpu(ipi_flush_tlb_page, &fd, 1);
  413. }
  414. static void ipi_flush_tlb_range(void *arg)
  415. {
  416. struct flush_data *fd = arg;
  417. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  418. }
  419. void flush_tlb_range(struct vm_area_struct *vma,
  420. unsigned long start, unsigned long end)
  421. {
  422. struct flush_data fd = {
  423. .vma = vma,
  424. .addr1 = start,
  425. .addr2 = end,
  426. };
  427. on_each_cpu(ipi_flush_tlb_range, &fd, 1);
  428. }
  429. static void ipi_flush_tlb_kernel_range(void *arg)
  430. {
  431. struct flush_data *fd = arg;
  432. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  433. }
  434. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  435. {
  436. struct flush_data fd = {
  437. .addr1 = start,
  438. .addr2 = end,
  439. };
  440. on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
  441. }
  442. /* Cache flush functions */
  443. static void ipi_flush_cache_all(void *arg)
  444. {
  445. local_flush_cache_all();
  446. }
  447. void flush_cache_all(void)
  448. {
  449. on_each_cpu(ipi_flush_cache_all, NULL, 1);
  450. }
  451. static void ipi_flush_cache_page(void *arg)
  452. {
  453. struct flush_data *fd = arg;
  454. local_flush_cache_page(fd->vma, fd->addr1, fd->addr2);
  455. }
  456. void flush_cache_page(struct vm_area_struct *vma,
  457. unsigned long address, unsigned long pfn)
  458. {
  459. struct flush_data fd = {
  460. .vma = vma,
  461. .addr1 = address,
  462. .addr2 = pfn,
  463. };
  464. on_each_cpu(ipi_flush_cache_page, &fd, 1);
  465. }
  466. static void ipi_flush_cache_range(void *arg)
  467. {
  468. struct flush_data *fd = arg;
  469. local_flush_cache_range(fd->vma, fd->addr1, fd->addr2);
  470. }
  471. void flush_cache_range(struct vm_area_struct *vma,
  472. unsigned long start, unsigned long end)
  473. {
  474. struct flush_data fd = {
  475. .vma = vma,
  476. .addr1 = start,
  477. .addr2 = end,
  478. };
  479. on_each_cpu(ipi_flush_cache_range, &fd, 1);
  480. }
  481. static void ipi_flush_icache_range(void *arg)
  482. {
  483. struct flush_data *fd = arg;
  484. local_flush_icache_range(fd->addr1, fd->addr2);
  485. }
  486. void flush_icache_range(unsigned long start, unsigned long end)
  487. {
  488. struct flush_data fd = {
  489. .addr1 = start,
  490. .addr2 = end,
  491. };
  492. on_each_cpu(ipi_flush_icache_range, &fd, 1);
  493. }
  494. EXPORT_SYMBOL(flush_icache_range);
  495. /* ------------------------------------------------------------------------- */
  496. static void ipi_invalidate_dcache_range(void *arg)
  497. {
  498. struct flush_data *fd = arg;
  499. __invalidate_dcache_range(fd->addr1, fd->addr2);
  500. }
  501. static void system_invalidate_dcache_range(unsigned long start,
  502. unsigned long size)
  503. {
  504. struct flush_data fd = {
  505. .addr1 = start,
  506. .addr2 = size,
  507. };
  508. on_each_cpu(ipi_invalidate_dcache_range, &fd, 1);
  509. }
  510. static void ipi_flush_invalidate_dcache_range(void *arg)
  511. {
  512. struct flush_data *fd = arg;
  513. __flush_invalidate_dcache_range(fd->addr1, fd->addr2);
  514. }
  515. static void system_flush_invalidate_dcache_range(unsigned long start,
  516. unsigned long size)
  517. {
  518. struct flush_data fd = {
  519. .addr1 = start,
  520. .addr2 = size,
  521. };
  522. on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1);
  523. }