ahci_octeon.c 2.3 KB

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  1. /*
  2. * SATA glue for Cavium Octeon III SOCs.
  3. *
  4. *
  5. * This file is subject to the terms and conditions of the GNU General Public
  6. * License. See the file "COPYING" in the main directory of this archive
  7. * for more details.
  8. *
  9. * Copyright (C) 2010-2015 Cavium Networks
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/of_platform.h>
  16. #include <asm/octeon/octeon.h>
  17. #define CVMX_SATA_UCTL_SHIM_CFG 0xE8
  18. #define SATA_UCTL_ENDIAN_MODE_BIG 1
  19. #define SATA_UCTL_ENDIAN_MODE_LITTLE 0
  20. #define SATA_UCTL_ENDIAN_MODE_MASK 3
  21. #define SATA_UCTL_DMA_ENDIAN_MODE_SHIFT 8
  22. #define SATA_UCTL_CSR_ENDIAN_MODE_SHIFT 0
  23. #define SATA_UCTL_DMA_READ_CMD_SHIFT 12
  24. static int ahci_octeon_probe(struct platform_device *pdev)
  25. {
  26. struct device *dev = &pdev->dev;
  27. struct device_node *node = dev->of_node;
  28. void __iomem *base;
  29. u64 cfg;
  30. int ret;
  31. base = devm_platform_ioremap_resource(pdev, 0);
  32. if (IS_ERR(base))
  33. return PTR_ERR(base);
  34. cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG);
  35. cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT);
  36. cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT);
  37. #ifdef __BIG_ENDIAN
  38. cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
  39. cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
  40. #else
  41. cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
  42. cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
  43. #endif
  44. cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT;
  45. cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg);
  46. if (!node) {
  47. dev_err(dev, "no device node, failed to add octeon sata\n");
  48. return -ENODEV;
  49. }
  50. ret = of_platform_populate(node, NULL, NULL, dev);
  51. if (ret) {
  52. dev_err(dev, "failed to add ahci-platform core\n");
  53. return ret;
  54. }
  55. return 0;
  56. }
  57. static const struct of_device_id octeon_ahci_match[] = {
  58. { .compatible = "cavium,octeon-7130-sata-uctl", },
  59. { /* sentinel */ }
  60. };
  61. MODULE_DEVICE_TABLE(of, octeon_ahci_match);
  62. static struct platform_driver ahci_octeon_driver = {
  63. .probe = ahci_octeon_probe,
  64. .driver = {
  65. .name = "octeon-ahci",
  66. .of_match_table = octeon_ahci_match,
  67. },
  68. };
  69. module_platform_driver(ahci_octeon_driver);
  70. MODULE_LICENSE("GPL");
  71. MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>");
  72. MODULE_DESCRIPTION("Cavium Inc. sata config.");