tpm_tis_i2c_cr50.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2020 Google Inc.
  4. *
  5. * Based on Infineon TPM driver by Peter Huewe.
  6. *
  7. * cr50 is a firmware for H1 secure modules that requires special
  8. * handling for the I2C interface.
  9. *
  10. * - Use an interrupt for transaction status instead of hardcoded delays.
  11. * - Must use write+wait+read read protocol.
  12. * - All 4 bytes of status register must be read/written at once.
  13. * - Burst count max is 63 bytes, and burst count behaves slightly differently
  14. * than other I2C TPMs.
  15. * - When reading from FIFO the full burstcnt must be read instead of just
  16. * reading header and determining the remainder.
  17. */
  18. #include <linux/acpi.h>
  19. #include <linux/completion.h>
  20. #include <linux/i2c.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/module.h>
  23. #include <linux/pm.h>
  24. #include <linux/slab.h>
  25. #include <linux/wait.h>
  26. #include "tpm_tis_core.h"
  27. #define TPM_CR50_MAX_BUFSIZE 64
  28. #define TPM_CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */
  29. #define TPM_CR50_TIMEOUT_NOIRQ_MS 20 /* Timeout for TPM ready without IRQ */
  30. #define TPM_CR50_I2C_DID_VID 0x00281ae0L /* Device and vendor ID reg value */
  31. #define TPM_TI50_I2C_DID_VID 0x504a6666L /* Device and vendor ID reg value */
  32. #define TPM_CR50_I2C_MAX_RETRIES 3 /* Max retries due to I2C errors */
  33. #define TPM_CR50_I2C_RETRY_DELAY_LO 55 /* Min usecs between retries on I2C */
  34. #define TPM_CR50_I2C_RETRY_DELAY_HI 65 /* Max usecs between retries on I2C */
  35. #define TPM_I2C_ACCESS(l) (0x0000 | ((l) << 4))
  36. #define TPM_I2C_STS(l) (0x0001 | ((l) << 4))
  37. #define TPM_I2C_DATA_FIFO(l) (0x0005 | ((l) << 4))
  38. #define TPM_I2C_DID_VID(l) (0x0006 | ((l) << 4))
  39. /**
  40. * struct tpm_i2c_cr50_priv_data - Driver private data.
  41. * @irq: Irq number used for this chip.
  42. * If irq <= 0, then a fixed timeout is used instead of waiting for irq.
  43. * @tpm_ready: Struct used by irq handler to signal R/W readiness.
  44. * @buf: Buffer used for i2c writes, with i2c address prepended to content.
  45. *
  46. * Private driver struct used by kernel threads and interrupt context.
  47. */
  48. struct tpm_i2c_cr50_priv_data {
  49. int irq;
  50. struct completion tpm_ready;
  51. u8 buf[TPM_CR50_MAX_BUFSIZE];
  52. };
  53. /**
  54. * tpm_cr50_i2c_int_handler() - cr50 interrupt handler.
  55. * @dummy: Unused parameter.
  56. * @tpm_info: TPM chip information.
  57. *
  58. * The cr50 interrupt handler signals waiting threads that the
  59. * interrupt has been asserted. It does not do any interrupt triggered
  60. * processing but is instead used to avoid fixed delays.
  61. *
  62. * Return:
  63. * IRQ_HANDLED signifies irq was handled by this device.
  64. */
  65. static irqreturn_t tpm_cr50_i2c_int_handler(int dummy, void *tpm_info)
  66. {
  67. struct tpm_chip *chip = tpm_info;
  68. struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);
  69. complete(&priv->tpm_ready);
  70. return IRQ_HANDLED;
  71. }
  72. /**
  73. * tpm_cr50_i2c_wait_tpm_ready() - Wait for tpm to signal ready.
  74. * @chip: A TPM chip.
  75. *
  76. * Wait for completion interrupt if available, otherwise use a fixed
  77. * delay for the TPM to be ready.
  78. *
  79. * Return:
  80. * - 0: Success.
  81. * - -errno: A POSIX error code.
  82. */
  83. static int tpm_cr50_i2c_wait_tpm_ready(struct tpm_chip *chip)
  84. {
  85. struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);
  86. /* Use a safe fixed delay if interrupt is not supported */
  87. if (priv->irq <= 0) {
  88. msleep(TPM_CR50_TIMEOUT_NOIRQ_MS);
  89. return 0;
  90. }
  91. /* Wait for interrupt to indicate TPM is ready to respond */
  92. if (!wait_for_completion_timeout(&priv->tpm_ready, chip->timeout_a)) {
  93. dev_warn(&chip->dev, "Timeout waiting for TPM ready\n");
  94. return -ETIMEDOUT;
  95. }
  96. return 0;
  97. }
  98. /**
  99. * tpm_cr50_i2c_enable_tpm_irq() - Enable TPM irq.
  100. * @chip: A TPM chip.
  101. */
  102. static void tpm_cr50_i2c_enable_tpm_irq(struct tpm_chip *chip)
  103. {
  104. struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);
  105. if (priv->irq > 0) {
  106. reinit_completion(&priv->tpm_ready);
  107. enable_irq(priv->irq);
  108. }
  109. }
  110. /**
  111. * tpm_cr50_i2c_disable_tpm_irq() - Disable TPM irq.
  112. * @chip: A TPM chip.
  113. */
  114. static void tpm_cr50_i2c_disable_tpm_irq(struct tpm_chip *chip)
  115. {
  116. struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);
  117. if (priv->irq > 0)
  118. disable_irq(priv->irq);
  119. }
  120. /**
  121. * tpm_cr50_i2c_transfer_message() - Transfer a message over i2c.
  122. * @dev: Device information.
  123. * @adapter: I2C adapter.
  124. * @msg: Message to transfer.
  125. *
  126. * Call unlocked i2c transfer routine with the provided parameters and
  127. * retry in case of bus errors.
  128. *
  129. * Return:
  130. * - 0: Success.
  131. * - -errno: A POSIX error code.
  132. */
  133. static int tpm_cr50_i2c_transfer_message(struct device *dev,
  134. struct i2c_adapter *adapter,
  135. struct i2c_msg *msg)
  136. {
  137. unsigned int try;
  138. int rc;
  139. for (try = 0; try < TPM_CR50_I2C_MAX_RETRIES; try++) {
  140. rc = __i2c_transfer(adapter, msg, 1);
  141. if (rc == 1)
  142. return 0; /* Successfully transferred the message */
  143. if (try)
  144. dev_warn(dev, "i2c transfer failed (attempt %d/%d): %d\n",
  145. try + 1, TPM_CR50_I2C_MAX_RETRIES, rc);
  146. usleep_range(TPM_CR50_I2C_RETRY_DELAY_LO, TPM_CR50_I2C_RETRY_DELAY_HI);
  147. }
  148. /* No i2c message transferred */
  149. return -EIO;
  150. }
  151. /**
  152. * tpm_cr50_i2c_read() - Read from TPM register.
  153. * @chip: A TPM chip.
  154. * @addr: Register address to read from.
  155. * @buffer: Read destination, provided by caller.
  156. * @len: Number of bytes to read.
  157. *
  158. * Sends the register address byte to the TPM, then waits until TPM
  159. * is ready via interrupt signal or timeout expiration, then 'len'
  160. * bytes are read from TPM response into the provided 'buffer'.
  161. *
  162. * Return:
  163. * - 0: Success.
  164. * - -errno: A POSIX error code.
  165. */
  166. static int tpm_cr50_i2c_read(struct tpm_chip *chip, u8 addr, u8 *buffer, size_t len)
  167. {
  168. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  169. struct i2c_msg msg_reg_addr = {
  170. .addr = client->addr,
  171. .len = 1,
  172. .buf = &addr
  173. };
  174. struct i2c_msg msg_response = {
  175. .addr = client->addr,
  176. .flags = I2C_M_RD,
  177. .len = len,
  178. .buf = buffer
  179. };
  180. int rc;
  181. i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
  182. /* Prepare for completion interrupt */
  183. tpm_cr50_i2c_enable_tpm_irq(chip);
  184. /* Send the register address byte to the TPM */
  185. rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg_reg_addr);
  186. if (rc < 0)
  187. goto out;
  188. /* Wait for TPM to be ready with response data */
  189. rc = tpm_cr50_i2c_wait_tpm_ready(chip);
  190. if (rc < 0)
  191. goto out;
  192. /* Read response data from the TPM */
  193. rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg_response);
  194. out:
  195. tpm_cr50_i2c_disable_tpm_irq(chip);
  196. i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
  197. if (rc < 0)
  198. return rc;
  199. return 0;
  200. }
  201. /**
  202. * tpm_cr50_i2c_write()- Write to TPM register.
  203. * @chip: A TPM chip.
  204. * @addr: Register address to write to.
  205. * @buffer: Data to write.
  206. * @len: Number of bytes to write.
  207. *
  208. * The provided address is prepended to the data in 'buffer', the
  209. * combined address+data is sent to the TPM, then wait for TPM to
  210. * indicate it is done writing.
  211. *
  212. * Return:
  213. * - 0: Success.
  214. * - -errno: A POSIX error code.
  215. */
  216. static int tpm_cr50_i2c_write(struct tpm_chip *chip, u8 addr, u8 *buffer,
  217. size_t len)
  218. {
  219. struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);
  220. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  221. struct i2c_msg msg = {
  222. .addr = client->addr,
  223. .len = len + 1,
  224. .buf = priv->buf
  225. };
  226. int rc;
  227. if (len > TPM_CR50_MAX_BUFSIZE - 1)
  228. return -EINVAL;
  229. /* Prepend the 'register address' to the buffer */
  230. priv->buf[0] = addr;
  231. memcpy(priv->buf + 1, buffer, len);
  232. i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
  233. /* Prepare for completion interrupt */
  234. tpm_cr50_i2c_enable_tpm_irq(chip);
  235. /* Send write request buffer with address */
  236. rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg);
  237. if (rc < 0)
  238. goto out;
  239. /* Wait for TPM to be ready, ignore timeout */
  240. tpm_cr50_i2c_wait_tpm_ready(chip);
  241. out:
  242. tpm_cr50_i2c_disable_tpm_irq(chip);
  243. i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
  244. if (rc < 0)
  245. return rc;
  246. return 0;
  247. }
  248. /**
  249. * tpm_cr50_check_locality() - Verify TPM locality 0 is active.
  250. * @chip: A TPM chip.
  251. *
  252. * Return:
  253. * - 0: Success.
  254. * - -errno: A POSIX error code.
  255. */
  256. static int tpm_cr50_check_locality(struct tpm_chip *chip)
  257. {
  258. u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
  259. u8 buf;
  260. int rc;
  261. rc = tpm_cr50_i2c_read(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf));
  262. if (rc < 0)
  263. return rc;
  264. if ((buf & mask) == mask)
  265. return 0;
  266. return -EIO;
  267. }
  268. /**
  269. * tpm_cr50_release_locality() - Release TPM locality.
  270. * @chip: A TPM chip.
  271. * @force: Flag to force release if set.
  272. */
  273. static void tpm_cr50_release_locality(struct tpm_chip *chip, bool force)
  274. {
  275. u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
  276. u8 addr = TPM_I2C_ACCESS(0);
  277. u8 buf;
  278. if (tpm_cr50_i2c_read(chip, addr, &buf, sizeof(buf)) < 0)
  279. return;
  280. if (force || (buf & mask) == mask) {
  281. buf = TPM_ACCESS_ACTIVE_LOCALITY;
  282. tpm_cr50_i2c_write(chip, addr, &buf, sizeof(buf));
  283. }
  284. }
  285. /**
  286. * tpm_cr50_request_locality() - Request TPM locality 0.
  287. * @chip: A TPM chip.
  288. *
  289. * Return:
  290. * - 0: Success.
  291. * - -errno: A POSIX error code.
  292. */
  293. static int tpm_cr50_request_locality(struct tpm_chip *chip)
  294. {
  295. u8 buf = TPM_ACCESS_REQUEST_USE;
  296. unsigned long stop;
  297. int rc;
  298. if (!tpm_cr50_check_locality(chip))
  299. return 0;
  300. rc = tpm_cr50_i2c_write(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf));
  301. if (rc < 0)
  302. return rc;
  303. stop = jiffies + chip->timeout_a;
  304. do {
  305. if (!tpm_cr50_check_locality(chip))
  306. return 0;
  307. msleep(TPM_CR50_TIMEOUT_SHORT_MS);
  308. } while (time_before(jiffies, stop));
  309. return -ETIMEDOUT;
  310. }
  311. /**
  312. * tpm_cr50_i2c_tis_status() - Read cr50 tis status.
  313. * @chip: A TPM chip.
  314. *
  315. * cr50 requires all 4 bytes of status register to be read.
  316. *
  317. * Return:
  318. * TPM status byte.
  319. */
  320. static u8 tpm_cr50_i2c_tis_status(struct tpm_chip *chip)
  321. {
  322. u8 buf[4];
  323. if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0)
  324. return 0;
  325. return buf[0];
  326. }
  327. /**
  328. * tpm_cr50_i2c_tis_set_ready() - Set status register to ready.
  329. * @chip: A TPM chip.
  330. *
  331. * cr50 requires all 4 bytes of status register to be written.
  332. */
  333. static void tpm_cr50_i2c_tis_set_ready(struct tpm_chip *chip)
  334. {
  335. u8 buf[4] = { TPM_STS_COMMAND_READY };
  336. tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), buf, sizeof(buf));
  337. msleep(TPM_CR50_TIMEOUT_SHORT_MS);
  338. }
  339. /**
  340. * tpm_cr50_i2c_get_burst_and_status() - Get burst count and status.
  341. * @chip: A TPM chip.
  342. * @mask: Status mask.
  343. * @burst: Return value for burst.
  344. * @status: Return value for status.
  345. *
  346. * cr50 uses bytes 3:2 of status register for burst count and
  347. * all 4 bytes must be read.
  348. *
  349. * Return:
  350. * - 0: Success.
  351. * - -errno: A POSIX error code.
  352. */
  353. static int tpm_cr50_i2c_get_burst_and_status(struct tpm_chip *chip, u8 mask,
  354. size_t *burst, u32 *status)
  355. {
  356. unsigned long stop;
  357. u8 buf[4];
  358. *status = 0;
  359. /* wait for burstcount */
  360. stop = jiffies + chip->timeout_b;
  361. do {
  362. if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0) {
  363. msleep(TPM_CR50_TIMEOUT_SHORT_MS);
  364. continue;
  365. }
  366. *status = *buf;
  367. *burst = le16_to_cpup((__le16 *)(buf + 1));
  368. if ((*status & mask) == mask &&
  369. *burst > 0 && *burst <= TPM_CR50_MAX_BUFSIZE - 1)
  370. return 0;
  371. msleep(TPM_CR50_TIMEOUT_SHORT_MS);
  372. } while (time_before(jiffies, stop));
  373. dev_err(&chip->dev, "Timeout reading burst and status\n");
  374. return -ETIMEDOUT;
  375. }
  376. /**
  377. * tpm_cr50_i2c_tis_recv() - TPM reception callback.
  378. * @chip: A TPM chip.
  379. * @buf: Reception buffer.
  380. * @buf_len: Buffer length to read.
  381. *
  382. * Return:
  383. * - >= 0: Number of read bytes.
  384. * - -errno: A POSIX error code.
  385. */
  386. static int tpm_cr50_i2c_tis_recv(struct tpm_chip *chip, u8 *buf, size_t buf_len)
  387. {
  388. u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
  389. size_t burstcnt, cur, len, expected;
  390. u8 addr = TPM_I2C_DATA_FIFO(0);
  391. u32 status;
  392. int rc;
  393. if (buf_len < TPM_HEADER_SIZE)
  394. return -EINVAL;
  395. rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status);
  396. if (rc < 0)
  397. goto out_err;
  398. if (burstcnt > buf_len || burstcnt < TPM_HEADER_SIZE) {
  399. dev_err(&chip->dev,
  400. "Unexpected burstcnt: %zu (max=%zu, min=%d)\n",
  401. burstcnt, buf_len, TPM_HEADER_SIZE);
  402. rc = -EIO;
  403. goto out_err;
  404. }
  405. /* Read first chunk of burstcnt bytes */
  406. rc = tpm_cr50_i2c_read(chip, addr, buf, burstcnt);
  407. if (rc < 0) {
  408. dev_err(&chip->dev, "Read of first chunk failed\n");
  409. goto out_err;
  410. }
  411. /* Determine expected data in the return buffer */
  412. expected = be32_to_cpup((__be32 *)(buf + 2));
  413. if (expected > buf_len) {
  414. dev_err(&chip->dev, "Buffer too small to receive i2c data\n");
  415. rc = -E2BIG;
  416. goto out_err;
  417. }
  418. /* Now read the rest of the data */
  419. cur = burstcnt;
  420. while (cur < expected) {
  421. /* Read updated burst count and check status */
  422. rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status);
  423. if (rc < 0)
  424. goto out_err;
  425. len = min_t(size_t, burstcnt, expected - cur);
  426. rc = tpm_cr50_i2c_read(chip, addr, buf + cur, len);
  427. if (rc < 0) {
  428. dev_err(&chip->dev, "Read failed\n");
  429. goto out_err;
  430. }
  431. cur += len;
  432. }
  433. /* Ensure TPM is done reading data */
  434. rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status);
  435. if (rc < 0)
  436. goto out_err;
  437. if (status & TPM_STS_DATA_AVAIL) {
  438. dev_err(&chip->dev, "Data still available\n");
  439. rc = -EIO;
  440. goto out_err;
  441. }
  442. tpm_cr50_release_locality(chip, false);
  443. return cur;
  444. out_err:
  445. /* Abort current transaction if still pending */
  446. if (tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)
  447. tpm_cr50_i2c_tis_set_ready(chip);
  448. tpm_cr50_release_locality(chip, false);
  449. return rc;
  450. }
  451. /**
  452. * tpm_cr50_i2c_tis_send() - TPM transmission callback.
  453. * @chip: A TPM chip.
  454. * @buf: Buffer to send.
  455. * @len: Buffer length.
  456. *
  457. * Return:
  458. * - 0: Success.
  459. * - -errno: A POSIX error code.
  460. */
  461. static int tpm_cr50_i2c_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  462. {
  463. size_t burstcnt, limit, sent = 0;
  464. u8 tpm_go[4] = { TPM_STS_GO };
  465. unsigned long stop;
  466. u32 status;
  467. int rc;
  468. rc = tpm_cr50_request_locality(chip);
  469. if (rc < 0)
  470. return rc;
  471. /* Wait until TPM is ready for a command */
  472. stop = jiffies + chip->timeout_b;
  473. while (!(tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)) {
  474. if (time_after(jiffies, stop)) {
  475. rc = -ETIMEDOUT;
  476. goto out_err;
  477. }
  478. tpm_cr50_i2c_tis_set_ready(chip);
  479. }
  480. while (len > 0) {
  481. u8 mask = TPM_STS_VALID;
  482. /* Wait for data if this is not the first chunk */
  483. if (sent > 0)
  484. mask |= TPM_STS_DATA_EXPECT;
  485. /* Read burst count and check status */
  486. rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status);
  487. if (rc < 0)
  488. goto out_err;
  489. /*
  490. * Use burstcnt - 1 to account for the address byte
  491. * that is inserted by tpm_cr50_i2c_write()
  492. */
  493. limit = min_t(size_t, burstcnt - 1, len);
  494. rc = tpm_cr50_i2c_write(chip, TPM_I2C_DATA_FIFO(0), &buf[sent], limit);
  495. if (rc < 0) {
  496. dev_err(&chip->dev, "Write failed\n");
  497. goto out_err;
  498. }
  499. sent += limit;
  500. len -= limit;
  501. }
  502. /* Ensure TPM is not expecting more data */
  503. rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status);
  504. if (rc < 0)
  505. goto out_err;
  506. if (status & TPM_STS_DATA_EXPECT) {
  507. dev_err(&chip->dev, "Data still expected\n");
  508. rc = -EIO;
  509. goto out_err;
  510. }
  511. /* Start the TPM command */
  512. rc = tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), tpm_go,
  513. sizeof(tpm_go));
  514. if (rc < 0) {
  515. dev_err(&chip->dev, "Start command failed\n");
  516. goto out_err;
  517. }
  518. return 0;
  519. out_err:
  520. /* Abort current transaction if still pending */
  521. if (tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)
  522. tpm_cr50_i2c_tis_set_ready(chip);
  523. tpm_cr50_release_locality(chip, false);
  524. return rc;
  525. }
  526. /**
  527. * tpm_cr50_i2c_req_canceled() - Callback to notify a request cancel.
  528. * @chip: A TPM chip.
  529. * @status: Status given by the cancel callback.
  530. *
  531. * Return:
  532. * True if command is ready, False otherwise.
  533. */
  534. static bool tpm_cr50_i2c_req_canceled(struct tpm_chip *chip, u8 status)
  535. {
  536. return status == TPM_STS_COMMAND_READY;
  537. }
  538. static bool tpm_cr50_i2c_is_firmware_power_managed(struct device *dev)
  539. {
  540. u8 val;
  541. int ret;
  542. /* This flag should default true when the device property is not present */
  543. ret = device_property_read_u8(dev, "firmware-power-managed", &val);
  544. if (ret)
  545. return true;
  546. return val;
  547. }
  548. static const struct tpm_class_ops cr50_i2c = {
  549. .flags = TPM_OPS_AUTO_STARTUP,
  550. .status = &tpm_cr50_i2c_tis_status,
  551. .recv = &tpm_cr50_i2c_tis_recv,
  552. .send = &tpm_cr50_i2c_tis_send,
  553. .cancel = &tpm_cr50_i2c_tis_set_ready,
  554. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  555. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  556. .req_canceled = &tpm_cr50_i2c_req_canceled,
  557. };
  558. #ifdef CONFIG_ACPI
  559. static const struct acpi_device_id cr50_i2c_acpi_id[] = {
  560. { "GOOG0005", 0 },
  561. {}
  562. };
  563. MODULE_DEVICE_TABLE(acpi, cr50_i2c_acpi_id);
  564. #endif
  565. #ifdef CONFIG_OF
  566. static const struct of_device_id of_cr50_i2c_match[] = {
  567. { .compatible = "google,cr50", },
  568. {}
  569. };
  570. MODULE_DEVICE_TABLE(of, of_cr50_i2c_match);
  571. #endif
  572. /**
  573. * tpm_cr50_i2c_probe() - Driver probe function.
  574. * @client: I2C client information.
  575. *
  576. * Return:
  577. * - 0: Success.
  578. * - -errno: A POSIX error code.
  579. */
  580. static int tpm_cr50_i2c_probe(struct i2c_client *client)
  581. {
  582. struct tpm_i2c_cr50_priv_data *priv;
  583. struct device *dev = &client->dev;
  584. struct tpm_chip *chip;
  585. u32 vendor;
  586. u8 buf[4];
  587. int rc;
  588. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  589. return -ENODEV;
  590. chip = tpmm_chip_alloc(dev, &cr50_i2c);
  591. if (IS_ERR(chip))
  592. return PTR_ERR(chip);
  593. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  594. if (!priv)
  595. return -ENOMEM;
  596. /* cr50 is a TPM 2.0 chip */
  597. chip->flags |= TPM_CHIP_FLAG_TPM2;
  598. if (tpm_cr50_i2c_is_firmware_power_managed(dev))
  599. chip->flags |= TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED;
  600. /* Default timeouts */
  601. chip->timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  602. chip->timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
  603. chip->timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  604. chip->timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  605. dev_set_drvdata(&chip->dev, priv);
  606. init_completion(&priv->tpm_ready);
  607. if (client->irq > 0) {
  608. rc = devm_request_irq(dev, client->irq, tpm_cr50_i2c_int_handler,
  609. IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
  610. IRQF_NO_AUTOEN,
  611. dev->driver->name, chip);
  612. if (rc < 0) {
  613. dev_err(dev, "Failed to probe IRQ %d\n", client->irq);
  614. return rc;
  615. }
  616. priv->irq = client->irq;
  617. } else {
  618. dev_warn(dev, "No IRQ, will use %ums delay for TPM ready\n",
  619. TPM_CR50_TIMEOUT_NOIRQ_MS);
  620. }
  621. rc = tpm_cr50_request_locality(chip);
  622. if (rc < 0) {
  623. dev_err(dev, "Could not request locality\n");
  624. return rc;
  625. }
  626. /* Read four bytes from DID_VID register */
  627. rc = tpm_cr50_i2c_read(chip, TPM_I2C_DID_VID(0), buf, sizeof(buf));
  628. if (rc < 0) {
  629. dev_err(dev, "Could not read vendor id\n");
  630. tpm_cr50_release_locality(chip, true);
  631. return rc;
  632. }
  633. vendor = le32_to_cpup((__le32 *)buf);
  634. if (vendor != TPM_CR50_I2C_DID_VID && vendor != TPM_TI50_I2C_DID_VID) {
  635. dev_err(dev, "Vendor ID did not match! ID was %08x\n", vendor);
  636. tpm_cr50_release_locality(chip, true);
  637. return -ENODEV;
  638. }
  639. dev_info(dev, "%s TPM 2.0 (i2c 0x%02x irq %d id 0x%x)\n",
  640. vendor == TPM_TI50_I2C_DID_VID ? "ti50" : "cr50",
  641. client->addr, client->irq, vendor >> 16);
  642. return tpm_chip_register(chip);
  643. }
  644. /**
  645. * tpm_cr50_i2c_remove() - Driver remove function.
  646. * @client: I2C client information.
  647. *
  648. * Return:
  649. * - 0: Success.
  650. * - -errno: A POSIX error code.
  651. */
  652. static void tpm_cr50_i2c_remove(struct i2c_client *client)
  653. {
  654. struct tpm_chip *chip = i2c_get_clientdata(client);
  655. struct device *dev = &client->dev;
  656. if (!chip) {
  657. dev_crit(dev, "Could not get client data at remove, memory corruption ahead\n");
  658. return;
  659. }
  660. tpm_chip_unregister(chip);
  661. tpm_cr50_release_locality(chip, true);
  662. }
  663. static SIMPLE_DEV_PM_OPS(cr50_i2c_pm, tpm_pm_suspend, tpm_pm_resume);
  664. static struct i2c_driver cr50_i2c_driver = {
  665. .probe = tpm_cr50_i2c_probe,
  666. .remove = tpm_cr50_i2c_remove,
  667. .driver = {
  668. .name = "cr50_i2c",
  669. .pm = &cr50_i2c_pm,
  670. .acpi_match_table = ACPI_PTR(cr50_i2c_acpi_id),
  671. .of_match_table = of_match_ptr(of_cr50_i2c_match),
  672. },
  673. };
  674. module_i2c_driver(cr50_i2c_driver);
  675. MODULE_DESCRIPTION("cr50 TPM I2C Driver");
  676. MODULE_LICENSE("GPL");