ingenic-ost.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * JZ47xx SoCs TCU Operating System Timer driver
  4. *
  5. * Copyright (C) 2016 Maarten ter Huurne <maarten@treewalker.org>
  6. * Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/clocksource.h>
  10. #include <linux/mfd/ingenic-tcu.h>
  11. #include <linux/mfd/syscon.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pm.h>
  15. #include <linux/regmap.h>
  16. #include <linux/sched_clock.h>
  17. #define TCU_OST_TCSR_MASK 0xffc0
  18. #define TCU_OST_TCSR_CNT_MD BIT(15)
  19. #define TCU_OST_CHANNEL 15
  20. /*
  21. * The TCU_REG_OST_CNT{L,R} from <linux/mfd/ingenic-tcu.h> are only for the
  22. * regmap; these are for use with the __iomem pointer.
  23. */
  24. #define OST_REG_CNTL 0x4
  25. #define OST_REG_CNTH 0x8
  26. struct ingenic_ost_soc_info {
  27. bool is64bit;
  28. };
  29. struct ingenic_ost {
  30. void __iomem *regs;
  31. struct clk *clk;
  32. struct clocksource cs;
  33. };
  34. static struct ingenic_ost *ingenic_ost;
  35. static u64 notrace ingenic_ost_read_cntl(void)
  36. {
  37. /* Read using __iomem pointer instead of regmap to avoid locking */
  38. return readl(ingenic_ost->regs + OST_REG_CNTL);
  39. }
  40. static u64 notrace ingenic_ost_read_cnth(void)
  41. {
  42. /* Read using __iomem pointer instead of regmap to avoid locking */
  43. return readl(ingenic_ost->regs + OST_REG_CNTH);
  44. }
  45. static u64 notrace ingenic_ost_clocksource_readl(struct clocksource *cs)
  46. {
  47. return ingenic_ost_read_cntl();
  48. }
  49. static u64 notrace ingenic_ost_clocksource_readh(struct clocksource *cs)
  50. {
  51. return ingenic_ost_read_cnth();
  52. }
  53. static int __init ingenic_ost_probe(struct platform_device *pdev)
  54. {
  55. const struct ingenic_ost_soc_info *soc_info;
  56. struct device *dev = &pdev->dev;
  57. struct ingenic_ost *ost;
  58. struct clocksource *cs;
  59. struct regmap *map;
  60. unsigned long rate;
  61. int err;
  62. soc_info = device_get_match_data(dev);
  63. if (!soc_info)
  64. return -EINVAL;
  65. ost = devm_kzalloc(dev, sizeof(*ost), GFP_KERNEL);
  66. if (!ost)
  67. return -ENOMEM;
  68. ingenic_ost = ost;
  69. ost->regs = devm_platform_ioremap_resource(pdev, 0);
  70. if (IS_ERR(ost->regs))
  71. return PTR_ERR(ost->regs);
  72. map = device_node_to_regmap(dev->parent->of_node);
  73. if (IS_ERR(map)) {
  74. dev_err(dev, "regmap not found");
  75. return PTR_ERR(map);
  76. }
  77. ost->clk = devm_clk_get_enabled(dev, "ost");
  78. if (IS_ERR(ost->clk))
  79. return PTR_ERR(ost->clk);
  80. /* Clear counter high/low registers */
  81. if (soc_info->is64bit)
  82. regmap_write(map, TCU_REG_OST_CNTL, 0);
  83. regmap_write(map, TCU_REG_OST_CNTH, 0);
  84. /* Don't reset counter at compare value. */
  85. regmap_update_bits(map, TCU_REG_OST_TCSR,
  86. TCU_OST_TCSR_MASK, TCU_OST_TCSR_CNT_MD);
  87. rate = clk_get_rate(ost->clk);
  88. /* Enable OST TCU channel */
  89. regmap_write(map, TCU_REG_TESR, BIT(TCU_OST_CHANNEL));
  90. cs = &ost->cs;
  91. cs->name = "ingenic-ost";
  92. cs->rating = 320;
  93. cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
  94. cs->mask = CLOCKSOURCE_MASK(32);
  95. if (soc_info->is64bit)
  96. cs->read = ingenic_ost_clocksource_readl;
  97. else
  98. cs->read = ingenic_ost_clocksource_readh;
  99. err = clocksource_register_hz(cs, rate);
  100. if (err) {
  101. dev_err(dev, "clocksource registration failed");
  102. return err;
  103. }
  104. if (soc_info->is64bit)
  105. sched_clock_register(ingenic_ost_read_cntl, 32, rate);
  106. else
  107. sched_clock_register(ingenic_ost_read_cnth, 32, rate);
  108. return 0;
  109. }
  110. static int ingenic_ost_suspend(struct device *dev)
  111. {
  112. struct ingenic_ost *ost = dev_get_drvdata(dev);
  113. clk_disable(ost->clk);
  114. return 0;
  115. }
  116. static int ingenic_ost_resume(struct device *dev)
  117. {
  118. struct ingenic_ost *ost = dev_get_drvdata(dev);
  119. return clk_enable(ost->clk);
  120. }
  121. static const struct dev_pm_ops ingenic_ost_pm_ops = {
  122. /* _noirq: We want the OST clock to be gated last / ungated first */
  123. .suspend_noirq = ingenic_ost_suspend,
  124. .resume_noirq = ingenic_ost_resume,
  125. };
  126. static const struct ingenic_ost_soc_info jz4725b_ost_soc_info = {
  127. .is64bit = false,
  128. };
  129. static const struct ingenic_ost_soc_info jz4760b_ost_soc_info = {
  130. .is64bit = true,
  131. };
  132. static const struct of_device_id ingenic_ost_of_match[] = {
  133. { .compatible = "ingenic,jz4725b-ost", .data = &jz4725b_ost_soc_info, },
  134. { .compatible = "ingenic,jz4760b-ost", .data = &jz4760b_ost_soc_info, },
  135. { .compatible = "ingenic,jz4770-ost", .data = &jz4760b_ost_soc_info, },
  136. { }
  137. };
  138. static struct platform_driver ingenic_ost_driver = {
  139. .driver = {
  140. .name = "ingenic-ost",
  141. .pm = pm_sleep_ptr(&ingenic_ost_pm_ops),
  142. .of_match_table = ingenic_ost_of_match,
  143. },
  144. };
  145. builtin_platform_driver_probe(ingenic_ost_driver, ingenic_ost_probe);