cppc_cpufreq.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * CPPC (Collaborative Processor Performance Control) driver for
  4. * interfacing with the CPUfreq layer and governors. See
  5. * cppc_acpi.c for CPPC specific methods.
  6. *
  7. * (C) Copyright 2014, 2015 Linaro Ltd.
  8. * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
  9. */
  10. #define pr_fmt(fmt) "CPPC Cpufreq:" fmt
  11. #include <linux/arch_topology.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/delay.h>
  15. #include <linux/cpu.h>
  16. #include <linux/cpufreq.h>
  17. #include <linux/irq_work.h>
  18. #include <linux/kthread.h>
  19. #include <linux/time.h>
  20. #include <linux/vmalloc.h>
  21. #include <uapi/linux/sched/types.h>
  22. #include <linux/unaligned.h>
  23. #include <acpi/cppc_acpi.h>
  24. /*
  25. * This list contains information parsed from per CPU ACPI _CPC and _PSD
  26. * structures: e.g. the highest and lowest supported performance, capabilities,
  27. * desired performance, level requested etc. Depending on the share_type, not
  28. * all CPUs will have an entry in the list.
  29. */
  30. static LIST_HEAD(cpu_data_list);
  31. static bool boost_supported;
  32. struct cppc_workaround_oem_info {
  33. char oem_id[ACPI_OEM_ID_SIZE + 1];
  34. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
  35. u32 oem_revision;
  36. };
  37. static struct cppc_workaround_oem_info wa_info[] = {
  38. {
  39. .oem_id = "HISI ",
  40. .oem_table_id = "HIP07 ",
  41. .oem_revision = 0,
  42. }, {
  43. .oem_id = "HISI ",
  44. .oem_table_id = "HIP08 ",
  45. .oem_revision = 0,
  46. }
  47. };
  48. static struct cpufreq_driver cppc_cpufreq_driver;
  49. static enum {
  50. FIE_UNSET = -1,
  51. FIE_ENABLED,
  52. FIE_DISABLED
  53. } fie_disabled = FIE_UNSET;
  54. #ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
  55. module_param(fie_disabled, int, 0444);
  56. MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)");
  57. /* Frequency invariance support */
  58. struct cppc_freq_invariance {
  59. int cpu;
  60. struct irq_work irq_work;
  61. struct kthread_work work;
  62. struct cppc_perf_fb_ctrs prev_perf_fb_ctrs;
  63. struct cppc_cpudata *cpu_data;
  64. };
  65. static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv);
  66. static struct kthread_worker *kworker_fie;
  67. static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu);
  68. static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data,
  69. struct cppc_perf_fb_ctrs *fb_ctrs_t0,
  70. struct cppc_perf_fb_ctrs *fb_ctrs_t1);
  71. /**
  72. * cppc_scale_freq_workfn - CPPC arch_freq_scale updater for frequency invariance
  73. * @work: The work item.
  74. *
  75. * The CPPC driver register itself with the topology core to provide its own
  76. * implementation (cppc_scale_freq_tick()) of topology_scale_freq_tick() which
  77. * gets called by the scheduler on every tick.
  78. *
  79. * Note that the arch specific counters have higher priority than CPPC counters,
  80. * if available, though the CPPC driver doesn't need to have any special
  81. * handling for that.
  82. *
  83. * On an invocation of cppc_scale_freq_tick(), we schedule an irq work (since we
  84. * reach here from hard-irq context), which then schedules a normal work item
  85. * and cppc_scale_freq_workfn() updates the per_cpu arch_freq_scale variable
  86. * based on the counter updates since the last tick.
  87. */
  88. static void cppc_scale_freq_workfn(struct kthread_work *work)
  89. {
  90. struct cppc_freq_invariance *cppc_fi;
  91. struct cppc_perf_fb_ctrs fb_ctrs = {0};
  92. struct cppc_cpudata *cpu_data;
  93. unsigned long local_freq_scale;
  94. u64 perf;
  95. cppc_fi = container_of(work, struct cppc_freq_invariance, work);
  96. cpu_data = cppc_fi->cpu_data;
  97. if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) {
  98. pr_warn("%s: failed to read perf counters\n", __func__);
  99. return;
  100. }
  101. perf = cppc_perf_from_fbctrs(cpu_data, &cppc_fi->prev_perf_fb_ctrs,
  102. &fb_ctrs);
  103. if (!perf)
  104. return;
  105. cppc_fi->prev_perf_fb_ctrs = fb_ctrs;
  106. perf <<= SCHED_CAPACITY_SHIFT;
  107. local_freq_scale = div64_u64(perf, cpu_data->perf_caps.highest_perf);
  108. /* This can happen due to counter's overflow */
  109. if (unlikely(local_freq_scale > 1024))
  110. local_freq_scale = 1024;
  111. per_cpu(arch_freq_scale, cppc_fi->cpu) = local_freq_scale;
  112. }
  113. static void cppc_irq_work(struct irq_work *irq_work)
  114. {
  115. struct cppc_freq_invariance *cppc_fi;
  116. cppc_fi = container_of(irq_work, struct cppc_freq_invariance, irq_work);
  117. kthread_queue_work(kworker_fie, &cppc_fi->work);
  118. }
  119. static void cppc_scale_freq_tick(void)
  120. {
  121. struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id());
  122. /*
  123. * cppc_get_perf_ctrs() can potentially sleep, call that from the right
  124. * context.
  125. */
  126. irq_work_queue(&cppc_fi->irq_work);
  127. }
  128. static struct scale_freq_data cppc_sftd = {
  129. .source = SCALE_FREQ_SOURCE_CPPC,
  130. .set_freq_scale = cppc_scale_freq_tick,
  131. };
  132. static void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy)
  133. {
  134. struct cppc_freq_invariance *cppc_fi;
  135. int cpu, ret;
  136. if (fie_disabled)
  137. return;
  138. for_each_cpu(cpu, policy->cpus) {
  139. cppc_fi = &per_cpu(cppc_freq_inv, cpu);
  140. cppc_fi->cpu = cpu;
  141. cppc_fi->cpu_data = policy->driver_data;
  142. kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn);
  143. init_irq_work(&cppc_fi->irq_work, cppc_irq_work);
  144. ret = cppc_get_perf_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs);
  145. if (ret) {
  146. pr_warn("%s: failed to read perf counters for cpu:%d: %d\n",
  147. __func__, cpu, ret);
  148. /*
  149. * Don't abort if the CPU was offline while the driver
  150. * was getting registered.
  151. */
  152. if (cpu_online(cpu))
  153. return;
  154. }
  155. }
  156. /* Register for freq-invariance */
  157. topology_set_scale_freq_source(&cppc_sftd, policy->cpus);
  158. }
  159. /*
  160. * We free all the resources on policy's removal and not on CPU removal as the
  161. * irq-work are per-cpu and the hotplug core takes care of flushing the pending
  162. * irq-works (hint: smpcfd_dying_cpu()) on CPU hotplug. Even if the kthread-work
  163. * fires on another CPU after the concerned CPU is removed, it won't harm.
  164. *
  165. * We just need to make sure to remove them all on policy->exit().
  166. */
  167. static void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy)
  168. {
  169. struct cppc_freq_invariance *cppc_fi;
  170. int cpu;
  171. if (fie_disabled)
  172. return;
  173. /* policy->cpus will be empty here, use related_cpus instead */
  174. topology_clear_scale_freq_source(SCALE_FREQ_SOURCE_CPPC, policy->related_cpus);
  175. for_each_cpu(cpu, policy->related_cpus) {
  176. cppc_fi = &per_cpu(cppc_freq_inv, cpu);
  177. irq_work_sync(&cppc_fi->irq_work);
  178. kthread_cancel_work_sync(&cppc_fi->work);
  179. }
  180. }
  181. static void __init cppc_freq_invariance_init(void)
  182. {
  183. struct sched_attr attr = {
  184. .size = sizeof(struct sched_attr),
  185. .sched_policy = SCHED_DEADLINE,
  186. .sched_nice = 0,
  187. .sched_priority = 0,
  188. /*
  189. * Fake (unused) bandwidth; workaround to "fix"
  190. * priority inheritance.
  191. */
  192. .sched_runtime = NSEC_PER_MSEC,
  193. .sched_deadline = 10 * NSEC_PER_MSEC,
  194. .sched_period = 10 * NSEC_PER_MSEC,
  195. };
  196. int ret;
  197. if (fie_disabled != FIE_ENABLED && fie_disabled != FIE_DISABLED) {
  198. fie_disabled = FIE_ENABLED;
  199. if (cppc_perf_ctrs_in_pcc()) {
  200. pr_info("FIE not enabled on systems with registers in PCC\n");
  201. fie_disabled = FIE_DISABLED;
  202. }
  203. }
  204. if (fie_disabled)
  205. return;
  206. kworker_fie = kthread_create_worker(0, "cppc_fie");
  207. if (IS_ERR(kworker_fie)) {
  208. pr_warn("%s: failed to create kworker_fie: %ld\n", __func__,
  209. PTR_ERR(kworker_fie));
  210. fie_disabled = FIE_DISABLED;
  211. return;
  212. }
  213. ret = sched_setattr_nocheck(kworker_fie->task, &attr);
  214. if (ret) {
  215. pr_warn("%s: failed to set SCHED_DEADLINE: %d\n", __func__,
  216. ret);
  217. kthread_destroy_worker(kworker_fie);
  218. fie_disabled = FIE_DISABLED;
  219. }
  220. }
  221. static void cppc_freq_invariance_exit(void)
  222. {
  223. if (fie_disabled)
  224. return;
  225. kthread_destroy_worker(kworker_fie);
  226. }
  227. #else
  228. static inline void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy)
  229. {
  230. }
  231. static inline void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy)
  232. {
  233. }
  234. static inline void cppc_freq_invariance_init(void)
  235. {
  236. }
  237. static inline void cppc_freq_invariance_exit(void)
  238. {
  239. }
  240. #endif /* CONFIG_ACPI_CPPC_CPUFREQ_FIE */
  241. static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
  242. unsigned int target_freq,
  243. unsigned int relation)
  244. {
  245. struct cppc_cpudata *cpu_data = policy->driver_data;
  246. unsigned int cpu = policy->cpu;
  247. struct cpufreq_freqs freqs;
  248. int ret = 0;
  249. cpu_data->perf_ctrls.desired_perf =
  250. cppc_khz_to_perf(&cpu_data->perf_caps, target_freq);
  251. freqs.old = policy->cur;
  252. freqs.new = target_freq;
  253. cpufreq_freq_transition_begin(policy, &freqs);
  254. ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
  255. cpufreq_freq_transition_end(policy, &freqs, ret != 0);
  256. if (ret)
  257. pr_debug("Failed to set target on CPU:%d. ret:%d\n",
  258. cpu, ret);
  259. return ret;
  260. }
  261. static unsigned int cppc_cpufreq_fast_switch(struct cpufreq_policy *policy,
  262. unsigned int target_freq)
  263. {
  264. struct cppc_cpudata *cpu_data = policy->driver_data;
  265. unsigned int cpu = policy->cpu;
  266. u32 desired_perf;
  267. int ret;
  268. desired_perf = cppc_khz_to_perf(&cpu_data->perf_caps, target_freq);
  269. cpu_data->perf_ctrls.desired_perf = desired_perf;
  270. ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
  271. if (ret) {
  272. pr_debug("Failed to set target on CPU:%d. ret:%d\n",
  273. cpu, ret);
  274. return 0;
  275. }
  276. return target_freq;
  277. }
  278. static int cppc_verify_policy(struct cpufreq_policy_data *policy)
  279. {
  280. cpufreq_verify_within_cpu_limits(policy);
  281. return 0;
  282. }
  283. static unsigned int __cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
  284. {
  285. unsigned int transition_latency_ns = cppc_get_transition_latency(cpu);
  286. if (transition_latency_ns == CPUFREQ_ETERNAL)
  287. return CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS / NSEC_PER_USEC;
  288. return transition_latency_ns / NSEC_PER_USEC;
  289. }
  290. /*
  291. * The PCC subspace describes the rate at which platform can accept commands
  292. * on the shared PCC channel (including READs which do not count towards freq
  293. * transition requests), so ideally we need to use the PCC values as a fallback
  294. * if we don't have a platform specific transition_delay_us
  295. */
  296. #ifdef CONFIG_ARM64
  297. #include <asm/cputype.h>
  298. static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
  299. {
  300. unsigned long implementor = read_cpuid_implementor();
  301. unsigned long part_num = read_cpuid_part_number();
  302. switch (implementor) {
  303. case ARM_CPU_IMP_QCOM:
  304. switch (part_num) {
  305. case QCOM_CPU_PART_FALKOR_V1:
  306. case QCOM_CPU_PART_FALKOR:
  307. return 10000;
  308. }
  309. }
  310. return __cppc_cpufreq_get_transition_delay_us(cpu);
  311. }
  312. #else
  313. static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
  314. {
  315. return __cppc_cpufreq_get_transition_delay_us(cpu);
  316. }
  317. #endif
  318. #if defined(CONFIG_ARM64) && defined(CONFIG_ENERGY_MODEL)
  319. static DEFINE_PER_CPU(unsigned int, efficiency_class);
  320. static void cppc_cpufreq_register_em(struct cpufreq_policy *policy);
  321. /* Create an artificial performance state every CPPC_EM_CAP_STEP capacity unit. */
  322. #define CPPC_EM_CAP_STEP (20)
  323. /* Increase the cost value by CPPC_EM_COST_STEP every performance state. */
  324. #define CPPC_EM_COST_STEP (1)
  325. /* Add a cost gap correspnding to the energy of 4 CPUs. */
  326. #define CPPC_EM_COST_GAP (4 * SCHED_CAPACITY_SCALE * CPPC_EM_COST_STEP \
  327. / CPPC_EM_CAP_STEP)
  328. static unsigned int get_perf_level_count(struct cpufreq_policy *policy)
  329. {
  330. struct cppc_perf_caps *perf_caps;
  331. unsigned int min_cap, max_cap;
  332. struct cppc_cpudata *cpu_data;
  333. int cpu = policy->cpu;
  334. cpu_data = policy->driver_data;
  335. perf_caps = &cpu_data->perf_caps;
  336. max_cap = arch_scale_cpu_capacity(cpu);
  337. min_cap = div_u64((u64)max_cap * perf_caps->lowest_perf,
  338. perf_caps->highest_perf);
  339. if ((min_cap == 0) || (max_cap < min_cap))
  340. return 0;
  341. return 1 + max_cap / CPPC_EM_CAP_STEP - min_cap / CPPC_EM_CAP_STEP;
  342. }
  343. /*
  344. * The cost is defined as:
  345. * cost = power * max_frequency / frequency
  346. */
  347. static inline unsigned long compute_cost(int cpu, int step)
  348. {
  349. return CPPC_EM_COST_GAP * per_cpu(efficiency_class, cpu) +
  350. step * CPPC_EM_COST_STEP;
  351. }
  352. static int cppc_get_cpu_power(struct device *cpu_dev,
  353. unsigned long *power, unsigned long *KHz)
  354. {
  355. unsigned long perf_step, perf_prev, perf, perf_check;
  356. unsigned int min_step, max_step, step, step_check;
  357. unsigned long prev_freq = *KHz;
  358. unsigned int min_cap, max_cap;
  359. struct cpufreq_policy *policy;
  360. struct cppc_perf_caps *perf_caps;
  361. struct cppc_cpudata *cpu_data;
  362. policy = cpufreq_cpu_get_raw(cpu_dev->id);
  363. if (!policy)
  364. return -EINVAL;
  365. cpu_data = policy->driver_data;
  366. perf_caps = &cpu_data->perf_caps;
  367. max_cap = arch_scale_cpu_capacity(cpu_dev->id);
  368. min_cap = div_u64((u64)max_cap * perf_caps->lowest_perf,
  369. perf_caps->highest_perf);
  370. perf_step = div_u64((u64)CPPC_EM_CAP_STEP * perf_caps->highest_perf,
  371. max_cap);
  372. min_step = min_cap / CPPC_EM_CAP_STEP;
  373. max_step = max_cap / CPPC_EM_CAP_STEP;
  374. perf_prev = cppc_khz_to_perf(perf_caps, *KHz);
  375. step = perf_prev / perf_step;
  376. if (step > max_step)
  377. return -EINVAL;
  378. if (min_step == max_step) {
  379. step = max_step;
  380. perf = perf_caps->highest_perf;
  381. } else if (step < min_step) {
  382. step = min_step;
  383. perf = perf_caps->lowest_perf;
  384. } else {
  385. step++;
  386. if (step == max_step)
  387. perf = perf_caps->highest_perf;
  388. else
  389. perf = step * perf_step;
  390. }
  391. *KHz = cppc_perf_to_khz(perf_caps, perf);
  392. perf_check = cppc_khz_to_perf(perf_caps, *KHz);
  393. step_check = perf_check / perf_step;
  394. /*
  395. * To avoid bad integer approximation, check that new frequency value
  396. * increased and that the new frequency will be converted to the
  397. * desired step value.
  398. */
  399. while ((*KHz == prev_freq) || (step_check != step)) {
  400. perf++;
  401. *KHz = cppc_perf_to_khz(perf_caps, perf);
  402. perf_check = cppc_khz_to_perf(perf_caps, *KHz);
  403. step_check = perf_check / perf_step;
  404. }
  405. /*
  406. * With an artificial EM, only the cost value is used. Still the power
  407. * is populated such as 0 < power < EM_MAX_POWER. This allows to add
  408. * more sense to the artificial performance states.
  409. */
  410. *power = compute_cost(cpu_dev->id, step);
  411. return 0;
  412. }
  413. static int cppc_get_cpu_cost(struct device *cpu_dev, unsigned long KHz,
  414. unsigned long *cost)
  415. {
  416. unsigned long perf_step, perf_prev;
  417. struct cppc_perf_caps *perf_caps;
  418. struct cpufreq_policy *policy;
  419. struct cppc_cpudata *cpu_data;
  420. unsigned int max_cap;
  421. int step;
  422. policy = cpufreq_cpu_get_raw(cpu_dev->id);
  423. if (!policy)
  424. return -EINVAL;
  425. cpu_data = policy->driver_data;
  426. perf_caps = &cpu_data->perf_caps;
  427. max_cap = arch_scale_cpu_capacity(cpu_dev->id);
  428. perf_prev = cppc_khz_to_perf(perf_caps, KHz);
  429. perf_step = CPPC_EM_CAP_STEP * perf_caps->highest_perf / max_cap;
  430. step = perf_prev / perf_step;
  431. *cost = compute_cost(cpu_dev->id, step);
  432. return 0;
  433. }
  434. static int populate_efficiency_class(void)
  435. {
  436. struct acpi_madt_generic_interrupt *gicc;
  437. DECLARE_BITMAP(used_classes, 256) = {};
  438. int class, cpu, index;
  439. for_each_possible_cpu(cpu) {
  440. gicc = acpi_cpu_get_madt_gicc(cpu);
  441. class = gicc->efficiency_class;
  442. bitmap_set(used_classes, class, 1);
  443. }
  444. if (bitmap_weight(used_classes, 256) <= 1) {
  445. pr_debug("Efficiency classes are all equal (=%d). "
  446. "No EM registered", class);
  447. return -EINVAL;
  448. }
  449. /*
  450. * Squeeze efficiency class values on [0:#efficiency_class-1].
  451. * Values are per spec in [0:255].
  452. */
  453. index = 0;
  454. for_each_set_bit(class, used_classes, 256) {
  455. for_each_possible_cpu(cpu) {
  456. gicc = acpi_cpu_get_madt_gicc(cpu);
  457. if (gicc->efficiency_class == class)
  458. per_cpu(efficiency_class, cpu) = index;
  459. }
  460. index++;
  461. }
  462. cppc_cpufreq_driver.register_em = cppc_cpufreq_register_em;
  463. return 0;
  464. }
  465. static void cppc_cpufreq_register_em(struct cpufreq_policy *policy)
  466. {
  467. struct cppc_cpudata *cpu_data;
  468. struct em_data_callback em_cb =
  469. EM_ADV_DATA_CB(cppc_get_cpu_power, cppc_get_cpu_cost);
  470. cpu_data = policy->driver_data;
  471. em_dev_register_perf_domain(get_cpu_device(policy->cpu),
  472. get_perf_level_count(policy), &em_cb,
  473. cpu_data->shared_cpu_map, 0);
  474. }
  475. #else
  476. static int populate_efficiency_class(void)
  477. {
  478. return 0;
  479. }
  480. #endif
  481. static struct cppc_cpudata *cppc_cpufreq_get_cpu_data(unsigned int cpu)
  482. {
  483. struct cppc_cpudata *cpu_data;
  484. int ret;
  485. cpu_data = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
  486. if (!cpu_data)
  487. goto out;
  488. if (!zalloc_cpumask_var(&cpu_data->shared_cpu_map, GFP_KERNEL))
  489. goto free_cpu;
  490. ret = acpi_get_psd_map(cpu, cpu_data);
  491. if (ret) {
  492. pr_debug("Err parsing CPU%d PSD data: ret:%d\n", cpu, ret);
  493. goto free_mask;
  494. }
  495. ret = cppc_get_perf_caps(cpu, &cpu_data->perf_caps);
  496. if (ret) {
  497. pr_debug("Err reading CPU%d perf caps: ret:%d\n", cpu, ret);
  498. goto free_mask;
  499. }
  500. list_add(&cpu_data->node, &cpu_data_list);
  501. return cpu_data;
  502. free_mask:
  503. free_cpumask_var(cpu_data->shared_cpu_map);
  504. free_cpu:
  505. kfree(cpu_data);
  506. out:
  507. return NULL;
  508. }
  509. static void cppc_cpufreq_put_cpu_data(struct cpufreq_policy *policy)
  510. {
  511. struct cppc_cpudata *cpu_data = policy->driver_data;
  512. list_del(&cpu_data->node);
  513. free_cpumask_var(cpu_data->shared_cpu_map);
  514. kfree(cpu_data);
  515. policy->driver_data = NULL;
  516. }
  517. static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
  518. {
  519. unsigned int cpu = policy->cpu;
  520. struct cppc_cpudata *cpu_data;
  521. struct cppc_perf_caps *caps;
  522. int ret;
  523. cpu_data = cppc_cpufreq_get_cpu_data(cpu);
  524. if (!cpu_data) {
  525. pr_err("Error in acquiring _CPC/_PSD data for CPU%d.\n", cpu);
  526. return -ENODEV;
  527. }
  528. caps = &cpu_data->perf_caps;
  529. policy->driver_data = cpu_data;
  530. /*
  531. * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
  532. * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
  533. */
  534. policy->min = cppc_perf_to_khz(caps, caps->lowest_nonlinear_perf);
  535. policy->max = cppc_perf_to_khz(caps, caps->nominal_perf);
  536. /*
  537. * Set cpuinfo.min_freq to Lowest to make the full range of performance
  538. * available if userspace wants to use any perf between lowest & lowest
  539. * nonlinear perf
  540. */
  541. policy->cpuinfo.min_freq = cppc_perf_to_khz(caps, caps->lowest_perf);
  542. policy->cpuinfo.max_freq = cppc_perf_to_khz(caps, caps->nominal_perf);
  543. policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu);
  544. policy->shared_type = cpu_data->shared_type;
  545. switch (policy->shared_type) {
  546. case CPUFREQ_SHARED_TYPE_HW:
  547. case CPUFREQ_SHARED_TYPE_NONE:
  548. /* Nothing to be done - we'll have a policy for each CPU */
  549. break;
  550. case CPUFREQ_SHARED_TYPE_ANY:
  551. /*
  552. * All CPUs in the domain will share a policy and all cpufreq
  553. * operations will use a single cppc_cpudata structure stored
  554. * in policy->driver_data.
  555. */
  556. cpumask_copy(policy->cpus, cpu_data->shared_cpu_map);
  557. break;
  558. default:
  559. pr_debug("Unsupported CPU co-ord type: %d\n",
  560. policy->shared_type);
  561. ret = -EFAULT;
  562. goto out;
  563. }
  564. policy->fast_switch_possible = cppc_allow_fast_switch();
  565. policy->dvfs_possible_from_any_cpu = true;
  566. /*
  567. * If 'highest_perf' is greater than 'nominal_perf', we assume CPU Boost
  568. * is supported.
  569. */
  570. if (caps->highest_perf > caps->nominal_perf)
  571. boost_supported = true;
  572. /* Set policy->cur to max now. The governors will adjust later. */
  573. policy->cur = cppc_perf_to_khz(caps, caps->highest_perf);
  574. cpu_data->perf_ctrls.desired_perf = caps->highest_perf;
  575. ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
  576. if (ret) {
  577. pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
  578. caps->highest_perf, cpu, ret);
  579. goto out;
  580. }
  581. cppc_cpufreq_cpu_fie_init(policy);
  582. return 0;
  583. out:
  584. cppc_cpufreq_put_cpu_data(policy);
  585. return ret;
  586. }
  587. static void cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  588. {
  589. struct cppc_cpudata *cpu_data = policy->driver_data;
  590. struct cppc_perf_caps *caps = &cpu_data->perf_caps;
  591. unsigned int cpu = policy->cpu;
  592. int ret;
  593. cppc_cpufreq_cpu_fie_exit(policy);
  594. cpu_data->perf_ctrls.desired_perf = caps->lowest_perf;
  595. ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
  596. if (ret)
  597. pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
  598. caps->lowest_perf, cpu, ret);
  599. cppc_cpufreq_put_cpu_data(policy);
  600. }
  601. static inline u64 get_delta(u64 t1, u64 t0)
  602. {
  603. if (t1 > t0 || t0 > ~(u32)0)
  604. return t1 - t0;
  605. return (u32)t1 - (u32)t0;
  606. }
  607. static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data,
  608. struct cppc_perf_fb_ctrs *fb_ctrs_t0,
  609. struct cppc_perf_fb_ctrs *fb_ctrs_t1)
  610. {
  611. u64 delta_reference, delta_delivered;
  612. u64 reference_perf;
  613. reference_perf = fb_ctrs_t0->reference_perf;
  614. delta_reference = get_delta(fb_ctrs_t1->reference,
  615. fb_ctrs_t0->reference);
  616. delta_delivered = get_delta(fb_ctrs_t1->delivered,
  617. fb_ctrs_t0->delivered);
  618. /*
  619. * Avoid divide-by zero and unchanged feedback counters.
  620. * Leave it for callers to handle.
  621. */
  622. if (!delta_reference || !delta_delivered)
  623. return 0;
  624. return (reference_perf * delta_delivered) / delta_reference;
  625. }
  626. static int cppc_get_perf_ctrs_sample(int cpu,
  627. struct cppc_perf_fb_ctrs *fb_ctrs_t0,
  628. struct cppc_perf_fb_ctrs *fb_ctrs_t1)
  629. {
  630. int ret;
  631. ret = cppc_get_perf_ctrs(cpu, fb_ctrs_t0);
  632. if (ret)
  633. return ret;
  634. udelay(2); /* 2usec delay between sampling */
  635. return cppc_get_perf_ctrs(cpu, fb_ctrs_t1);
  636. }
  637. static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)
  638. {
  639. struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
  640. struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
  641. struct cppc_cpudata *cpu_data;
  642. u64 delivered_perf;
  643. int ret;
  644. if (!policy)
  645. return 0;
  646. cpu_data = policy->driver_data;
  647. cpufreq_cpu_put(policy);
  648. ret = cppc_get_perf_ctrs_sample(cpu, &fb_ctrs_t0, &fb_ctrs_t1);
  649. if (ret) {
  650. if (ret == -EFAULT)
  651. /* Any of the associated CPPC regs is 0. */
  652. goto out_invalid_counters;
  653. else
  654. return 0;
  655. }
  656. delivered_perf = cppc_perf_from_fbctrs(cpu_data, &fb_ctrs_t0,
  657. &fb_ctrs_t1);
  658. if (!delivered_perf)
  659. goto out_invalid_counters;
  660. return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf);
  661. out_invalid_counters:
  662. /*
  663. * Feedback counters could be unchanged or 0 when a cpu enters a
  664. * low-power idle state, e.g. clock-gated or power-gated.
  665. * Use desired perf for reflecting frequency. Get the latest register
  666. * value first as some platforms may update the actual delivered perf
  667. * there; if failed, resort to the cached desired perf.
  668. */
  669. if (cppc_get_desired_perf(cpu, &delivered_perf))
  670. delivered_perf = cpu_data->perf_ctrls.desired_perf;
  671. return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf);
  672. }
  673. static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state)
  674. {
  675. struct cppc_cpudata *cpu_data = policy->driver_data;
  676. struct cppc_perf_caps *caps = &cpu_data->perf_caps;
  677. int ret;
  678. if (!boost_supported) {
  679. pr_err("BOOST not supported by CPU or firmware\n");
  680. return -EINVAL;
  681. }
  682. if (state)
  683. policy->max = cppc_perf_to_khz(caps, caps->highest_perf);
  684. else
  685. policy->max = cppc_perf_to_khz(caps, caps->nominal_perf);
  686. policy->cpuinfo.max_freq = policy->max;
  687. ret = freq_qos_update_request(policy->max_freq_req, policy->max);
  688. if (ret < 0)
  689. return ret;
  690. return 0;
  691. }
  692. static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
  693. {
  694. struct cppc_cpudata *cpu_data = policy->driver_data;
  695. return cpufreq_show_cpus(cpu_data->shared_cpu_map, buf);
  696. }
  697. cpufreq_freq_attr_ro(freqdomain_cpus);
  698. static struct freq_attr *cppc_cpufreq_attr[] = {
  699. &freqdomain_cpus,
  700. NULL,
  701. };
  702. static struct cpufreq_driver cppc_cpufreq_driver = {
  703. .flags = CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS,
  704. .verify = cppc_verify_policy,
  705. .target = cppc_cpufreq_set_target,
  706. .get = cppc_cpufreq_get_rate,
  707. .fast_switch = cppc_cpufreq_fast_switch,
  708. .init = cppc_cpufreq_cpu_init,
  709. .exit = cppc_cpufreq_cpu_exit,
  710. .set_boost = cppc_cpufreq_set_boost,
  711. .attr = cppc_cpufreq_attr,
  712. .name = "cppc_cpufreq",
  713. };
  714. /*
  715. * HISI platform does not support delivered performance counter and
  716. * reference performance counter. It can calculate the performance using the
  717. * platform specific mechanism. We reuse the desired performance register to
  718. * store the real performance calculated by the platform.
  719. */
  720. static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)
  721. {
  722. struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
  723. struct cppc_cpudata *cpu_data;
  724. u64 desired_perf;
  725. int ret;
  726. if (!policy)
  727. return -ENODEV;
  728. cpu_data = policy->driver_data;
  729. cpufreq_cpu_put(policy);
  730. ret = cppc_get_desired_perf(cpu, &desired_perf);
  731. if (ret < 0)
  732. return -EIO;
  733. return cppc_perf_to_khz(&cpu_data->perf_caps, desired_perf);
  734. }
  735. static void cppc_check_hisi_workaround(void)
  736. {
  737. struct acpi_table_header *tbl;
  738. acpi_status status = AE_OK;
  739. int i;
  740. status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
  741. if (ACPI_FAILURE(status) || !tbl)
  742. return;
  743. for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
  744. if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
  745. !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
  746. wa_info[i].oem_revision == tbl->oem_revision) {
  747. /* Overwrite the get() callback */
  748. cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
  749. fie_disabled = FIE_DISABLED;
  750. break;
  751. }
  752. }
  753. acpi_put_table(tbl);
  754. }
  755. static int __init cppc_cpufreq_init(void)
  756. {
  757. int ret;
  758. if (!acpi_cpc_valid())
  759. return -ENODEV;
  760. cppc_check_hisi_workaround();
  761. cppc_freq_invariance_init();
  762. populate_efficiency_class();
  763. ret = cpufreq_register_driver(&cppc_cpufreq_driver);
  764. if (ret)
  765. cppc_freq_invariance_exit();
  766. return ret;
  767. }
  768. static inline void free_cpu_data(void)
  769. {
  770. struct cppc_cpudata *iter, *tmp;
  771. list_for_each_entry_safe(iter, tmp, &cpu_data_list, node) {
  772. free_cpumask_var(iter->shared_cpu_map);
  773. list_del(&iter->node);
  774. kfree(iter);
  775. }
  776. }
  777. static void __exit cppc_cpufreq_exit(void)
  778. {
  779. cpufreq_unregister_driver(&cppc_cpufreq_driver);
  780. cppc_freq_invariance_exit();
  781. free_cpu_data();
  782. }
  783. module_exit(cppc_cpufreq_exit);
  784. MODULE_AUTHOR("Ashwin Chaugule");
  785. MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
  786. MODULE_LICENSE("GPL");
  787. late_initcall(cppc_cpufreq_init);
  788. static const struct acpi_device_id cppc_acpi_ids[] __used = {
  789. {ACPI_PROCESSOR_DEVICE_HID, },
  790. {}
  791. };
  792. MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);