panel-edp.c 60 KB

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  1. /*
  2. * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the
  12. * next paragraph) shall be included in all copies or substantial portions
  13. * of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/gpio/consumer.h>
  26. #include <linux/iopoll.h>
  27. #include <linux/module.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/pm_runtime.h>
  31. #include <linux/regulator/consumer.h>
  32. #include <video/display_timing.h>
  33. #include <video/of_display_timing.h>
  34. #include <video/videomode.h>
  35. #include <drm/display/drm_dp_aux_bus.h>
  36. #include <drm/display/drm_dp_helper.h>
  37. #include <drm/drm_crtc.h>
  38. #include <drm/drm_device.h>
  39. #include <drm/drm_edid.h>
  40. #include <drm/drm_panel.h>
  41. /**
  42. * struct panel_delay - Describes delays for a simple panel.
  43. */
  44. struct panel_delay {
  45. /**
  46. * @hpd_reliable: Time for HPD to be reliable
  47. *
  48. * The time (in milliseconds) that it takes after powering the panel
  49. * before the HPD signal is reliable. Ideally this is 0 but some panels,
  50. * board designs, or bad pulldown configs can cause a glitch here.
  51. *
  52. * NOTE: on some old panel data this number appears to be much too big.
  53. * Presumably some old panels simply didn't have HPD hooked up and put
  54. * the hpd_absent here because this field predates the
  55. * hpd_absent. While that works, it's non-ideal.
  56. */
  57. unsigned int hpd_reliable;
  58. /**
  59. * @hpd_absent: Time to wait if HPD isn't hooked up.
  60. *
  61. * Add this to the prepare delay if we know Hot Plug Detect isn't used.
  62. *
  63. * This is T3-max on eDP timing diagrams or the delay from power on
  64. * until HPD is guaranteed to be asserted.
  65. */
  66. unsigned int hpd_absent;
  67. /**
  68. * @powered_on_to_enable: Time between panel powered on and enable.
  69. *
  70. * The minimum time, in milliseconds, that needs to have passed
  71. * between when panel powered on and enable may begin.
  72. *
  73. * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the
  74. * power supply enabled until we can turn the backlight on and see
  75. * valid data.
  76. *
  77. * This doesn't normally need to be set if timings are already met by
  78. * prepare_to_enable or enable.
  79. */
  80. unsigned int powered_on_to_enable;
  81. /**
  82. * @prepare_to_enable: Time between prepare and enable.
  83. *
  84. * The minimum time, in milliseconds, that needs to have passed
  85. * between when prepare finished and enable may begin. If at
  86. * enable time less time has passed since prepare finished,
  87. * the driver waits for the remaining time.
  88. *
  89. * If a fixed enable delay is also specified, we'll start
  90. * counting before delaying for the fixed delay.
  91. *
  92. * If a fixed prepare delay is also specified, we won't start
  93. * counting until after the fixed delay. We can't overlap this
  94. * fixed delay with the min time because the fixed delay
  95. * doesn't happen at the end of the function if a HPD GPIO was
  96. * specified.
  97. *
  98. * In other words:
  99. * prepare()
  100. * ...
  101. * // do fixed prepare delay
  102. * // wait for HPD GPIO if applicable
  103. * // start counting for prepare_to_enable
  104. *
  105. * enable()
  106. * // do fixed enable delay
  107. * // enforce prepare_to_enable min time
  108. *
  109. * This is not specified in a standard way on eDP timing diagrams.
  110. * It is effectively the time from HPD going high till you can
  111. * turn on the backlight.
  112. */
  113. unsigned int prepare_to_enable;
  114. /**
  115. * @enable: Time for the panel to display a valid frame.
  116. *
  117. * The time (in milliseconds) that it takes for the panel to
  118. * display the first valid frame after starting to receive
  119. * video data.
  120. *
  121. * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or
  122. * the delay after link training finishes until we can turn the
  123. * backlight on and see valid data.
  124. */
  125. unsigned int enable;
  126. /**
  127. * @disable: Time for the panel to turn the display off.
  128. *
  129. * The time (in milliseconds) that it takes for the panel to
  130. * turn the display off (no content is visible).
  131. *
  132. * This is T9-min (delay from backlight off to end of valid video
  133. * data) on eDP timing diagrams. It is not common to set.
  134. */
  135. unsigned int disable;
  136. /**
  137. * @unprepare: Time to power down completely.
  138. *
  139. * The time (in milliseconds) that it takes for the panel
  140. * to power itself down completely.
  141. *
  142. * This time is used to prevent a future "prepare" from
  143. * starting until at least this many milliseconds has passed.
  144. * If at prepare time less time has passed since unprepare
  145. * finished, the driver waits for the remaining time.
  146. *
  147. * This is T12-min on eDP timing diagrams.
  148. */
  149. unsigned int unprepare;
  150. };
  151. /**
  152. * struct panel_desc - Describes a simple panel.
  153. */
  154. struct panel_desc {
  155. /**
  156. * @modes: Pointer to array of fixed modes appropriate for this panel.
  157. *
  158. * If only one mode then this can just be the address of the mode.
  159. * NOTE: cannot be used with "timings" and also if this is specified
  160. * then you cannot override the mode in the device tree.
  161. */
  162. const struct drm_display_mode *modes;
  163. /** @num_modes: Number of elements in modes array. */
  164. unsigned int num_modes;
  165. /**
  166. * @timings: Pointer to array of display timings
  167. *
  168. * NOTE: cannot be used with "modes" and also these will be used to
  169. * validate a device tree override if one is present.
  170. */
  171. const struct display_timing *timings;
  172. /** @num_timings: Number of elements in timings array. */
  173. unsigned int num_timings;
  174. /** @bpc: Bits per color. */
  175. unsigned int bpc;
  176. /** @size: Structure containing the physical size of this panel. */
  177. struct {
  178. /**
  179. * @size.width: Width (in mm) of the active display area.
  180. */
  181. unsigned int width;
  182. /**
  183. * @size.height: Height (in mm) of the active display area.
  184. */
  185. unsigned int height;
  186. } size;
  187. /** @delay: Structure containing various delay values for this panel. */
  188. struct panel_delay delay;
  189. };
  190. /**
  191. * struct edp_panel_entry - Maps panel ID to delay / panel name.
  192. */
  193. struct edp_panel_entry {
  194. /** @ident: edid identity used for panel matching. */
  195. const struct drm_edid_ident ident;
  196. /** @delay: The power sequencing delays needed for this panel. */
  197. const struct panel_delay *delay;
  198. /** @override_edid_mode: Override the mode obtained by edid. */
  199. const struct drm_display_mode *override_edid_mode;
  200. };
  201. struct panel_edp {
  202. struct drm_panel base;
  203. bool no_hpd;
  204. ktime_t prepared_time;
  205. ktime_t powered_on_time;
  206. ktime_t unprepared_time;
  207. const struct panel_desc *desc;
  208. struct regulator *supply;
  209. struct i2c_adapter *ddc;
  210. struct drm_dp_aux *aux;
  211. struct gpio_desc *enable_gpio;
  212. struct gpio_desc *hpd_gpio;
  213. const struct edp_panel_entry *detected_panel;
  214. const struct drm_edid *drm_edid;
  215. struct drm_display_mode override_mode;
  216. enum drm_panel_orientation orientation;
  217. };
  218. static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)
  219. {
  220. return container_of(panel, struct panel_edp, base);
  221. }
  222. static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,
  223. struct drm_connector *connector)
  224. {
  225. struct drm_display_mode *mode;
  226. unsigned int i, num = 0;
  227. for (i = 0; i < panel->desc->num_timings; i++) {
  228. const struct display_timing *dt = &panel->desc->timings[i];
  229. struct videomode vm;
  230. videomode_from_timing(dt, &vm);
  231. mode = drm_mode_create(connector->dev);
  232. if (!mode) {
  233. dev_err(panel->base.dev, "failed to add mode %ux%u\n",
  234. dt->hactive.typ, dt->vactive.typ);
  235. continue;
  236. }
  237. drm_display_mode_from_videomode(&vm, mode);
  238. mode->type |= DRM_MODE_TYPE_DRIVER;
  239. if (panel->desc->num_timings == 1)
  240. mode->type |= DRM_MODE_TYPE_PREFERRED;
  241. drm_mode_probed_add(connector, mode);
  242. num++;
  243. }
  244. return num;
  245. }
  246. static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,
  247. struct drm_connector *connector)
  248. {
  249. struct drm_display_mode *mode;
  250. unsigned int i, num = 0;
  251. for (i = 0; i < panel->desc->num_modes; i++) {
  252. const struct drm_display_mode *m = &panel->desc->modes[i];
  253. mode = drm_mode_duplicate(connector->dev, m);
  254. if (!mode) {
  255. dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
  256. m->hdisplay, m->vdisplay,
  257. drm_mode_vrefresh(m));
  258. continue;
  259. }
  260. mode->type |= DRM_MODE_TYPE_DRIVER;
  261. if (panel->desc->num_modes == 1)
  262. mode->type |= DRM_MODE_TYPE_PREFERRED;
  263. drm_mode_set_name(mode);
  264. drm_mode_probed_add(connector, mode);
  265. num++;
  266. }
  267. return num;
  268. }
  269. static int panel_edp_override_edid_mode(struct panel_edp *panel,
  270. struct drm_connector *connector,
  271. const struct drm_display_mode *override_mode)
  272. {
  273. struct drm_display_mode *mode;
  274. mode = drm_mode_duplicate(connector->dev, override_mode);
  275. if (!mode) {
  276. dev_err(panel->base.dev, "failed to add additional mode\n");
  277. return 0;
  278. }
  279. mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  280. drm_mode_set_name(mode);
  281. drm_mode_probed_add(connector, mode);
  282. return 1;
  283. }
  284. static int panel_edp_get_non_edid_modes(struct panel_edp *panel,
  285. struct drm_connector *connector)
  286. {
  287. struct drm_display_mode *mode;
  288. bool has_override = panel->override_mode.type;
  289. unsigned int num = 0;
  290. if (!panel->desc)
  291. return 0;
  292. if (has_override) {
  293. mode = drm_mode_duplicate(connector->dev,
  294. &panel->override_mode);
  295. if (mode) {
  296. drm_mode_probed_add(connector, mode);
  297. num = 1;
  298. } else {
  299. dev_err(panel->base.dev, "failed to add override mode\n");
  300. }
  301. }
  302. /* Only add timings if override was not there or failed to validate */
  303. if (num == 0 && panel->desc->num_timings)
  304. num = panel_edp_get_timings_modes(panel, connector);
  305. /*
  306. * Only add fixed modes if timings/override added no mode.
  307. *
  308. * We should only ever have either the display timings specified
  309. * or a fixed mode. Anything else is rather bogus.
  310. */
  311. WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
  312. if (num == 0)
  313. num = panel_edp_get_display_modes(panel, connector);
  314. connector->display_info.bpc = panel->desc->bpc;
  315. connector->display_info.width_mm = panel->desc->size.width;
  316. connector->display_info.height_mm = panel->desc->size.height;
  317. return num;
  318. }
  319. static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)
  320. {
  321. ktime_t now_ktime, min_ktime;
  322. if (!min_ms)
  323. return;
  324. min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));
  325. now_ktime = ktime_get_boottime();
  326. if (ktime_before(now_ktime, min_ktime))
  327. msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);
  328. }
  329. static int panel_edp_disable(struct drm_panel *panel)
  330. {
  331. struct panel_edp *p = to_panel_edp(panel);
  332. if (p->desc->delay.disable)
  333. msleep(p->desc->delay.disable);
  334. return 0;
  335. }
  336. static int panel_edp_suspend(struct device *dev)
  337. {
  338. struct panel_edp *p = dev_get_drvdata(dev);
  339. drm_dp_dpcd_set_powered(p->aux, false);
  340. gpiod_set_value_cansleep(p->enable_gpio, 0);
  341. regulator_disable(p->supply);
  342. p->unprepared_time = ktime_get_boottime();
  343. return 0;
  344. }
  345. static int panel_edp_unprepare(struct drm_panel *panel)
  346. {
  347. int ret;
  348. ret = pm_runtime_put_sync_suspend(panel->dev);
  349. if (ret < 0)
  350. return ret;
  351. return 0;
  352. }
  353. static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)
  354. {
  355. p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
  356. if (IS_ERR(p->hpd_gpio))
  357. return dev_err_probe(dev, PTR_ERR(p->hpd_gpio),
  358. "failed to get 'hpd' GPIO\n");
  359. return 0;
  360. }
  361. static bool panel_edp_can_read_hpd(struct panel_edp *p)
  362. {
  363. return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted));
  364. }
  365. static int panel_edp_prepare_once(struct panel_edp *p)
  366. {
  367. struct device *dev = p->base.dev;
  368. unsigned int delay;
  369. int err;
  370. int hpd_asserted;
  371. unsigned long hpd_wait_us;
  372. panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);
  373. err = regulator_enable(p->supply);
  374. if (err < 0) {
  375. dev_err(dev, "failed to enable supply: %d\n", err);
  376. return err;
  377. }
  378. gpiod_set_value_cansleep(p->enable_gpio, 1);
  379. drm_dp_dpcd_set_powered(p->aux, true);
  380. p->powered_on_time = ktime_get_boottime();
  381. delay = p->desc->delay.hpd_reliable;
  382. if (p->no_hpd)
  383. delay = max(delay, p->desc->delay.hpd_absent);
  384. if (delay)
  385. msleep(delay);
  386. if (panel_edp_can_read_hpd(p)) {
  387. if (p->desc->delay.hpd_absent)
  388. hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;
  389. else
  390. hpd_wait_us = 2000000;
  391. if (p->hpd_gpio) {
  392. err = readx_poll_timeout(gpiod_get_value_cansleep,
  393. p->hpd_gpio, hpd_asserted,
  394. hpd_asserted, 1000, hpd_wait_us);
  395. if (hpd_asserted < 0)
  396. err = hpd_asserted;
  397. } else {
  398. err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us);
  399. }
  400. if (err) {
  401. if (err != -ETIMEDOUT)
  402. dev_err(dev,
  403. "error waiting for hpd GPIO: %d\n", err);
  404. goto error;
  405. }
  406. }
  407. p->prepared_time = ktime_get_boottime();
  408. return 0;
  409. error:
  410. drm_dp_dpcd_set_powered(p->aux, false);
  411. gpiod_set_value_cansleep(p->enable_gpio, 0);
  412. regulator_disable(p->supply);
  413. p->unprepared_time = ktime_get_boottime();
  414. return err;
  415. }
  416. /*
  417. * Some panels simply don't always come up and need to be power cycled to
  418. * work properly. We'll allow for a handful of retries.
  419. */
  420. #define MAX_PANEL_PREPARE_TRIES 5
  421. static int panel_edp_resume(struct device *dev)
  422. {
  423. struct panel_edp *p = dev_get_drvdata(dev);
  424. int ret;
  425. int try;
  426. for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {
  427. ret = panel_edp_prepare_once(p);
  428. if (ret != -ETIMEDOUT)
  429. break;
  430. }
  431. if (ret == -ETIMEDOUT)
  432. dev_err(dev, "Prepare timeout after %d tries\n", try);
  433. else if (try)
  434. dev_warn(dev, "Prepare needed %d retries\n", try);
  435. return ret;
  436. }
  437. static int panel_edp_prepare(struct drm_panel *panel)
  438. {
  439. int ret;
  440. ret = pm_runtime_get_sync(panel->dev);
  441. if (ret < 0) {
  442. pm_runtime_put_autosuspend(panel->dev);
  443. return ret;
  444. }
  445. return 0;
  446. }
  447. static int panel_edp_enable(struct drm_panel *panel)
  448. {
  449. struct panel_edp *p = to_panel_edp(panel);
  450. unsigned int delay;
  451. delay = p->desc->delay.enable;
  452. /*
  453. * If there is a "prepare_to_enable" delay then that's supposed to be
  454. * the delay from HPD going high until we can turn the backlight on.
  455. * However, we can only count this if HPD is readable by the panel
  456. * driver.
  457. *
  458. * If we aren't handling the HPD pin ourselves then the best we
  459. * can do is assume that HPD went high immediately before we were
  460. * called (and link training took zero time). Note that "no-hpd"
  461. * actually counts as handling HPD ourselves since we're doing the
  462. * worst case delay (in prepare) ourselves.
  463. *
  464. * NOTE: if we ever end up in this "if" statement then we're
  465. * guaranteed that the panel_edp_wait() call below will do no delay.
  466. * It already handles that case, though, so we don't need any special
  467. * code for it.
  468. */
  469. if (p->desc->delay.prepare_to_enable &&
  470. !panel_edp_can_read_hpd(p) && !p->no_hpd)
  471. delay = max(delay, p->desc->delay.prepare_to_enable);
  472. if (delay)
  473. msleep(delay);
  474. panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);
  475. panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable);
  476. return 0;
  477. }
  478. static int panel_edp_get_modes(struct drm_panel *panel,
  479. struct drm_connector *connector)
  480. {
  481. struct panel_edp *p = to_panel_edp(panel);
  482. int num = 0;
  483. bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes;
  484. bool has_override_edid_mode = p->detected_panel &&
  485. p->detected_panel != ERR_PTR(-EINVAL) &&
  486. p->detected_panel->override_edid_mode;
  487. /* probe EDID if a DDC bus is available */
  488. if (p->ddc) {
  489. pm_runtime_get_sync(panel->dev);
  490. if (!p->drm_edid)
  491. p->drm_edid = drm_edid_read_ddc(connector, p->ddc);
  492. drm_edid_connector_update(connector, p->drm_edid);
  493. /*
  494. * If both edid and hard-coded modes exists, skip edid modes to
  495. * avoid multiple preferred modes.
  496. */
  497. if (p->drm_edid && !has_hard_coded_modes) {
  498. if (has_override_edid_mode) {
  499. /*
  500. * override_edid_mode is specified. Use
  501. * override_edid_mode instead of from edid.
  502. */
  503. num += panel_edp_override_edid_mode(p, connector,
  504. p->detected_panel->override_edid_mode);
  505. } else {
  506. num += drm_edid_connector_add_modes(connector);
  507. }
  508. }
  509. pm_runtime_mark_last_busy(panel->dev);
  510. pm_runtime_put_autosuspend(panel->dev);
  511. }
  512. if (has_hard_coded_modes)
  513. num += panel_edp_get_non_edid_modes(p, connector);
  514. else if (!num)
  515. dev_warn(p->base.dev, "No display modes\n");
  516. /*
  517. * TODO: Remove once all drm drivers call
  518. * drm_connector_set_orientation_from_panel()
  519. */
  520. drm_connector_set_panel_orientation(connector, p->orientation);
  521. return num;
  522. }
  523. static int panel_edp_get_timings(struct drm_panel *panel,
  524. unsigned int num_timings,
  525. struct display_timing *timings)
  526. {
  527. struct panel_edp *p = to_panel_edp(panel);
  528. unsigned int i;
  529. if (p->desc->num_timings < num_timings)
  530. num_timings = p->desc->num_timings;
  531. if (timings)
  532. for (i = 0; i < num_timings; i++)
  533. timings[i] = p->desc->timings[i];
  534. return p->desc->num_timings;
  535. }
  536. static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel)
  537. {
  538. struct panel_edp *p = to_panel_edp(panel);
  539. return p->orientation;
  540. }
  541. static int detected_panel_show(struct seq_file *s, void *data)
  542. {
  543. struct drm_panel *panel = s->private;
  544. struct panel_edp *p = to_panel_edp(panel);
  545. if (IS_ERR(p->detected_panel))
  546. seq_puts(s, "UNKNOWN\n");
  547. else if (!p->detected_panel)
  548. seq_puts(s, "HARDCODED\n");
  549. else
  550. seq_printf(s, "%s\n", p->detected_panel->ident.name);
  551. return 0;
  552. }
  553. DEFINE_SHOW_ATTRIBUTE(detected_panel);
  554. static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)
  555. {
  556. debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);
  557. }
  558. static const struct drm_panel_funcs panel_edp_funcs = {
  559. .disable = panel_edp_disable,
  560. .unprepare = panel_edp_unprepare,
  561. .prepare = panel_edp_prepare,
  562. .enable = panel_edp_enable,
  563. .get_modes = panel_edp_get_modes,
  564. .get_orientation = panel_edp_get_orientation,
  565. .get_timings = panel_edp_get_timings,
  566. .debugfs_init = panel_edp_debugfs_init,
  567. };
  568. #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \
  569. (to_check->field.typ >= bounds->field.min && \
  570. to_check->field.typ <= bounds->field.max)
  571. static void panel_edp_parse_panel_timing_node(struct device *dev,
  572. struct panel_edp *panel,
  573. const struct display_timing *ot)
  574. {
  575. const struct panel_desc *desc = panel->desc;
  576. struct videomode vm;
  577. unsigned int i;
  578. if (WARN_ON(desc->num_modes)) {
  579. dev_err(dev, "Reject override mode: panel has a fixed mode\n");
  580. return;
  581. }
  582. if (WARN_ON(!desc->num_timings)) {
  583. dev_err(dev, "Reject override mode: no timings specified\n");
  584. return;
  585. }
  586. for (i = 0; i < panel->desc->num_timings; i++) {
  587. const struct display_timing *dt = &panel->desc->timings[i];
  588. if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||
  589. !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||
  590. !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||
  591. !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||
  592. !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||
  593. !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||
  594. !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||
  595. !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))
  596. continue;
  597. if (ot->flags != dt->flags)
  598. continue;
  599. videomode_from_timing(ot, &vm);
  600. drm_display_mode_from_videomode(&vm, &panel->override_mode);
  601. panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
  602. DRM_MODE_TYPE_PREFERRED;
  603. break;
  604. }
  605. if (WARN_ON(!panel->override_mode.type))
  606. dev_err(dev, "Reject override mode: No display_timing found\n");
  607. }
  608. static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid);
  609. static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc)
  610. {
  611. /*
  612. * It's highly likely that the panel will work if we use very
  613. * conservative timings, so let's do that.
  614. *
  615. * Nearly all panels have a "unprepare" delay of 500 ms though
  616. * there are a few with 1000. Let's stick 2000 in just to be
  617. * super conservative.
  618. *
  619. * An "enable" delay of 80 ms seems the most common, but we'll
  620. * throw in 200 ms to be safe.
  621. */
  622. desc->delay.unprepare = 2000;
  623. desc->delay.enable = 200;
  624. panel->detected_panel = ERR_PTR(-EINVAL);
  625. }
  626. static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)
  627. {
  628. struct panel_desc *desc;
  629. const struct drm_edid *base_block;
  630. u32 panel_id;
  631. char vend[4];
  632. u16 product_id;
  633. u32 reliable_ms = 0;
  634. u32 absent_ms = 0;
  635. int ret;
  636. desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
  637. if (!desc)
  638. return -ENOMEM;
  639. panel->desc = desc;
  640. /*
  641. * Read the dts properties for the initial probe. These are used by
  642. * the runtime resume code which will get called by the
  643. * pm_runtime_get_sync() call below.
  644. */
  645. of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);
  646. desc->delay.hpd_reliable = reliable_ms;
  647. of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);
  648. desc->delay.hpd_absent = absent_ms;
  649. /* Power the panel on so we can read the EDID */
  650. ret = pm_runtime_get_sync(dev);
  651. if (ret < 0) {
  652. dev_err(dev,
  653. "Couldn't power on panel to ID it; using conservative timings: %d\n",
  654. ret);
  655. panel_edp_set_conservative_timings(panel, desc);
  656. goto exit;
  657. }
  658. base_block = drm_edid_read_base_block(panel->ddc);
  659. if (base_block) {
  660. panel_id = drm_edid_get_panel_id(base_block);
  661. } else {
  662. dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n");
  663. panel_edp_set_conservative_timings(panel, desc);
  664. goto exit;
  665. }
  666. drm_edid_decode_panel_id(panel_id, vend, &product_id);
  667. panel->detected_panel = find_edp_panel(panel_id, base_block);
  668. drm_edid_free(base_block);
  669. /*
  670. * We're using non-optimized timings and want it really obvious that
  671. * someone needs to add an entry to the table, so we'll do a WARN_ON
  672. * splat.
  673. */
  674. if (WARN_ON(!panel->detected_panel)) {
  675. dev_warn(dev,
  676. "Unknown panel %s %#06x, using conservative timings\n",
  677. vend, product_id);
  678. panel_edp_set_conservative_timings(panel, desc);
  679. } else {
  680. dev_info(dev, "Detected %s %s (%#06x)\n",
  681. vend, panel->detected_panel->ident.name, product_id);
  682. /* Update the delay; everything else comes from EDID */
  683. desc->delay = *panel->detected_panel->delay;
  684. }
  685. exit:
  686. pm_runtime_mark_last_busy(dev);
  687. pm_runtime_put_autosuspend(dev);
  688. return 0;
  689. }
  690. static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
  691. struct drm_dp_aux *aux)
  692. {
  693. struct panel_edp *panel;
  694. struct display_timing dt;
  695. struct device_node *ddc;
  696. int err;
  697. panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
  698. if (!panel)
  699. return -ENOMEM;
  700. panel->prepared_time = 0;
  701. panel->desc = desc;
  702. panel->aux = aux;
  703. panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
  704. if (!panel->no_hpd) {
  705. err = panel_edp_get_hpd_gpio(dev, panel);
  706. if (err)
  707. return err;
  708. }
  709. panel->supply = devm_regulator_get(dev, "power");
  710. if (IS_ERR(panel->supply))
  711. return PTR_ERR(panel->supply);
  712. panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
  713. GPIOD_OUT_LOW);
  714. if (IS_ERR(panel->enable_gpio))
  715. return dev_err_probe(dev, PTR_ERR(panel->enable_gpio),
  716. "failed to request GPIO\n");
  717. err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
  718. if (err) {
  719. dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
  720. return err;
  721. }
  722. ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
  723. if (ddc) {
  724. panel->ddc = of_find_i2c_adapter_by_node(ddc);
  725. of_node_put(ddc);
  726. if (!panel->ddc)
  727. return -EPROBE_DEFER;
  728. } else if (aux) {
  729. panel->ddc = &aux->ddc;
  730. }
  731. if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
  732. panel_edp_parse_panel_timing_node(dev, panel, &dt);
  733. dev_set_drvdata(dev, panel);
  734. drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);
  735. err = drm_panel_of_backlight(&panel->base);
  736. if (err)
  737. goto err_finished_ddc_init;
  738. /*
  739. * We use runtime PM for prepare / unprepare since those power the panel
  740. * on and off and those can be very slow operations. This is important
  741. * to optimize powering the panel on briefly to read the EDID before
  742. * fully enabling the panel.
  743. */
  744. pm_runtime_enable(dev);
  745. pm_runtime_set_autosuspend_delay(dev, 1000);
  746. pm_runtime_use_autosuspend(dev);
  747. if (of_device_is_compatible(dev->of_node, "edp-panel")) {
  748. err = generic_edp_panel_probe(dev, panel);
  749. if (err) {
  750. dev_err_probe(dev, err,
  751. "Couldn't detect panel nor find a fallback\n");
  752. goto err_finished_pm_runtime;
  753. }
  754. /* generic_edp_panel_probe() replaces desc in the panel */
  755. desc = panel->desc;
  756. } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {
  757. dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);
  758. }
  759. if (!panel->base.backlight && panel->aux) {
  760. pm_runtime_get_sync(dev);
  761. err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);
  762. pm_runtime_mark_last_busy(dev);
  763. pm_runtime_put_autosuspend(dev);
  764. /*
  765. * Warn if we get an error, but don't consider it fatal. Having
  766. * a panel where we can't control the backlight is better than
  767. * no panel.
  768. */
  769. if (err)
  770. dev_warn(dev, "failed to register dp aux backlight: %d\n", err);
  771. }
  772. drm_panel_add(&panel->base);
  773. return 0;
  774. err_finished_pm_runtime:
  775. pm_runtime_dont_use_autosuspend(dev);
  776. pm_runtime_disable(dev);
  777. err_finished_ddc_init:
  778. if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
  779. put_device(&panel->ddc->dev);
  780. return err;
  781. }
  782. static void panel_edp_shutdown(struct device *dev)
  783. {
  784. struct panel_edp *panel = dev_get_drvdata(dev);
  785. /*
  786. * NOTE: the following two calls don't really belong here. It is the
  787. * responsibility of a correctly written DRM modeset driver to call
  788. * drm_atomic_helper_shutdown() at shutdown time and that should
  789. * cause the panel to be disabled / unprepared if needed. For now,
  790. * however, we'll keep these calls due to the sheer number of
  791. * different DRM modeset drivers used with panel-edp. Once we've
  792. * confirmed that all DRM modeset drivers using this panel properly
  793. * call drm_atomic_helper_shutdown() we can simply delete the two
  794. * calls below.
  795. *
  796. * TO BE EXPLICIT: THE CALLS BELOW SHOULDN'T BE COPIED TO ANY NEW
  797. * PANEL DRIVERS.
  798. *
  799. * FIXME: If we're still haven't figured out if all DRM modeset
  800. * drivers properly call drm_atomic_helper_shutdown() but we _have_
  801. * managed to make sure that DRM modeset drivers get their shutdown()
  802. * callback before the panel's shutdown() callback (perhaps using
  803. * device link), we could add a WARN_ON here to help move forward.
  804. */
  805. if (panel->base.enabled)
  806. drm_panel_disable(&panel->base);
  807. if (panel->base.prepared)
  808. drm_panel_unprepare(&panel->base);
  809. }
  810. static void panel_edp_remove(struct device *dev)
  811. {
  812. struct panel_edp *panel = dev_get_drvdata(dev);
  813. drm_panel_remove(&panel->base);
  814. panel_edp_shutdown(dev);
  815. pm_runtime_dont_use_autosuspend(dev);
  816. pm_runtime_disable(dev);
  817. if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
  818. put_device(&panel->ddc->dev);
  819. drm_edid_free(panel->drm_edid);
  820. panel->drm_edid = NULL;
  821. }
  822. static const struct display_timing auo_b101ean01_timing = {
  823. .pixelclock = { 65300000, 72500000, 75000000 },
  824. .hactive = { 1280, 1280, 1280 },
  825. .hfront_porch = { 18, 119, 119 },
  826. .hback_porch = { 21, 21, 21 },
  827. .hsync_len = { 32, 32, 32 },
  828. .vactive = { 800, 800, 800 },
  829. .vfront_porch = { 4, 4, 4 },
  830. .vback_porch = { 8, 8, 8 },
  831. .vsync_len = { 18, 20, 20 },
  832. };
  833. static const struct panel_desc auo_b101ean01 = {
  834. .timings = &auo_b101ean01_timing,
  835. .num_timings = 1,
  836. .bpc = 6,
  837. .size = {
  838. .width = 217,
  839. .height = 136,
  840. },
  841. };
  842. static const struct drm_display_mode auo_b116xa3_mode = {
  843. .clock = 70589,
  844. .hdisplay = 1366,
  845. .hsync_start = 1366 + 40,
  846. .hsync_end = 1366 + 40 + 40,
  847. .htotal = 1366 + 40 + 40 + 32,
  848. .vdisplay = 768,
  849. .vsync_start = 768 + 10,
  850. .vsync_end = 768 + 10 + 12,
  851. .vtotal = 768 + 10 + 12 + 6,
  852. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  853. };
  854. static const struct drm_display_mode auo_b116xak01_mode = {
  855. .clock = 69300,
  856. .hdisplay = 1366,
  857. .hsync_start = 1366 + 48,
  858. .hsync_end = 1366 + 48 + 32,
  859. .htotal = 1366 + 48 + 32 + 10,
  860. .vdisplay = 768,
  861. .vsync_start = 768 + 4,
  862. .vsync_end = 768 + 4 + 6,
  863. .vtotal = 768 + 4 + 6 + 15,
  864. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  865. };
  866. static const struct panel_desc auo_b116xak01 = {
  867. .modes = &auo_b116xak01_mode,
  868. .num_modes = 1,
  869. .bpc = 6,
  870. .size = {
  871. .width = 256,
  872. .height = 144,
  873. },
  874. .delay = {
  875. .hpd_absent = 200,
  876. .unprepare = 500,
  877. .enable = 50,
  878. },
  879. };
  880. static const struct drm_display_mode auo_b133htn01_mode = {
  881. .clock = 150660,
  882. .hdisplay = 1920,
  883. .hsync_start = 1920 + 172,
  884. .hsync_end = 1920 + 172 + 80,
  885. .htotal = 1920 + 172 + 80 + 60,
  886. .vdisplay = 1080,
  887. .vsync_start = 1080 + 25,
  888. .vsync_end = 1080 + 25 + 10,
  889. .vtotal = 1080 + 25 + 10 + 10,
  890. };
  891. static const struct panel_desc auo_b133htn01 = {
  892. .modes = &auo_b133htn01_mode,
  893. .num_modes = 1,
  894. .bpc = 6,
  895. .size = {
  896. .width = 293,
  897. .height = 165,
  898. },
  899. .delay = {
  900. .hpd_reliable = 105,
  901. .enable = 20,
  902. .unprepare = 50,
  903. },
  904. };
  905. static const struct drm_display_mode auo_b133xtn01_mode = {
  906. .clock = 69500,
  907. .hdisplay = 1366,
  908. .hsync_start = 1366 + 48,
  909. .hsync_end = 1366 + 48 + 32,
  910. .htotal = 1366 + 48 + 32 + 20,
  911. .vdisplay = 768,
  912. .vsync_start = 768 + 3,
  913. .vsync_end = 768 + 3 + 6,
  914. .vtotal = 768 + 3 + 6 + 13,
  915. };
  916. static const struct panel_desc auo_b133xtn01 = {
  917. .modes = &auo_b133xtn01_mode,
  918. .num_modes = 1,
  919. .bpc = 6,
  920. .size = {
  921. .width = 293,
  922. .height = 165,
  923. },
  924. };
  925. static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
  926. {
  927. .clock = 71900,
  928. .hdisplay = 1280,
  929. .hsync_start = 1280 + 48,
  930. .hsync_end = 1280 + 48 + 32,
  931. .htotal = 1280 + 48 + 32 + 80,
  932. .vdisplay = 800,
  933. .vsync_start = 800 + 3,
  934. .vsync_end = 800 + 3 + 5,
  935. .vtotal = 800 + 3 + 5 + 24,
  936. },
  937. {
  938. .clock = 57500,
  939. .hdisplay = 1280,
  940. .hsync_start = 1280 + 48,
  941. .hsync_end = 1280 + 48 + 32,
  942. .htotal = 1280 + 48 + 32 + 80,
  943. .vdisplay = 800,
  944. .vsync_start = 800 + 3,
  945. .vsync_end = 800 + 3 + 5,
  946. .vtotal = 800 + 3 + 5 + 24,
  947. },
  948. };
  949. static const struct panel_desc boe_nv101wxmn51 = {
  950. .modes = boe_nv101wxmn51_modes,
  951. .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
  952. .bpc = 8,
  953. .size = {
  954. .width = 217,
  955. .height = 136,
  956. },
  957. .delay = {
  958. /* TODO: should be hpd-absent and no-hpd should be set? */
  959. .hpd_reliable = 210,
  960. .enable = 50,
  961. .unprepare = 160,
  962. },
  963. };
  964. static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {
  965. {
  966. .clock = 207800,
  967. .hdisplay = 2160,
  968. .hsync_start = 2160 + 48,
  969. .hsync_end = 2160 + 48 + 32,
  970. .htotal = 2160 + 48 + 32 + 100,
  971. .vdisplay = 1440,
  972. .vsync_start = 1440 + 3,
  973. .vsync_end = 1440 + 3 + 6,
  974. .vtotal = 1440 + 3 + 6 + 31,
  975. .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
  976. },
  977. {
  978. .clock = 138500,
  979. .hdisplay = 2160,
  980. .hsync_start = 2160 + 48,
  981. .hsync_end = 2160 + 48 + 32,
  982. .htotal = 2160 + 48 + 32 + 100,
  983. .vdisplay = 1440,
  984. .vsync_start = 1440 + 3,
  985. .vsync_end = 1440 + 3 + 6,
  986. .vtotal = 1440 + 3 + 6 + 31,
  987. .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
  988. },
  989. };
  990. static const struct panel_desc boe_nv110wtm_n61 = {
  991. .modes = boe_nv110wtm_n61_modes,
  992. .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),
  993. .bpc = 8,
  994. .size = {
  995. .width = 233,
  996. .height = 155,
  997. },
  998. .delay = {
  999. .hpd_absent = 200,
  1000. .prepare_to_enable = 80,
  1001. .enable = 50,
  1002. .unprepare = 500,
  1003. },
  1004. };
  1005. /* Also used for boe_nv133fhm_n62 */
  1006. static const struct drm_display_mode boe_nv133fhm_n61_modes = {
  1007. .clock = 147840,
  1008. .hdisplay = 1920,
  1009. .hsync_start = 1920 + 48,
  1010. .hsync_end = 1920 + 48 + 32,
  1011. .htotal = 1920 + 48 + 32 + 200,
  1012. .vdisplay = 1080,
  1013. .vsync_start = 1080 + 3,
  1014. .vsync_end = 1080 + 3 + 6,
  1015. .vtotal = 1080 + 3 + 6 + 31,
  1016. .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
  1017. };
  1018. /* Also used for boe_nv133fhm_n62 */
  1019. static const struct panel_desc boe_nv133fhm_n61 = {
  1020. .modes = &boe_nv133fhm_n61_modes,
  1021. .num_modes = 1,
  1022. .bpc = 6,
  1023. .size = {
  1024. .width = 294,
  1025. .height = 165,
  1026. },
  1027. .delay = {
  1028. /*
  1029. * When power is first given to the panel there's a short
  1030. * spike on the HPD line. It was explained that this spike
  1031. * was until the TCON data download was complete. On
  1032. * one system this was measured at 8 ms. We'll put 15 ms
  1033. * in the prepare delay just to be safe. That means:
  1034. * - If HPD isn't hooked up you still have 200 ms delay.
  1035. * - If HPD is hooked up we won't try to look at it for the
  1036. * first 15 ms.
  1037. */
  1038. .hpd_reliable = 15,
  1039. .hpd_absent = 200,
  1040. .unprepare = 500,
  1041. },
  1042. };
  1043. static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
  1044. {
  1045. .clock = 148500,
  1046. .hdisplay = 1920,
  1047. .hsync_start = 1920 + 48,
  1048. .hsync_end = 1920 + 48 + 32,
  1049. .htotal = 2200,
  1050. .vdisplay = 1080,
  1051. .vsync_start = 1080 + 3,
  1052. .vsync_end = 1080 + 3 + 5,
  1053. .vtotal = 1125,
  1054. },
  1055. };
  1056. static const struct panel_desc boe_nv140fhmn49 = {
  1057. .modes = boe_nv140fhmn49_modes,
  1058. .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
  1059. .bpc = 6,
  1060. .size = {
  1061. .width = 309,
  1062. .height = 174,
  1063. },
  1064. .delay = {
  1065. /* TODO: should be hpd-absent and no-hpd should be set? */
  1066. .hpd_reliable = 210,
  1067. .enable = 50,
  1068. .unprepare = 160,
  1069. },
  1070. };
  1071. static const struct drm_display_mode innolux_n116bca_ea1_mode = {
  1072. .clock = 76420,
  1073. .hdisplay = 1366,
  1074. .hsync_start = 1366 + 136,
  1075. .hsync_end = 1366 + 136 + 30,
  1076. .htotal = 1366 + 136 + 30 + 60,
  1077. .vdisplay = 768,
  1078. .vsync_start = 768 + 8,
  1079. .vsync_end = 768 + 8 + 12,
  1080. .vtotal = 768 + 8 + 12 + 12,
  1081. .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
  1082. };
  1083. static const struct panel_desc innolux_n116bca_ea1 = {
  1084. .modes = &innolux_n116bca_ea1_mode,
  1085. .num_modes = 1,
  1086. .bpc = 6,
  1087. .size = {
  1088. .width = 256,
  1089. .height = 144,
  1090. },
  1091. .delay = {
  1092. .hpd_absent = 200,
  1093. .enable = 80,
  1094. .disable = 50,
  1095. .unprepare = 500,
  1096. },
  1097. };
  1098. /*
  1099. * Datasheet specifies that at 60 Hz refresh rate:
  1100. * - total horizontal time: { 1506, 1592, 1716 }
  1101. * - total vertical time: { 788, 800, 868 }
  1102. *
  1103. * ...but doesn't go into exactly how that should be split into a front
  1104. * porch, back porch, or sync length. For now we'll leave a single setting
  1105. * here which allows a bit of tweaking of the pixel clock at the expense of
  1106. * refresh rate.
  1107. */
  1108. static const struct display_timing innolux_n116bge_timing = {
  1109. .pixelclock = { 72600000, 76420000, 80240000 },
  1110. .hactive = { 1366, 1366, 1366 },
  1111. .hfront_porch = { 136, 136, 136 },
  1112. .hback_porch = { 60, 60, 60 },
  1113. .hsync_len = { 30, 30, 30 },
  1114. .vactive = { 768, 768, 768 },
  1115. .vfront_porch = { 8, 8, 8 },
  1116. .vback_porch = { 12, 12, 12 },
  1117. .vsync_len = { 12, 12, 12 },
  1118. .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
  1119. };
  1120. static const struct panel_desc innolux_n116bge = {
  1121. .timings = &innolux_n116bge_timing,
  1122. .num_timings = 1,
  1123. .bpc = 6,
  1124. .size = {
  1125. .width = 256,
  1126. .height = 144,
  1127. },
  1128. };
  1129. static const struct drm_display_mode innolux_n125hce_gn1_mode = {
  1130. .clock = 162000,
  1131. .hdisplay = 1920,
  1132. .hsync_start = 1920 + 40,
  1133. .hsync_end = 1920 + 40 + 40,
  1134. .htotal = 1920 + 40 + 40 + 80,
  1135. .vdisplay = 1080,
  1136. .vsync_start = 1080 + 4,
  1137. .vsync_end = 1080 + 4 + 4,
  1138. .vtotal = 1080 + 4 + 4 + 24,
  1139. };
  1140. static const struct panel_desc innolux_n125hce_gn1 = {
  1141. .modes = &innolux_n125hce_gn1_mode,
  1142. .num_modes = 1,
  1143. .bpc = 8,
  1144. .size = {
  1145. .width = 276,
  1146. .height = 155,
  1147. },
  1148. };
  1149. static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
  1150. .clock = 206016,
  1151. .hdisplay = 2160,
  1152. .hsync_start = 2160 + 48,
  1153. .hsync_end = 2160 + 48 + 32,
  1154. .htotal = 2160 + 48 + 32 + 80,
  1155. .vdisplay = 1440,
  1156. .vsync_start = 1440 + 3,
  1157. .vsync_end = 1440 + 3 + 10,
  1158. .vtotal = 1440 + 3 + 10 + 27,
  1159. .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
  1160. };
  1161. static const struct panel_desc innolux_p120zdg_bf1 = {
  1162. .modes = &innolux_p120zdg_bf1_mode,
  1163. .num_modes = 1,
  1164. .bpc = 8,
  1165. .size = {
  1166. .width = 254,
  1167. .height = 169,
  1168. },
  1169. .delay = {
  1170. .hpd_absent = 200,
  1171. .unprepare = 500,
  1172. },
  1173. };
  1174. static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
  1175. .clock = 81000,
  1176. .hdisplay = 1366,
  1177. .hsync_start = 1366 + 40,
  1178. .hsync_end = 1366 + 40 + 32,
  1179. .htotal = 1366 + 40 + 32 + 62,
  1180. .vdisplay = 768,
  1181. .vsync_start = 768 + 5,
  1182. .vsync_end = 768 + 5 + 5,
  1183. .vtotal = 768 + 5 + 5 + 122,
  1184. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  1185. };
  1186. static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
  1187. .modes = &kingdisplay_kd116n21_30nv_a010_mode,
  1188. .num_modes = 1,
  1189. .bpc = 6,
  1190. .size = {
  1191. .width = 256,
  1192. .height = 144,
  1193. },
  1194. .delay = {
  1195. .hpd_absent = 200,
  1196. },
  1197. };
  1198. static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
  1199. .clock = 200000,
  1200. .hdisplay = 1536,
  1201. .hsync_start = 1536 + 12,
  1202. .hsync_end = 1536 + 12 + 16,
  1203. .htotal = 1536 + 12 + 16 + 48,
  1204. .vdisplay = 2048,
  1205. .vsync_start = 2048 + 8,
  1206. .vsync_end = 2048 + 8 + 4,
  1207. .vtotal = 2048 + 8 + 4 + 8,
  1208. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  1209. };
  1210. static const struct panel_desc lg_lp079qx1_sp0v = {
  1211. .modes = &lg_lp079qx1_sp0v_mode,
  1212. .num_modes = 1,
  1213. .size = {
  1214. .width = 129,
  1215. .height = 171,
  1216. },
  1217. };
  1218. static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
  1219. .clock = 205210,
  1220. .hdisplay = 2048,
  1221. .hsync_start = 2048 + 150,
  1222. .hsync_end = 2048 + 150 + 5,
  1223. .htotal = 2048 + 150 + 5 + 5,
  1224. .vdisplay = 1536,
  1225. .vsync_start = 1536 + 3,
  1226. .vsync_end = 1536 + 3 + 1,
  1227. .vtotal = 1536 + 3 + 1 + 9,
  1228. };
  1229. static const struct panel_desc lg_lp097qx1_spa1 = {
  1230. .modes = &lg_lp097qx1_spa1_mode,
  1231. .num_modes = 1,
  1232. .size = {
  1233. .width = 208,
  1234. .height = 147,
  1235. },
  1236. };
  1237. static const struct drm_display_mode lg_lp120up1_mode = {
  1238. .clock = 162300,
  1239. .hdisplay = 1920,
  1240. .hsync_start = 1920 + 40,
  1241. .hsync_end = 1920 + 40 + 40,
  1242. .htotal = 1920 + 40 + 40 + 80,
  1243. .vdisplay = 1280,
  1244. .vsync_start = 1280 + 4,
  1245. .vsync_end = 1280 + 4 + 4,
  1246. .vtotal = 1280 + 4 + 4 + 12,
  1247. };
  1248. static const struct panel_desc lg_lp120up1 = {
  1249. .modes = &lg_lp120up1_mode,
  1250. .num_modes = 1,
  1251. .bpc = 8,
  1252. .size = {
  1253. .width = 267,
  1254. .height = 183,
  1255. },
  1256. };
  1257. static const struct drm_display_mode lg_lp129qe_mode = {
  1258. .clock = 285250,
  1259. .hdisplay = 2560,
  1260. .hsync_start = 2560 + 48,
  1261. .hsync_end = 2560 + 48 + 32,
  1262. .htotal = 2560 + 48 + 32 + 80,
  1263. .vdisplay = 1700,
  1264. .vsync_start = 1700 + 3,
  1265. .vsync_end = 1700 + 3 + 10,
  1266. .vtotal = 1700 + 3 + 10 + 36,
  1267. };
  1268. static const struct panel_desc lg_lp129qe = {
  1269. .modes = &lg_lp129qe_mode,
  1270. .num_modes = 1,
  1271. .bpc = 8,
  1272. .size = {
  1273. .width = 272,
  1274. .height = 181,
  1275. },
  1276. };
  1277. static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
  1278. {
  1279. .clock = 138500,
  1280. .hdisplay = 1920,
  1281. .hsync_start = 1920 + 48,
  1282. .hsync_end = 1920 + 48 + 32,
  1283. .htotal = 1920 + 48 + 32 + 80,
  1284. .vdisplay = 1080,
  1285. .vsync_start = 1080 + 3,
  1286. .vsync_end = 1080 + 3 + 5,
  1287. .vtotal = 1080 + 3 + 5 + 23,
  1288. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  1289. }, {
  1290. .clock = 110920,
  1291. .hdisplay = 1920,
  1292. .hsync_start = 1920 + 48,
  1293. .hsync_end = 1920 + 48 + 32,
  1294. .htotal = 1920 + 48 + 32 + 80,
  1295. .vdisplay = 1080,
  1296. .vsync_start = 1080 + 3,
  1297. .vsync_end = 1080 + 3 + 5,
  1298. .vtotal = 1080 + 3 + 5 + 23,
  1299. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  1300. }
  1301. };
  1302. static const struct panel_desc neweast_wjfh116008a = {
  1303. .modes = neweast_wjfh116008a_modes,
  1304. .num_modes = 2,
  1305. .bpc = 6,
  1306. .size = {
  1307. .width = 260,
  1308. .height = 150,
  1309. },
  1310. .delay = {
  1311. .hpd_reliable = 110,
  1312. .enable = 20,
  1313. .unprepare = 500,
  1314. },
  1315. };
  1316. static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
  1317. .clock = 271560,
  1318. .hdisplay = 2560,
  1319. .hsync_start = 2560 + 48,
  1320. .hsync_end = 2560 + 48 + 32,
  1321. .htotal = 2560 + 48 + 32 + 80,
  1322. .vdisplay = 1600,
  1323. .vsync_start = 1600 + 2,
  1324. .vsync_end = 1600 + 2 + 5,
  1325. .vtotal = 1600 + 2 + 5 + 57,
  1326. };
  1327. static const struct panel_desc samsung_lsn122dl01_c01 = {
  1328. .modes = &samsung_lsn122dl01_c01_mode,
  1329. .num_modes = 1,
  1330. .size = {
  1331. .width = 263,
  1332. .height = 164,
  1333. },
  1334. };
  1335. static const struct drm_display_mode samsung_ltn140at29_301_mode = {
  1336. .clock = 76300,
  1337. .hdisplay = 1366,
  1338. .hsync_start = 1366 + 64,
  1339. .hsync_end = 1366 + 64 + 48,
  1340. .htotal = 1366 + 64 + 48 + 128,
  1341. .vdisplay = 768,
  1342. .vsync_start = 768 + 2,
  1343. .vsync_end = 768 + 2 + 5,
  1344. .vtotal = 768 + 2 + 5 + 17,
  1345. };
  1346. static const struct panel_desc samsung_ltn140at29_301 = {
  1347. .modes = &samsung_ltn140at29_301_mode,
  1348. .num_modes = 1,
  1349. .bpc = 6,
  1350. .size = {
  1351. .width = 320,
  1352. .height = 187,
  1353. },
  1354. };
  1355. static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
  1356. .clock = 168480,
  1357. .hdisplay = 1920,
  1358. .hsync_start = 1920 + 48,
  1359. .hsync_end = 1920 + 48 + 32,
  1360. .htotal = 1920 + 48 + 32 + 80,
  1361. .vdisplay = 1280,
  1362. .vsync_start = 1280 + 3,
  1363. .vsync_end = 1280 + 3 + 10,
  1364. .vtotal = 1280 + 3 + 10 + 57,
  1365. .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
  1366. };
  1367. static const struct panel_desc sharp_ld_d5116z01b = {
  1368. .modes = &sharp_ld_d5116z01b_mode,
  1369. .num_modes = 1,
  1370. .bpc = 8,
  1371. .size = {
  1372. .width = 260,
  1373. .height = 120,
  1374. },
  1375. };
  1376. static const struct display_timing sharp_lq123p1jx31_timing = {
  1377. .pixelclock = { 252750000, 252750000, 266604720 },
  1378. .hactive = { 2400, 2400, 2400 },
  1379. .hfront_porch = { 48, 48, 48 },
  1380. .hback_porch = { 80, 80, 84 },
  1381. .hsync_len = { 32, 32, 32 },
  1382. .vactive = { 1600, 1600, 1600 },
  1383. .vfront_porch = { 3, 3, 3 },
  1384. .vback_porch = { 33, 33, 120 },
  1385. .vsync_len = { 10, 10, 10 },
  1386. .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
  1387. };
  1388. static const struct panel_desc sharp_lq123p1jx31 = {
  1389. .timings = &sharp_lq123p1jx31_timing,
  1390. .num_timings = 1,
  1391. .bpc = 8,
  1392. .size = {
  1393. .width = 259,
  1394. .height = 173,
  1395. },
  1396. .delay = {
  1397. .hpd_reliable = 110,
  1398. .enable = 50,
  1399. .unprepare = 550,
  1400. },
  1401. };
  1402. static const struct of_device_id platform_of_match[] = {
  1403. {
  1404. /* Must be first */
  1405. .compatible = "edp-panel",
  1406. },
  1407. /*
  1408. * Do not add panels to the list below unless they cannot be handled by
  1409. * the generic edp-panel compatible.
  1410. *
  1411. * The only two valid reasons are:
  1412. * - Because of the panel issues (e.g. broken EDID or broken
  1413. * identification).
  1414. * - Because the eDP drivers didn't wire up the AUX bus properly.
  1415. * NOTE that, though this is a marginally valid reason,
  1416. * some justification needs to be made for why the platform can't
  1417. * wire up the AUX bus properly.
  1418. *
  1419. * In all other cases the platform should use the aux-bus and declare
  1420. * the panel using the 'edp-panel' compatible as a device on the AUX
  1421. * bus.
  1422. */
  1423. {
  1424. .compatible = "auo,b101ean01",
  1425. .data = &auo_b101ean01,
  1426. }, {
  1427. .compatible = "auo,b116xa01",
  1428. .data = &auo_b116xak01,
  1429. }, {
  1430. .compatible = "auo,b133htn01",
  1431. .data = &auo_b133htn01,
  1432. }, {
  1433. .compatible = "auo,b133xtn01",
  1434. .data = &auo_b133xtn01,
  1435. }, {
  1436. .compatible = "boe,nv101wxmn51",
  1437. .data = &boe_nv101wxmn51,
  1438. }, {
  1439. .compatible = "boe,nv110wtm-n61",
  1440. .data = &boe_nv110wtm_n61,
  1441. }, {
  1442. .compatible = "boe,nv133fhm-n61",
  1443. .data = &boe_nv133fhm_n61,
  1444. }, {
  1445. .compatible = "boe,nv133fhm-n62",
  1446. .data = &boe_nv133fhm_n61,
  1447. }, {
  1448. .compatible = "boe,nv140fhmn49",
  1449. .data = &boe_nv140fhmn49,
  1450. }, {
  1451. .compatible = "innolux,n116bca-ea1",
  1452. .data = &innolux_n116bca_ea1,
  1453. }, {
  1454. .compatible = "innolux,n116bge",
  1455. .data = &innolux_n116bge,
  1456. }, {
  1457. .compatible = "innolux,n125hce-gn1",
  1458. .data = &innolux_n125hce_gn1,
  1459. }, {
  1460. .compatible = "innolux,p120zdg-bf1",
  1461. .data = &innolux_p120zdg_bf1,
  1462. }, {
  1463. .compatible = "kingdisplay,kd116n21-30nv-a010",
  1464. .data = &kingdisplay_kd116n21_30nv_a010,
  1465. }, {
  1466. .compatible = "lg,lp079qx1-sp0v",
  1467. .data = &lg_lp079qx1_sp0v,
  1468. }, {
  1469. .compatible = "lg,lp097qx1-spa1",
  1470. .data = &lg_lp097qx1_spa1,
  1471. }, {
  1472. .compatible = "lg,lp120up1",
  1473. .data = &lg_lp120up1,
  1474. }, {
  1475. .compatible = "lg,lp129qe",
  1476. .data = &lg_lp129qe,
  1477. }, {
  1478. .compatible = "neweast,wjfh116008a",
  1479. .data = &neweast_wjfh116008a,
  1480. }, {
  1481. .compatible = "samsung,lsn122dl01-c01",
  1482. .data = &samsung_lsn122dl01_c01,
  1483. }, {
  1484. .compatible = "samsung,ltn140at29-301",
  1485. .data = &samsung_ltn140at29_301,
  1486. }, {
  1487. .compatible = "sharp,ld-d5116z01b",
  1488. .data = &sharp_ld_d5116z01b,
  1489. }, {
  1490. .compatible = "sharp,lq123p1jx31",
  1491. .data = &sharp_lq123p1jx31,
  1492. }, {
  1493. /* sentinel */
  1494. }
  1495. };
  1496. MODULE_DEVICE_TABLE(of, platform_of_match);
  1497. static const struct panel_delay delay_200_500_p2e80 = {
  1498. .hpd_absent = 200,
  1499. .unprepare = 500,
  1500. .prepare_to_enable = 80,
  1501. };
  1502. static const struct panel_delay delay_200_500_e50_p2e80 = {
  1503. .hpd_absent = 200,
  1504. .unprepare = 500,
  1505. .enable = 50,
  1506. .prepare_to_enable = 80,
  1507. };
  1508. static const struct panel_delay delay_200_500_p2e100 = {
  1509. .hpd_absent = 200,
  1510. .unprepare = 500,
  1511. .prepare_to_enable = 100,
  1512. };
  1513. static const struct panel_delay delay_200_500_e50 = {
  1514. .hpd_absent = 200,
  1515. .unprepare = 500,
  1516. .enable = 50,
  1517. };
  1518. static const struct panel_delay delay_200_500_e50_p2e200 = {
  1519. .hpd_absent = 200,
  1520. .unprepare = 500,
  1521. .enable = 50,
  1522. .prepare_to_enable = 200,
  1523. };
  1524. static const struct panel_delay delay_200_500_e80 = {
  1525. .hpd_absent = 200,
  1526. .unprepare = 500,
  1527. .enable = 80,
  1528. };
  1529. static const struct panel_delay delay_200_500_e80_d50 = {
  1530. .hpd_absent = 200,
  1531. .unprepare = 500,
  1532. .enable = 80,
  1533. .disable = 50,
  1534. };
  1535. static const struct panel_delay delay_80_500_e50 = {
  1536. .hpd_absent = 80,
  1537. .unprepare = 500,
  1538. .enable = 50,
  1539. };
  1540. static const struct panel_delay delay_100_500_e200 = {
  1541. .hpd_absent = 100,
  1542. .unprepare = 500,
  1543. .enable = 200,
  1544. };
  1545. static const struct panel_delay delay_200_500_e200 = {
  1546. .hpd_absent = 200,
  1547. .unprepare = 500,
  1548. .enable = 200,
  1549. };
  1550. static const struct panel_delay delay_200_500_e200_d200 = {
  1551. .hpd_absent = 200,
  1552. .unprepare = 500,
  1553. .enable = 200,
  1554. .disable = 200,
  1555. };
  1556. static const struct panel_delay delay_200_500_e200_d10 = {
  1557. .hpd_absent = 200,
  1558. .unprepare = 500,
  1559. .enable = 200,
  1560. .disable = 10,
  1561. };
  1562. static const struct panel_delay delay_200_150_e200 = {
  1563. .hpd_absent = 200,
  1564. .unprepare = 150,
  1565. .enable = 200,
  1566. };
  1567. static const struct panel_delay delay_200_500_e50_po2e200 = {
  1568. .hpd_absent = 200,
  1569. .unprepare = 500,
  1570. .enable = 50,
  1571. .powered_on_to_enable = 200,
  1572. };
  1573. #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \
  1574. { \
  1575. .ident = { \
  1576. .name = _name, \
  1577. .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
  1578. product_id), \
  1579. }, \
  1580. .delay = _delay \
  1581. }
  1582. #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \
  1583. { \
  1584. .ident = { \
  1585. .name = _name, \
  1586. .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
  1587. product_id), \
  1588. }, \
  1589. .delay = _delay, \
  1590. .override_edid_mode = _mode \
  1591. }
  1592. /*
  1593. * This table is used to figure out power sequencing delays for panels that
  1594. * are detected by EDID. Entries here may point to entries in the
  1595. * platform_of_match table (if a panel is listed in both places).
  1596. *
  1597. * Sort first by vendor, then by product ID.
  1598. */
  1599. static const struct edp_panel_entry edp_panels[] = {
  1600. EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"),
  1601. EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"),
  1602. EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"),
  1603. EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"),
  1604. EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"),
  1605. EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"),
  1606. EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"),
  1607. EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"),
  1608. EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"),
  1609. EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"),
  1610. EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"),
  1611. EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"),
  1612. EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"),
  1613. EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"),
  1614. EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0",
  1615. &auo_b116xa3_mode),
  1616. EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"),
  1617. EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"),
  1618. EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),
  1619. EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"),
  1620. EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"),
  1621. EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"),
  1622. EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3"),
  1623. EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
  1624. EDP_PANEL_ENTRY('A', 'U', 'O', 0xa199, &delay_200_500_e50, "B116XAN06.1"),
  1625. EDP_PANEL_ENTRY('A', 'U', 'O', 0xc4b4, &delay_200_500_e50, "B116XAT04.1"),
  1626. EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"),
  1627. EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"),
  1628. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"),
  1629. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"),
  1630. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1"),
  1631. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0"),
  1632. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"),
  1633. EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"),
  1634. EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"),
  1635. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"),
  1636. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"),
  1637. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"),
  1638. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"),
  1639. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"),
  1640. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"),
  1641. EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"),
  1642. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"),
  1643. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"),
  1644. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"),
  1645. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),
  1646. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"),
  1647. EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21"),
  1648. EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),
  1649. EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"),
  1650. EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"),
  1651. EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"),
  1652. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"),
  1653. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"),
  1654. EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),
  1655. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"),
  1656. EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"),
  1657. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"),
  1658. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"),
  1659. EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"),
  1660. EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"),
  1661. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"),
  1662. EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"),
  1663. EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"),
  1664. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"),
  1665. EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),
  1666. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"),
  1667. EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"),
  1668. EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"),
  1669. EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"),
  1670. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a1b, &delay_200_500_e50, "NV133WUM-N63"),
  1671. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"),
  1672. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80, "NV116WHM-N49"),
  1673. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),
  1674. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"),
  1675. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41"),
  1676. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"),
  1677. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"),
  1678. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"),
  1679. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G"),
  1680. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"),
  1681. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"),
  1682. EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"),
  1683. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"),
  1684. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"),
  1685. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"),
  1686. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"),
  1687. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"),
  1688. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"),
  1689. EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"),
  1690. EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),
  1691. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"),
  1692. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"),
  1693. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"),
  1694. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"),
  1695. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"),
  1696. EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"),
  1697. EDP_PANEL_ENTRY('C', 'M', 'N', 0x115d, &delay_200_500_e80_d50, "N116BCA-EA2"),
  1698. EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"),
  1699. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK"),
  1700. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2"),
  1701. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),
  1702. EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"),
  1703. EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"),
  1704. EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"),
  1705. EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"),
  1706. EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"),
  1707. EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4"),
  1708. EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"),
  1709. EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_p2e200, "MNC207QS1-1"),
  1710. EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"),
  1711. EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50, "MNB601LS1-4"),
  1712. EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"),
  1713. EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "MB116AN01"),
  1714. EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"),
  1715. EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"),
  1716. EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"),
  1717. EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"),
  1718. EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"),
  1719. EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"),
  1720. EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"),
  1721. EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),
  1722. EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"),
  1723. EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),
  1724. EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16"),
  1725. EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"),
  1726. EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"),
  1727. EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"),
  1728. EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"),
  1729. EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"),
  1730. EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"),
  1731. EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"),
  1732. EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"),
  1733. EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"),
  1734. EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"),
  1735. EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"),
  1736. EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"),
  1737. EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
  1738. EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"),
  1739. EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"),
  1740. EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
  1741. EDP_PANEL_ENTRY('S', 'T', 'A', 0x0004, &delay_200_500_e200, "116KHD024006"),
  1742. EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),
  1743. { /* sentinal */ }
  1744. };
  1745. static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid)
  1746. {
  1747. const struct edp_panel_entry *panel;
  1748. if (!panel_id)
  1749. return NULL;
  1750. /*
  1751. * Match with identity first. This allows handling the case where
  1752. * vendors incorrectly reused the same panel ID for multiple panels that
  1753. * need different settings. If there's no match, try again with panel
  1754. * ID, which should be unique.
  1755. */
  1756. for (panel = edp_panels; panel->ident.panel_id; panel++)
  1757. if (drm_edid_match(edid, &panel->ident))
  1758. return panel;
  1759. for (panel = edp_panels; panel->ident.panel_id; panel++)
  1760. if (panel->ident.panel_id == panel_id)
  1761. return panel;
  1762. return NULL;
  1763. }
  1764. static int panel_edp_platform_probe(struct platform_device *pdev)
  1765. {
  1766. const struct of_device_id *id;
  1767. /* Skip one since "edp-panel" is only supported on DP AUX bus */
  1768. id = of_match_node(platform_of_match + 1, pdev->dev.of_node);
  1769. if (!id)
  1770. return -ENODEV;
  1771. return panel_edp_probe(&pdev->dev, id->data, NULL);
  1772. }
  1773. static void panel_edp_platform_remove(struct platform_device *pdev)
  1774. {
  1775. panel_edp_remove(&pdev->dev);
  1776. }
  1777. static void panel_edp_platform_shutdown(struct platform_device *pdev)
  1778. {
  1779. panel_edp_shutdown(&pdev->dev);
  1780. }
  1781. static const struct dev_pm_ops panel_edp_pm_ops = {
  1782. SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)
  1783. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  1784. pm_runtime_force_resume)
  1785. };
  1786. static struct platform_driver panel_edp_platform_driver = {
  1787. .driver = {
  1788. .name = "panel-edp",
  1789. .of_match_table = platform_of_match,
  1790. .pm = &panel_edp_pm_ops,
  1791. },
  1792. .probe = panel_edp_platform_probe,
  1793. .remove_new = panel_edp_platform_remove,
  1794. .shutdown = panel_edp_platform_shutdown,
  1795. };
  1796. static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)
  1797. {
  1798. const struct of_device_id *id;
  1799. id = of_match_node(platform_of_match, aux_ep->dev.of_node);
  1800. if (!id)
  1801. return -ENODEV;
  1802. return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);
  1803. }
  1804. static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)
  1805. {
  1806. panel_edp_remove(&aux_ep->dev);
  1807. }
  1808. static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)
  1809. {
  1810. panel_edp_shutdown(&aux_ep->dev);
  1811. }
  1812. static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {
  1813. .driver = {
  1814. .name = "panel-simple-dp-aux",
  1815. .of_match_table = platform_of_match, /* Same as platform one! */
  1816. .pm = &panel_edp_pm_ops,
  1817. },
  1818. .probe = panel_edp_dp_aux_ep_probe,
  1819. .remove = panel_edp_dp_aux_ep_remove,
  1820. .shutdown = panel_edp_dp_aux_ep_shutdown,
  1821. };
  1822. static int __init panel_edp_init(void)
  1823. {
  1824. int err;
  1825. err = platform_driver_register(&panel_edp_platform_driver);
  1826. if (err < 0)
  1827. return err;
  1828. err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);
  1829. if (err < 0)
  1830. goto err_did_platform_register;
  1831. return 0;
  1832. err_did_platform_register:
  1833. platform_driver_unregister(&panel_edp_platform_driver);
  1834. return err;
  1835. }
  1836. module_init(panel_edp_init);
  1837. static void __exit panel_edp_exit(void)
  1838. {
  1839. dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);
  1840. platform_driver_unregister(&panel_edp_platform_driver);
  1841. }
  1842. module_exit(panel_edp_exit);
  1843. MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
  1844. MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");
  1845. MODULE_LICENSE("GPL and additional rights");