vc4_drv.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2014-2015 Broadcom
  4. * Copyright (C) 2013 Red Hat
  5. */
  6. /**
  7. * DOC: Broadcom VC4 Graphics Driver
  8. *
  9. * The Broadcom VideoCore 4 (present in the Raspberry Pi) contains a
  10. * OpenGL ES 2.0-compatible 3D engine called V3D, and a highly
  11. * configurable display output pipeline that supports HDMI, DSI, DPI,
  12. * and Composite TV output.
  13. *
  14. * The 3D engine also has an interface for submitting arbitrary
  15. * compute shader-style jobs using the same shader processor as is
  16. * used for vertex and fragment shaders in GLES 2.0. However, given
  17. * that the hardware isn't able to expose any standard interfaces like
  18. * OpenGL compute shaders or OpenCL, it isn't supported by this
  19. * driver.
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/component.h>
  23. #include <linux/device.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/io.h>
  26. #include <linux/module.h>
  27. #include <linux/of_device.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <drm/drm_aperture.h>
  31. #include <drm/drm_atomic_helper.h>
  32. #include <drm/drm_drv.h>
  33. #include <drm/drm_fbdev_dma.h>
  34. #include <drm/drm_vblank.h>
  35. #include <soc/bcm2835/raspberrypi-firmware.h>
  36. #include "uapi/drm/vc4_drm.h"
  37. #include "vc4_drv.h"
  38. #include "vc4_regs.h"
  39. #define DRIVER_NAME "vc4"
  40. #define DRIVER_DESC "Broadcom VC4 graphics"
  41. #define DRIVER_DATE "20140616"
  42. #define DRIVER_MAJOR 0
  43. #define DRIVER_MINOR 0
  44. #define DRIVER_PATCHLEVEL 0
  45. /* Helper function for mapping the regs on a platform device. */
  46. void __iomem *vc4_ioremap_regs(struct platform_device *pdev, int index)
  47. {
  48. void __iomem *map;
  49. map = devm_platform_ioremap_resource(pdev, index);
  50. if (IS_ERR(map))
  51. return map;
  52. return map;
  53. }
  54. int vc4_dumb_fixup_args(struct drm_mode_create_dumb *args)
  55. {
  56. int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
  57. if (args->pitch < min_pitch)
  58. args->pitch = min_pitch;
  59. if (args->size < args->pitch * args->height)
  60. args->size = args->pitch * args->height;
  61. return 0;
  62. }
  63. static int vc5_dumb_create(struct drm_file *file_priv,
  64. struct drm_device *dev,
  65. struct drm_mode_create_dumb *args)
  66. {
  67. int ret;
  68. ret = vc4_dumb_fixup_args(args);
  69. if (ret)
  70. return ret;
  71. return drm_gem_dma_dumb_create_internal(file_priv, dev, args);
  72. }
  73. static int vc4_get_param_ioctl(struct drm_device *dev, void *data,
  74. struct drm_file *file_priv)
  75. {
  76. struct vc4_dev *vc4 = to_vc4_dev(dev);
  77. struct drm_vc4_get_param *args = data;
  78. int ret;
  79. if (args->pad != 0)
  80. return -EINVAL;
  81. if (WARN_ON_ONCE(vc4->gen == VC4_GEN_5))
  82. return -ENODEV;
  83. if (!vc4->v3d)
  84. return -ENODEV;
  85. switch (args->param) {
  86. case DRM_VC4_PARAM_V3D_IDENT0:
  87. ret = vc4_v3d_pm_get(vc4);
  88. if (ret)
  89. return ret;
  90. args->value = V3D_READ(V3D_IDENT0);
  91. vc4_v3d_pm_put(vc4);
  92. break;
  93. case DRM_VC4_PARAM_V3D_IDENT1:
  94. ret = vc4_v3d_pm_get(vc4);
  95. if (ret)
  96. return ret;
  97. args->value = V3D_READ(V3D_IDENT1);
  98. vc4_v3d_pm_put(vc4);
  99. break;
  100. case DRM_VC4_PARAM_V3D_IDENT2:
  101. ret = vc4_v3d_pm_get(vc4);
  102. if (ret)
  103. return ret;
  104. args->value = V3D_READ(V3D_IDENT2);
  105. vc4_v3d_pm_put(vc4);
  106. break;
  107. case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
  108. case DRM_VC4_PARAM_SUPPORTS_ETC1:
  109. case DRM_VC4_PARAM_SUPPORTS_THREADED_FS:
  110. case DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER:
  111. case DRM_VC4_PARAM_SUPPORTS_MADVISE:
  112. case DRM_VC4_PARAM_SUPPORTS_PERFMON:
  113. args->value = true;
  114. break;
  115. default:
  116. DRM_DEBUG("Unknown parameter %d\n", args->param);
  117. return -EINVAL;
  118. }
  119. return 0;
  120. }
  121. static int vc4_open(struct drm_device *dev, struct drm_file *file)
  122. {
  123. struct vc4_dev *vc4 = to_vc4_dev(dev);
  124. struct vc4_file *vc4file;
  125. if (WARN_ON_ONCE(vc4->gen == VC4_GEN_5))
  126. return -ENODEV;
  127. vc4file = kzalloc(sizeof(*vc4file), GFP_KERNEL);
  128. if (!vc4file)
  129. return -ENOMEM;
  130. vc4file->dev = vc4;
  131. vc4_perfmon_open_file(vc4file);
  132. file->driver_priv = vc4file;
  133. return 0;
  134. }
  135. static void vc4_close(struct drm_device *dev, struct drm_file *file)
  136. {
  137. struct vc4_dev *vc4 = to_vc4_dev(dev);
  138. struct vc4_file *vc4file = file->driver_priv;
  139. if (WARN_ON_ONCE(vc4->gen == VC4_GEN_5))
  140. return;
  141. if (vc4file->bin_bo_used)
  142. vc4_v3d_bin_bo_put(vc4);
  143. vc4_perfmon_close_file(vc4file);
  144. kfree(vc4file);
  145. }
  146. DEFINE_DRM_GEM_FOPS(vc4_drm_fops);
  147. static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
  148. DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW),
  149. DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW),
  150. DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW),
  151. DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW),
  152. DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW),
  153. DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
  154. DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
  155. DRM_ROOT_ONLY),
  156. DRM_IOCTL_DEF_DRV(VC4_GET_PARAM, vc4_get_param_ioctl, DRM_RENDER_ALLOW),
  157. DRM_IOCTL_DEF_DRV(VC4_SET_TILING, vc4_set_tiling_ioctl, DRM_RENDER_ALLOW),
  158. DRM_IOCTL_DEF_DRV(VC4_GET_TILING, vc4_get_tiling_ioctl, DRM_RENDER_ALLOW),
  159. DRM_IOCTL_DEF_DRV(VC4_LABEL_BO, vc4_label_bo_ioctl, DRM_RENDER_ALLOW),
  160. DRM_IOCTL_DEF_DRV(VC4_GEM_MADVISE, vc4_gem_madvise_ioctl, DRM_RENDER_ALLOW),
  161. DRM_IOCTL_DEF_DRV(VC4_PERFMON_CREATE, vc4_perfmon_create_ioctl, DRM_RENDER_ALLOW),
  162. DRM_IOCTL_DEF_DRV(VC4_PERFMON_DESTROY, vc4_perfmon_destroy_ioctl, DRM_RENDER_ALLOW),
  163. DRM_IOCTL_DEF_DRV(VC4_PERFMON_GET_VALUES, vc4_perfmon_get_values_ioctl, DRM_RENDER_ALLOW),
  164. };
  165. const struct drm_driver vc4_drm_driver = {
  166. .driver_features = (DRIVER_MODESET |
  167. DRIVER_ATOMIC |
  168. DRIVER_GEM |
  169. DRIVER_RENDER |
  170. DRIVER_SYNCOBJ),
  171. .open = vc4_open,
  172. .postclose = vc4_close,
  173. #if defined(CONFIG_DEBUG_FS)
  174. .debugfs_init = vc4_debugfs_init,
  175. #endif
  176. .gem_create_object = vc4_create_object,
  177. DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(vc4_bo_dumb_create),
  178. .ioctls = vc4_drm_ioctls,
  179. .num_ioctls = ARRAY_SIZE(vc4_drm_ioctls),
  180. .fops = &vc4_drm_fops,
  181. .name = DRIVER_NAME,
  182. .desc = DRIVER_DESC,
  183. .date = DRIVER_DATE,
  184. .major = DRIVER_MAJOR,
  185. .minor = DRIVER_MINOR,
  186. .patchlevel = DRIVER_PATCHLEVEL,
  187. };
  188. const struct drm_driver vc5_drm_driver = {
  189. .driver_features = (DRIVER_MODESET |
  190. DRIVER_ATOMIC |
  191. DRIVER_GEM),
  192. #if defined(CONFIG_DEBUG_FS)
  193. .debugfs_init = vc4_debugfs_init,
  194. #endif
  195. DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(vc5_dumb_create),
  196. .fops = &vc4_drm_fops,
  197. .name = DRIVER_NAME,
  198. .desc = DRIVER_DESC,
  199. .date = DRIVER_DATE,
  200. .major = DRIVER_MAJOR,
  201. .minor = DRIVER_MINOR,
  202. .patchlevel = DRIVER_PATCHLEVEL,
  203. };
  204. static void vc4_match_add_drivers(struct device *dev,
  205. struct component_match **match,
  206. struct platform_driver *const *drivers,
  207. int count)
  208. {
  209. int i;
  210. for (i = 0; i < count; i++) {
  211. struct device_driver *drv = &drivers[i]->driver;
  212. struct device *p = NULL, *d;
  213. while ((d = platform_find_device_by_driver(p, drv))) {
  214. put_device(p);
  215. component_match_add(dev, match, component_compare_dev, d);
  216. p = d;
  217. }
  218. put_device(p);
  219. }
  220. }
  221. static void vc4_component_unbind_all(void *ptr)
  222. {
  223. struct vc4_dev *vc4 = ptr;
  224. component_unbind_all(vc4->dev, &vc4->base);
  225. }
  226. static const struct of_device_id vc4_dma_range_matches[] = {
  227. { .compatible = "brcm,bcm2711-hvs" },
  228. { .compatible = "brcm,bcm2835-hvs" },
  229. { .compatible = "brcm,bcm2835-v3d" },
  230. { .compatible = "brcm,cygnus-v3d" },
  231. { .compatible = "brcm,vc4-v3d" },
  232. {}
  233. };
  234. static int vc4_drm_bind(struct device *dev)
  235. {
  236. struct platform_device *pdev = to_platform_device(dev);
  237. const struct drm_driver *driver;
  238. struct rpi_firmware *firmware = NULL;
  239. struct drm_device *drm;
  240. struct vc4_dev *vc4;
  241. struct device_node *node;
  242. struct drm_crtc *crtc;
  243. enum vc4_gen gen;
  244. int ret = 0;
  245. dev->coherent_dma_mask = DMA_BIT_MASK(32);
  246. if (of_device_is_compatible(dev->of_node, "brcm,bcm2711-vc5"))
  247. gen = VC4_GEN_5;
  248. else
  249. gen = VC4_GEN_4;
  250. if (gen == VC4_GEN_5)
  251. driver = &vc5_drm_driver;
  252. else
  253. driver = &vc4_drm_driver;
  254. node = of_find_matching_node_and_match(NULL, vc4_dma_range_matches,
  255. NULL);
  256. if (node) {
  257. ret = of_dma_configure(dev, node, true);
  258. of_node_put(node);
  259. if (ret)
  260. return ret;
  261. }
  262. vc4 = devm_drm_dev_alloc(dev, driver, struct vc4_dev, base);
  263. if (IS_ERR(vc4))
  264. return PTR_ERR(vc4);
  265. vc4->gen = gen;
  266. vc4->dev = dev;
  267. drm = &vc4->base;
  268. platform_set_drvdata(pdev, drm);
  269. if (gen == VC4_GEN_4) {
  270. ret = drmm_mutex_init(drm, &vc4->bin_bo_lock);
  271. if (ret)
  272. goto err;
  273. ret = vc4_bo_cache_init(drm);
  274. if (ret)
  275. goto err;
  276. }
  277. ret = drmm_mode_config_init(drm);
  278. if (ret)
  279. goto err;
  280. if (gen == VC4_GEN_4) {
  281. ret = vc4_gem_init(drm);
  282. if (ret)
  283. goto err;
  284. }
  285. node = of_find_compatible_node(NULL, NULL, "raspberrypi,bcm2835-firmware");
  286. if (node) {
  287. firmware = rpi_firmware_get(node);
  288. of_node_put(node);
  289. if (!firmware) {
  290. ret = -EPROBE_DEFER;
  291. goto err;
  292. }
  293. }
  294. ret = drm_aperture_remove_framebuffers(driver);
  295. if (ret)
  296. goto err;
  297. if (firmware) {
  298. ret = rpi_firmware_property(firmware,
  299. RPI_FIRMWARE_NOTIFY_DISPLAY_DONE,
  300. NULL, 0);
  301. if (ret)
  302. drm_warn(drm, "Couldn't stop firmware display driver: %d\n", ret);
  303. rpi_firmware_put(firmware);
  304. }
  305. ret = component_bind_all(dev, drm);
  306. if (ret)
  307. goto err;
  308. ret = devm_add_action_or_reset(dev, vc4_component_unbind_all, vc4);
  309. if (ret)
  310. goto err;
  311. ret = vc4_plane_create_additional_planes(drm);
  312. if (ret)
  313. goto err;
  314. ret = vc4_kms_load(drm);
  315. if (ret < 0)
  316. goto err;
  317. drm_for_each_crtc(crtc, drm)
  318. vc4_crtc_disable_at_boot(crtc);
  319. ret = drm_dev_register(drm, 0);
  320. if (ret < 0)
  321. goto err;
  322. drm_fbdev_dma_setup(drm, 16);
  323. return 0;
  324. err:
  325. platform_set_drvdata(pdev, NULL);
  326. return ret;
  327. }
  328. static void vc4_drm_unbind(struct device *dev)
  329. {
  330. struct drm_device *drm = dev_get_drvdata(dev);
  331. drm_dev_unplug(drm);
  332. drm_atomic_helper_shutdown(drm);
  333. dev_set_drvdata(dev, NULL);
  334. }
  335. static const struct component_master_ops vc4_drm_ops = {
  336. .bind = vc4_drm_bind,
  337. .unbind = vc4_drm_unbind,
  338. };
  339. /*
  340. * This list determines the binding order of our components, and we have
  341. * a few constraints:
  342. * - The TXP driver needs to be bound before the PixelValves (CRTC)
  343. * but after the HVS to set the possible_crtc field properly
  344. * - The HDMI driver needs to be bound after the HVS so that we can
  345. * lookup the HVS maximum core clock rate and figure out if we
  346. * support 4kp60 or not.
  347. */
  348. static struct platform_driver *const component_drivers[] = {
  349. &vc4_hvs_driver,
  350. &vc4_hdmi_driver,
  351. &vc4_vec_driver,
  352. &vc4_dpi_driver,
  353. &vc4_dsi_driver,
  354. &vc4_txp_driver,
  355. &vc4_crtc_driver,
  356. &vc4_v3d_driver,
  357. };
  358. static int vc4_platform_drm_probe(struct platform_device *pdev)
  359. {
  360. struct component_match *match = NULL;
  361. struct device *dev = &pdev->dev;
  362. vc4_match_add_drivers(dev, &match,
  363. component_drivers, ARRAY_SIZE(component_drivers));
  364. return component_master_add_with_match(dev, &vc4_drm_ops, match);
  365. }
  366. static void vc4_platform_drm_remove(struct platform_device *pdev)
  367. {
  368. component_master_del(&pdev->dev, &vc4_drm_ops);
  369. }
  370. static void vc4_platform_drm_shutdown(struct platform_device *pdev)
  371. {
  372. drm_atomic_helper_shutdown(platform_get_drvdata(pdev));
  373. }
  374. static const struct of_device_id vc4_of_match[] = {
  375. { .compatible = "brcm,bcm2711-vc5", },
  376. { .compatible = "brcm,bcm2835-vc4", },
  377. { .compatible = "brcm,cygnus-vc4", },
  378. {},
  379. };
  380. MODULE_DEVICE_TABLE(of, vc4_of_match);
  381. static struct platform_driver vc4_platform_driver = {
  382. .probe = vc4_platform_drm_probe,
  383. .remove_new = vc4_platform_drm_remove,
  384. .shutdown = vc4_platform_drm_shutdown,
  385. .driver = {
  386. .name = "vc4-drm",
  387. .of_match_table = vc4_of_match,
  388. },
  389. };
  390. static int __init vc4_drm_register(void)
  391. {
  392. int ret;
  393. if (drm_firmware_drivers_only())
  394. return -ENODEV;
  395. ret = platform_register_drivers(component_drivers,
  396. ARRAY_SIZE(component_drivers));
  397. if (ret)
  398. return ret;
  399. ret = platform_driver_register(&vc4_platform_driver);
  400. if (ret)
  401. platform_unregister_drivers(component_drivers,
  402. ARRAY_SIZE(component_drivers));
  403. return ret;
  404. }
  405. static void __exit vc4_drm_unregister(void)
  406. {
  407. platform_unregister_drivers(component_drivers,
  408. ARRAY_SIZE(component_drivers));
  409. platform_driver_unregister(&vc4_platform_driver);
  410. }
  411. module_init(vc4_drm_register);
  412. module_exit(vc4_drm_unregister);
  413. MODULE_ALIAS("platform:vc4-drm");
  414. MODULE_SOFTDEP("pre: snd-soc-hdmi-codec");
  415. MODULE_DESCRIPTION("Broadcom VC4 DRM Driver");
  416. MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
  417. MODULE_LICENSE("GPL v2");