afe4403.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
  4. *
  5. * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
  6. * Andrew F. Davis <afd@ti.com>
  7. */
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/regmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/buffer.h>
  20. #include <linux/iio/trigger.h>
  21. #include <linux/iio/triggered_buffer.h>
  22. #include <linux/iio/trigger_consumer.h>
  23. #include <linux/unaligned.h>
  24. #include "afe440x.h"
  25. #define AFE4403_DRIVER_NAME "afe4403"
  26. /* AFE4403 Registers */
  27. #define AFE4403_TIAGAIN 0x20
  28. #define AFE4403_TIA_AMB_GAIN 0x21
  29. enum afe4403_fields {
  30. /* Gains */
  31. F_RF_LED1, F_CF_LED1,
  32. F_RF_LED, F_CF_LED,
  33. /* LED Current */
  34. F_ILED1, F_ILED2,
  35. /* sentinel */
  36. F_MAX_FIELDS
  37. };
  38. static const struct reg_field afe4403_reg_fields[] = {
  39. /* Gains */
  40. [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2),
  41. [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7),
  42. [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2),
  43. [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7),
  44. /* LED Current */
  45. [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7),
  46. [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15),
  47. };
  48. /**
  49. * struct afe4403_data - AFE4403 device instance data
  50. * @dev: Device structure
  51. * @spi: SPI device handle
  52. * @regmap: Register map of the device
  53. * @fields: Register fields of the device
  54. * @regulator: Pointer to the regulator for the IC
  55. * @trig: IIO trigger for this device
  56. * @irq: ADC_RDY line interrupt number
  57. * @buffer: Used to construct data layout to push into IIO buffer.
  58. */
  59. struct afe4403_data {
  60. struct device *dev;
  61. struct spi_device *spi;
  62. struct regmap *regmap;
  63. struct regmap_field *fields[F_MAX_FIELDS];
  64. struct regulator *regulator;
  65. struct iio_trigger *trig;
  66. int irq;
  67. /* Ensure suitable alignment for timestamp */
  68. s32 buffer[8] __aligned(8);
  69. };
  70. enum afe4403_chan_id {
  71. LED2 = 1,
  72. ALED2,
  73. LED1,
  74. ALED1,
  75. LED2_ALED2,
  76. LED1_ALED1,
  77. };
  78. static const unsigned int afe4403_channel_values[] = {
  79. [LED2] = AFE440X_LED2VAL,
  80. [ALED2] = AFE440X_ALED2VAL,
  81. [LED1] = AFE440X_LED1VAL,
  82. [ALED1] = AFE440X_ALED1VAL,
  83. [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
  84. [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
  85. };
  86. static const unsigned int afe4403_channel_leds[] = {
  87. [LED2] = F_ILED2,
  88. [LED1] = F_ILED1,
  89. };
  90. static const struct iio_chan_spec afe4403_channels[] = {
  91. /* ADC values */
  92. AFE440X_INTENSITY_CHAN(LED2, 0),
  93. AFE440X_INTENSITY_CHAN(ALED2, 0),
  94. AFE440X_INTENSITY_CHAN(LED1, 0),
  95. AFE440X_INTENSITY_CHAN(ALED1, 0),
  96. AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
  97. AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
  98. /* LED current */
  99. AFE440X_CURRENT_CHAN(LED2),
  100. AFE440X_CURRENT_CHAN(LED1),
  101. };
  102. static const struct afe440x_val_table afe4403_res_table[] = {
  103. { 500000 }, { 250000 }, { 100000 }, { 50000 },
  104. { 25000 }, { 10000 }, { 1000000 }, { 0 },
  105. };
  106. AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table);
  107. static const struct afe440x_val_table afe4403_cap_table[] = {
  108. { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 },
  109. { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 },
  110. { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 },
  111. { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 },
  112. { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 },
  113. { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 },
  114. { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 },
  115. { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 },
  116. };
  117. AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table);
  118. static ssize_t afe440x_show_register(struct device *dev,
  119. struct device_attribute *attr,
  120. char *buf)
  121. {
  122. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  123. struct afe4403_data *afe = iio_priv(indio_dev);
  124. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  125. unsigned int reg_val;
  126. int vals[2];
  127. int ret;
  128. ret = regmap_field_read(afe->fields[afe440x_attr->field], &reg_val);
  129. if (ret)
  130. return ret;
  131. if (reg_val >= afe440x_attr->table_size)
  132. return -EINVAL;
  133. vals[0] = afe440x_attr->val_table[reg_val].integer;
  134. vals[1] = afe440x_attr->val_table[reg_val].fract;
  135. return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
  136. }
  137. static ssize_t afe440x_store_register(struct device *dev,
  138. struct device_attribute *attr,
  139. const char *buf, size_t count)
  140. {
  141. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  142. struct afe4403_data *afe = iio_priv(indio_dev);
  143. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  144. int val, integer, fract, ret;
  145. ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
  146. if (ret)
  147. return ret;
  148. for (val = 0; val < afe440x_attr->table_size; val++)
  149. if (afe440x_attr->val_table[val].integer == integer &&
  150. afe440x_attr->val_table[val].fract == fract)
  151. break;
  152. if (val == afe440x_attr->table_size)
  153. return -EINVAL;
  154. ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
  155. if (ret)
  156. return ret;
  157. return count;
  158. }
  159. static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table);
  160. static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table);
  161. static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table);
  162. static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table);
  163. static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table);
  164. static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table);
  165. static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table);
  166. static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table);
  167. static struct attribute *afe440x_attributes[] = {
  168. &dev_attr_in_intensity_resistance_available.attr,
  169. &dev_attr_in_intensity_capacitance_available.attr,
  170. &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
  171. &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
  172. &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
  173. &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
  174. &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
  175. &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
  176. &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
  177. &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
  178. NULL
  179. };
  180. static const struct attribute_group afe440x_attribute_group = {
  181. .attrs = afe440x_attributes
  182. };
  183. static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
  184. {
  185. u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
  186. u8 rx[3];
  187. int ret;
  188. /* Enable reading from the device */
  189. ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
  190. if (ret)
  191. return ret;
  192. ret = spi_write_then_read(afe->spi, &reg, 1, rx, sizeof(rx));
  193. if (ret)
  194. return ret;
  195. *val = get_unaligned_be24(&rx[0]);
  196. /* Disable reading from the device */
  197. tx[3] = AFE440X_CONTROL0_WRITE;
  198. ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
  199. if (ret)
  200. return ret;
  201. return 0;
  202. }
  203. static int afe4403_read_raw(struct iio_dev *indio_dev,
  204. struct iio_chan_spec const *chan,
  205. int *val, int *val2, long mask)
  206. {
  207. struct afe4403_data *afe = iio_priv(indio_dev);
  208. unsigned int reg, field;
  209. int ret;
  210. switch (chan->type) {
  211. case IIO_INTENSITY:
  212. switch (mask) {
  213. case IIO_CHAN_INFO_RAW:
  214. reg = afe4403_channel_values[chan->address];
  215. ret = afe4403_read(afe, reg, val);
  216. if (ret)
  217. return ret;
  218. return IIO_VAL_INT;
  219. }
  220. break;
  221. case IIO_CURRENT:
  222. switch (mask) {
  223. case IIO_CHAN_INFO_RAW:
  224. field = afe4403_channel_leds[chan->address];
  225. ret = regmap_field_read(afe->fields[field], val);
  226. if (ret)
  227. return ret;
  228. return IIO_VAL_INT;
  229. case IIO_CHAN_INFO_SCALE:
  230. *val = 0;
  231. *val2 = 800000;
  232. return IIO_VAL_INT_PLUS_MICRO;
  233. }
  234. break;
  235. default:
  236. break;
  237. }
  238. return -EINVAL;
  239. }
  240. static int afe4403_write_raw(struct iio_dev *indio_dev,
  241. struct iio_chan_spec const *chan,
  242. int val, int val2, long mask)
  243. {
  244. struct afe4403_data *afe = iio_priv(indio_dev);
  245. unsigned int field = afe4403_channel_leds[chan->address];
  246. switch (chan->type) {
  247. case IIO_CURRENT:
  248. switch (mask) {
  249. case IIO_CHAN_INFO_RAW:
  250. return regmap_field_write(afe->fields[field], val);
  251. }
  252. break;
  253. default:
  254. break;
  255. }
  256. return -EINVAL;
  257. }
  258. static const struct iio_info afe4403_iio_info = {
  259. .attrs = &afe440x_attribute_group,
  260. .read_raw = afe4403_read_raw,
  261. .write_raw = afe4403_write_raw,
  262. };
  263. static irqreturn_t afe4403_trigger_handler(int irq, void *private)
  264. {
  265. struct iio_poll_func *pf = private;
  266. struct iio_dev *indio_dev = pf->indio_dev;
  267. struct afe4403_data *afe = iio_priv(indio_dev);
  268. int ret, bit, i = 0;
  269. u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
  270. u8 rx[3];
  271. /* Enable reading from the device */
  272. ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
  273. if (ret)
  274. goto err;
  275. iio_for_each_active_channel(indio_dev, bit) {
  276. ret = spi_write_then_read(afe->spi,
  277. &afe4403_channel_values[bit], 1,
  278. rx, sizeof(rx));
  279. if (ret)
  280. goto err;
  281. afe->buffer[i++] = get_unaligned_be24(&rx[0]);
  282. }
  283. /* Disable reading from the device */
  284. tx[3] = AFE440X_CONTROL0_WRITE;
  285. ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
  286. if (ret)
  287. goto err;
  288. iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
  289. pf->timestamp);
  290. err:
  291. iio_trigger_notify_done(indio_dev->trig);
  292. return IRQ_HANDLED;
  293. }
  294. static void afe4403_regulator_disable(void *data)
  295. {
  296. struct regulator *regulator = data;
  297. regulator_disable(regulator);
  298. }
  299. #define AFE4403_TIMING_PAIRS \
  300. { AFE440X_LED2STC, 0x000050 }, \
  301. { AFE440X_LED2ENDC, 0x0003e7 }, \
  302. { AFE440X_LED1LEDSTC, 0x0007d0 }, \
  303. { AFE440X_LED1LEDENDC, 0x000bb7 }, \
  304. { AFE440X_ALED2STC, 0x000438 }, \
  305. { AFE440X_ALED2ENDC, 0x0007cf }, \
  306. { AFE440X_LED1STC, 0x000820 }, \
  307. { AFE440X_LED1ENDC, 0x000bb7 }, \
  308. { AFE440X_LED2LEDSTC, 0x000000 }, \
  309. { AFE440X_LED2LEDENDC, 0x0003e7 }, \
  310. { AFE440X_ALED1STC, 0x000c08 }, \
  311. { AFE440X_ALED1ENDC, 0x000f9f }, \
  312. { AFE440X_LED2CONVST, 0x0003ef }, \
  313. { AFE440X_LED2CONVEND, 0x0007cf }, \
  314. { AFE440X_ALED2CONVST, 0x0007d7 }, \
  315. { AFE440X_ALED2CONVEND, 0x000bb7 }, \
  316. { AFE440X_LED1CONVST, 0x000bbf }, \
  317. { AFE440X_LED1CONVEND, 0x009c3f }, \
  318. { AFE440X_ALED1CONVST, 0x000fa7 }, \
  319. { AFE440X_ALED1CONVEND, 0x001387 }, \
  320. { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \
  321. { AFE440X_ADCRSTENDCT0, 0x0003eb }, \
  322. { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \
  323. { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \
  324. { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \
  325. { AFE440X_ADCRSTENDCT2, 0x000bbb }, \
  326. { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \
  327. { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \
  328. { AFE440X_PRPCOUNT, 0x009c3f }, \
  329. { AFE440X_PDNCYCLESTC, 0x001518 }, \
  330. { AFE440X_PDNCYCLEENDC, 0x00991f }
  331. static const struct reg_sequence afe4403_reg_sequences[] = {
  332. AFE4403_TIMING_PAIRS,
  333. { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
  334. { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN },
  335. };
  336. static const struct regmap_range afe4403_yes_ranges[] = {
  337. regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
  338. };
  339. static const struct regmap_access_table afe4403_volatile_table = {
  340. .yes_ranges = afe4403_yes_ranges,
  341. .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges),
  342. };
  343. static const struct regmap_config afe4403_regmap_config = {
  344. .reg_bits = 8,
  345. .val_bits = 24,
  346. .max_register = AFE440X_PDNCYCLEENDC,
  347. .cache_type = REGCACHE_RBTREE,
  348. .volatile_table = &afe4403_volatile_table,
  349. };
  350. static const struct of_device_id afe4403_of_match[] = {
  351. { .compatible = "ti,afe4403", },
  352. { /* sentinel */ }
  353. };
  354. MODULE_DEVICE_TABLE(of, afe4403_of_match);
  355. static int afe4403_suspend(struct device *dev)
  356. {
  357. struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
  358. struct afe4403_data *afe = iio_priv(indio_dev);
  359. int ret;
  360. ret = regmap_set_bits(afe->regmap, AFE440X_CONTROL2,
  361. AFE440X_CONTROL2_PDN_AFE);
  362. if (ret)
  363. return ret;
  364. ret = regulator_disable(afe->regulator);
  365. if (ret) {
  366. dev_err(dev, "Unable to disable regulator\n");
  367. return ret;
  368. }
  369. return 0;
  370. }
  371. static int afe4403_resume(struct device *dev)
  372. {
  373. struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
  374. struct afe4403_data *afe = iio_priv(indio_dev);
  375. int ret;
  376. ret = regulator_enable(afe->regulator);
  377. if (ret) {
  378. dev_err(dev, "Unable to enable regulator\n");
  379. return ret;
  380. }
  381. ret = regmap_clear_bits(afe->regmap, AFE440X_CONTROL2,
  382. AFE440X_CONTROL2_PDN_AFE);
  383. if (ret)
  384. return ret;
  385. return 0;
  386. }
  387. static DEFINE_SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend,
  388. afe4403_resume);
  389. static int afe4403_probe(struct spi_device *spi)
  390. {
  391. struct iio_dev *indio_dev;
  392. struct afe4403_data *afe;
  393. int i, ret;
  394. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe));
  395. if (!indio_dev)
  396. return -ENOMEM;
  397. afe = iio_priv(indio_dev);
  398. spi_set_drvdata(spi, indio_dev);
  399. afe->dev = &spi->dev;
  400. afe->spi = spi;
  401. afe->irq = spi->irq;
  402. afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config);
  403. if (IS_ERR(afe->regmap)) {
  404. dev_err(afe->dev, "Unable to allocate register map\n");
  405. return PTR_ERR(afe->regmap);
  406. }
  407. for (i = 0; i < F_MAX_FIELDS; i++) {
  408. afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
  409. afe4403_reg_fields[i]);
  410. if (IS_ERR(afe->fields[i])) {
  411. dev_err(afe->dev, "Unable to allocate regmap fields\n");
  412. return PTR_ERR(afe->fields[i]);
  413. }
  414. }
  415. afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
  416. if (IS_ERR(afe->regulator))
  417. return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
  418. "Unable to get regulator\n");
  419. ret = regulator_enable(afe->regulator);
  420. if (ret) {
  421. dev_err(afe->dev, "Unable to enable regulator\n");
  422. return ret;
  423. }
  424. ret = devm_add_action_or_reset(afe->dev, afe4403_regulator_disable, afe->regulator);
  425. if (ret) {
  426. dev_err(afe->dev, "Unable to add regulator disable action\n");
  427. return ret;
  428. }
  429. ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
  430. AFE440X_CONTROL0_SW_RESET);
  431. if (ret) {
  432. dev_err(afe->dev, "Unable to reset device\n");
  433. return ret;
  434. }
  435. ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
  436. ARRAY_SIZE(afe4403_reg_sequences));
  437. if (ret) {
  438. dev_err(afe->dev, "Unable to set register defaults\n");
  439. return ret;
  440. }
  441. indio_dev->modes = INDIO_DIRECT_MODE;
  442. indio_dev->channels = afe4403_channels;
  443. indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
  444. indio_dev->name = AFE4403_DRIVER_NAME;
  445. indio_dev->info = &afe4403_iio_info;
  446. if (afe->irq > 0) {
  447. afe->trig = devm_iio_trigger_alloc(afe->dev,
  448. "%s-dev%d",
  449. indio_dev->name,
  450. iio_device_id(indio_dev));
  451. if (!afe->trig) {
  452. dev_err(afe->dev, "Unable to allocate IIO trigger\n");
  453. return -ENOMEM;
  454. }
  455. iio_trigger_set_drvdata(afe->trig, indio_dev);
  456. ret = devm_iio_trigger_register(afe->dev, afe->trig);
  457. if (ret) {
  458. dev_err(afe->dev, "Unable to register IIO trigger\n");
  459. return ret;
  460. }
  461. ret = devm_request_threaded_irq(afe->dev, afe->irq,
  462. iio_trigger_generic_data_rdy_poll,
  463. NULL, IRQF_ONESHOT,
  464. AFE4403_DRIVER_NAME,
  465. afe->trig);
  466. if (ret) {
  467. dev_err(afe->dev, "Unable to request IRQ\n");
  468. return ret;
  469. }
  470. }
  471. ret = devm_iio_triggered_buffer_setup(afe->dev, indio_dev,
  472. &iio_pollfunc_store_time,
  473. afe4403_trigger_handler, NULL);
  474. if (ret) {
  475. dev_err(afe->dev, "Unable to setup buffer\n");
  476. return ret;
  477. }
  478. ret = devm_iio_device_register(afe->dev, indio_dev);
  479. if (ret) {
  480. dev_err(afe->dev, "Unable to register IIO device\n");
  481. return ret;
  482. }
  483. return 0;
  484. }
  485. static const struct spi_device_id afe4403_ids[] = {
  486. { "afe4403", 0 },
  487. { /* sentinel */ }
  488. };
  489. MODULE_DEVICE_TABLE(spi, afe4403_ids);
  490. static struct spi_driver afe4403_spi_driver = {
  491. .driver = {
  492. .name = AFE4403_DRIVER_NAME,
  493. .of_match_table = afe4403_of_match,
  494. .pm = pm_sleep_ptr(&afe4403_pm_ops),
  495. },
  496. .probe = afe4403_probe,
  497. .id_table = afe4403_ids,
  498. };
  499. module_spi_driver(afe4403_spi_driver);
  500. MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
  501. MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE");
  502. MODULE_LICENSE("GPL v2");