iqs269a.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Azoteq IQS269A Capacitive Touch Controller
  4. *
  5. * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com>
  6. *
  7. * This driver registers up to 3 input devices: one representing capacitive or
  8. * inductive keys as well as Hall-effect switches, and one for each of the two
  9. * axial sliders presented by the device.
  10. */
  11. #include <linux/bits.h>
  12. #include <linux/completion.h>
  13. #include <linux/delay.h>
  14. #include <linux/device.h>
  15. #include <linux/err.h>
  16. #include <linux/i2c.h>
  17. #include <linux/input.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/mod_devicetable.h>
  21. #include <linux/module.h>
  22. #include <linux/mutex.h>
  23. #include <linux/property.h>
  24. #include <linux/regmap.h>
  25. #include <linux/slab.h>
  26. #define IQS269_VER_INFO 0x00
  27. #define IQS269_VER_INFO_PROD_NUM 0x4F
  28. #define IQS269_VER_INFO_FW_NUM_2 0x03
  29. #define IQS269_VER_INFO_FW_NUM_3 0x10
  30. #define IQS269_SYS_FLAGS 0x02
  31. #define IQS269_SYS_FLAGS_SHOW_RESET BIT(15)
  32. #define IQS269_SYS_FLAGS_PWR_MODE_MASK GENMASK(12, 11)
  33. #define IQS269_SYS_FLAGS_PWR_MODE_SHIFT 11
  34. #define IQS269_SYS_FLAGS_IN_ATI BIT(10)
  35. #define IQS269_CHx_COUNTS 0x08
  36. #define IQS269_SLIDER_X 0x30
  37. #define IQS269_CAL_DATA_A 0x35
  38. #define IQS269_CAL_DATA_A_HALL_BIN_L_MASK GENMASK(15, 12)
  39. #define IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT 12
  40. #define IQS269_CAL_DATA_A_HALL_BIN_R_MASK GENMASK(11, 8)
  41. #define IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT 8
  42. #define IQS269_SYS_SETTINGS 0x80
  43. #define IQS269_SYS_SETTINGS_CLK_DIV BIT(15)
  44. #define IQS269_SYS_SETTINGS_ULP_AUTO BIT(14)
  45. #define IQS269_SYS_SETTINGS_DIS_AUTO BIT(13)
  46. #define IQS269_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11)
  47. #define IQS269_SYS_SETTINGS_PWR_MODE_SHIFT 11
  48. #define IQS269_SYS_SETTINGS_PWR_MODE_MAX 3
  49. #define IQS269_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8)
  50. #define IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT 8
  51. #define IQS269_SYS_SETTINGS_ULP_UPDATE_MAX 7
  52. #define IQS269_SYS_SETTINGS_SLIDER_SWIPE BIT(7)
  53. #define IQS269_SYS_SETTINGS_RESEED_OFFSET BIT(6)
  54. #define IQS269_SYS_SETTINGS_EVENT_MODE BIT(5)
  55. #define IQS269_SYS_SETTINGS_EVENT_MODE_LP BIT(4)
  56. #define IQS269_SYS_SETTINGS_REDO_ATI BIT(2)
  57. #define IQS269_SYS_SETTINGS_ACK_RESET BIT(0)
  58. #define IQS269_FILT_STR_LP_LTA_MASK GENMASK(7, 6)
  59. #define IQS269_FILT_STR_LP_LTA_SHIFT 6
  60. #define IQS269_FILT_STR_LP_CNT_MASK GENMASK(5, 4)
  61. #define IQS269_FILT_STR_LP_CNT_SHIFT 4
  62. #define IQS269_FILT_STR_NP_LTA_MASK GENMASK(3, 2)
  63. #define IQS269_FILT_STR_NP_LTA_SHIFT 2
  64. #define IQS269_FILT_STR_NP_CNT_MASK GENMASK(1, 0)
  65. #define IQS269_FILT_STR_MAX 3
  66. #define IQS269_EVENT_MASK_SYS BIT(6)
  67. #define IQS269_EVENT_MASK_GESTURE BIT(3)
  68. #define IQS269_EVENT_MASK_DEEP BIT(2)
  69. #define IQS269_EVENT_MASK_TOUCH BIT(1)
  70. #define IQS269_EVENT_MASK_PROX BIT(0)
  71. #define IQS269_RATE_NP_MS_MAX 255
  72. #define IQS269_RATE_LP_MS_MAX 255
  73. #define IQS269_RATE_ULP_MS_MAX 4080
  74. #define IQS269_TIMEOUT_PWR_MS_MAX 130560
  75. #define IQS269_TIMEOUT_LTA_MS_MAX 130560
  76. #define IQS269_MISC_A_ATI_BAND_DISABLE BIT(15)
  77. #define IQS269_MISC_A_ATI_LP_ONLY BIT(14)
  78. #define IQS269_MISC_A_ATI_BAND_TIGHTEN BIT(13)
  79. #define IQS269_MISC_A_FILT_DISABLE BIT(12)
  80. #define IQS269_MISC_A_GPIO3_SELECT_MASK GENMASK(10, 8)
  81. #define IQS269_MISC_A_GPIO3_SELECT_SHIFT 8
  82. #define IQS269_MISC_A_DUAL_DIR BIT(6)
  83. #define IQS269_MISC_A_TX_FREQ_MASK GENMASK(5, 4)
  84. #define IQS269_MISC_A_TX_FREQ_SHIFT 4
  85. #define IQS269_MISC_A_TX_FREQ_MAX 3
  86. #define IQS269_MISC_A_GLOBAL_CAP_SIZE BIT(0)
  87. #define IQS269_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6)
  88. #define IQS269_MISC_B_RESEED_UI_SEL_SHIFT 6
  89. #define IQS269_MISC_B_RESEED_UI_SEL_MAX 3
  90. #define IQS269_MISC_B_TRACKING_UI_ENABLE BIT(4)
  91. #define IQS269_MISC_B_FILT_STR_SLIDER GENMASK(1, 0)
  92. #define IQS269_TOUCH_HOLD_SLIDER_SEL 0x89
  93. #define IQS269_TOUCH_HOLD_DEFAULT 0x14
  94. #define IQS269_TOUCH_HOLD_MS_MIN 256
  95. #define IQS269_TOUCH_HOLD_MS_MAX 65280
  96. #define IQS269_TIMEOUT_TAP_MS_MAX 4080
  97. #define IQS269_TIMEOUT_SWIPE_MS_MAX 4080
  98. #define IQS269_THRESH_SWIPE_MAX 255
  99. #define IQS269_CHx_ENG_A_MEAS_CAP_SIZE BIT(15)
  100. #define IQS269_CHx_ENG_A_RX_GND_INACTIVE BIT(13)
  101. #define IQS269_CHx_ENG_A_LOCAL_CAP_SIZE BIT(12)
  102. #define IQS269_CHx_ENG_A_ATI_MODE_MASK GENMASK(9, 8)
  103. #define IQS269_CHx_ENG_A_ATI_MODE_SHIFT 8
  104. #define IQS269_CHx_ENG_A_ATI_MODE_MAX 3
  105. #define IQS269_CHx_ENG_A_INV_LOGIC BIT(7)
  106. #define IQS269_CHx_ENG_A_PROJ_BIAS_MASK GENMASK(6, 5)
  107. #define IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT 5
  108. #define IQS269_CHx_ENG_A_PROJ_BIAS_MAX 3
  109. #define IQS269_CHx_ENG_A_SENSE_MODE_MASK GENMASK(3, 0)
  110. #define IQS269_CHx_ENG_A_SENSE_MODE_MAX 15
  111. #define IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE BIT(13)
  112. #define IQS269_CHx_ENG_B_SENSE_FREQ_MASK GENMASK(10, 9)
  113. #define IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT 9
  114. #define IQS269_CHx_ENG_B_SENSE_FREQ_MAX 3
  115. #define IQS269_CHx_ENG_B_STATIC_ENABLE BIT(8)
  116. #define IQS269_CHx_ENG_B_ATI_BASE_MASK GENMASK(7, 6)
  117. #define IQS269_CHx_ENG_B_ATI_BASE_75 0x00
  118. #define IQS269_CHx_ENG_B_ATI_BASE_100 0x40
  119. #define IQS269_CHx_ENG_B_ATI_BASE_150 0x80
  120. #define IQS269_CHx_ENG_B_ATI_BASE_200 0xC0
  121. #define IQS269_CHx_ENG_B_ATI_TARGET_MASK GENMASK(5, 0)
  122. #define IQS269_CHx_ENG_B_ATI_TARGET_MAX 2016
  123. #define IQS269_CHx_WEIGHT_MAX 255
  124. #define IQS269_CHx_THRESH_MAX 255
  125. #define IQS269_CHx_HYST_DEEP_MASK GENMASK(7, 4)
  126. #define IQS269_CHx_HYST_DEEP_SHIFT 4
  127. #define IQS269_CHx_HYST_TOUCH_MASK GENMASK(3, 0)
  128. #define IQS269_CHx_HYST_MAX 15
  129. #define IQS269_CHx_HALL_INACTIVE 6
  130. #define IQS269_CHx_HALL_ACTIVE 7
  131. #define IQS269_HALL_PAD_R BIT(0)
  132. #define IQS269_HALL_PAD_L BIT(1)
  133. #define IQS269_HALL_PAD_INV BIT(6)
  134. #define IQS269_HALL_UI 0xF5
  135. #define IQS269_HALL_UI_ENABLE BIT(15)
  136. #define IQS269_MAX_REG 0xFF
  137. #define IQS269_OTP_OPTION_DEFAULT 0x00
  138. #define IQS269_OTP_OPTION_TWS 0xD0
  139. #define IQS269_OTP_OPTION_HOLD BIT(7)
  140. #define IQS269_NUM_CH 8
  141. #define IQS269_NUM_SL 2
  142. #define iqs269_irq_wait() usleep_range(200, 250)
  143. enum iqs269_local_cap_size {
  144. IQS269_LOCAL_CAP_SIZE_0,
  145. IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY,
  146. IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5,
  147. };
  148. enum iqs269_st_offs {
  149. IQS269_ST_OFFS_PROX,
  150. IQS269_ST_OFFS_DIR,
  151. IQS269_ST_OFFS_TOUCH,
  152. IQS269_ST_OFFS_DEEP,
  153. };
  154. enum iqs269_th_offs {
  155. IQS269_TH_OFFS_PROX,
  156. IQS269_TH_OFFS_TOUCH,
  157. IQS269_TH_OFFS_DEEP,
  158. };
  159. enum iqs269_event_id {
  160. IQS269_EVENT_PROX_DN,
  161. IQS269_EVENT_PROX_UP,
  162. IQS269_EVENT_TOUCH_DN,
  163. IQS269_EVENT_TOUCH_UP,
  164. IQS269_EVENT_DEEP_DN,
  165. IQS269_EVENT_DEEP_UP,
  166. };
  167. enum iqs269_slider_id {
  168. IQS269_SLIDER_NONE,
  169. IQS269_SLIDER_KEY,
  170. IQS269_SLIDER_RAW,
  171. };
  172. enum iqs269_gesture_id {
  173. IQS269_GESTURE_TAP,
  174. IQS269_GESTURE_HOLD,
  175. IQS269_GESTURE_FLICK_POS,
  176. IQS269_GESTURE_FLICK_NEG,
  177. IQS269_NUM_GESTURES,
  178. };
  179. struct iqs269_switch_desc {
  180. unsigned int code;
  181. bool enabled;
  182. };
  183. struct iqs269_event_desc {
  184. const char *name;
  185. enum iqs269_st_offs st_offs;
  186. enum iqs269_th_offs th_offs;
  187. bool dir_up;
  188. u8 mask;
  189. };
  190. static const struct iqs269_event_desc iqs269_events[] = {
  191. [IQS269_EVENT_PROX_DN] = {
  192. .name = "event-prox",
  193. .st_offs = IQS269_ST_OFFS_PROX,
  194. .th_offs = IQS269_TH_OFFS_PROX,
  195. .mask = IQS269_EVENT_MASK_PROX,
  196. },
  197. [IQS269_EVENT_PROX_UP] = {
  198. .name = "event-prox-alt",
  199. .st_offs = IQS269_ST_OFFS_PROX,
  200. .th_offs = IQS269_TH_OFFS_PROX,
  201. .dir_up = true,
  202. .mask = IQS269_EVENT_MASK_PROX,
  203. },
  204. [IQS269_EVENT_TOUCH_DN] = {
  205. .name = "event-touch",
  206. .st_offs = IQS269_ST_OFFS_TOUCH,
  207. .th_offs = IQS269_TH_OFFS_TOUCH,
  208. .mask = IQS269_EVENT_MASK_TOUCH,
  209. },
  210. [IQS269_EVENT_TOUCH_UP] = {
  211. .name = "event-touch-alt",
  212. .st_offs = IQS269_ST_OFFS_TOUCH,
  213. .th_offs = IQS269_TH_OFFS_TOUCH,
  214. .dir_up = true,
  215. .mask = IQS269_EVENT_MASK_TOUCH,
  216. },
  217. [IQS269_EVENT_DEEP_DN] = {
  218. .name = "event-deep",
  219. .st_offs = IQS269_ST_OFFS_DEEP,
  220. .th_offs = IQS269_TH_OFFS_DEEP,
  221. .mask = IQS269_EVENT_MASK_DEEP,
  222. },
  223. [IQS269_EVENT_DEEP_UP] = {
  224. .name = "event-deep-alt",
  225. .st_offs = IQS269_ST_OFFS_DEEP,
  226. .th_offs = IQS269_TH_OFFS_DEEP,
  227. .dir_up = true,
  228. .mask = IQS269_EVENT_MASK_DEEP,
  229. },
  230. };
  231. struct iqs269_ver_info {
  232. u8 prod_num;
  233. u8 sw_num;
  234. u8 hw_num;
  235. u8 fw_num;
  236. } __packed;
  237. struct iqs269_ch_reg {
  238. u8 rx_enable;
  239. u8 tx_enable;
  240. __be16 engine_a;
  241. __be16 engine_b;
  242. __be16 ati_comp;
  243. u8 thresh[3];
  244. u8 hyst;
  245. u8 assoc_select;
  246. u8 assoc_weight;
  247. } __packed;
  248. struct iqs269_sys_reg {
  249. __be16 general;
  250. u8 active;
  251. u8 filter;
  252. u8 reseed;
  253. u8 event_mask;
  254. u8 rate_np;
  255. u8 rate_lp;
  256. u8 rate_ulp;
  257. u8 timeout_pwr;
  258. u8 timeout_rdy;
  259. u8 timeout_lta;
  260. __be16 misc_a;
  261. __be16 misc_b;
  262. u8 blocking;
  263. u8 padding;
  264. u8 slider_select[IQS269_NUM_SL];
  265. u8 timeout_tap;
  266. u8 timeout_swipe;
  267. u8 thresh_swipe;
  268. u8 redo_ati;
  269. struct iqs269_ch_reg ch_reg[IQS269_NUM_CH];
  270. } __packed;
  271. struct iqs269_flags {
  272. __be16 system;
  273. u8 gesture;
  274. u8 padding;
  275. u8 states[4];
  276. } __packed;
  277. struct iqs269_private {
  278. struct i2c_client *client;
  279. struct regmap *regmap;
  280. struct mutex lock;
  281. struct iqs269_switch_desc switches[ARRAY_SIZE(iqs269_events)];
  282. struct iqs269_ver_info ver_info;
  283. struct iqs269_sys_reg sys_reg;
  284. struct completion ati_done;
  285. struct input_dev *keypad;
  286. struct input_dev *slider[IQS269_NUM_SL];
  287. unsigned int keycode[ARRAY_SIZE(iqs269_events) * IQS269_NUM_CH];
  288. unsigned int sl_code[IQS269_NUM_SL][IQS269_NUM_GESTURES];
  289. unsigned int otp_option;
  290. unsigned int ch_num;
  291. bool hall_enable;
  292. bool ati_current;
  293. };
  294. static enum iqs269_slider_id iqs269_slider_type(struct iqs269_private *iqs269,
  295. int slider_num)
  296. {
  297. int i;
  298. /*
  299. * Slider 1 is unavailable if the touch-and-hold option is enabled via
  300. * OTP. In that case, the channel selection register is repurposed for
  301. * the touch-and-hold timer ceiling.
  302. */
  303. if (slider_num && (iqs269->otp_option & IQS269_OTP_OPTION_HOLD))
  304. return IQS269_SLIDER_NONE;
  305. if (!iqs269->sys_reg.slider_select[slider_num])
  306. return IQS269_SLIDER_NONE;
  307. for (i = 0; i < IQS269_NUM_GESTURES; i++)
  308. if (iqs269->sl_code[slider_num][i] != KEY_RESERVED)
  309. return IQS269_SLIDER_KEY;
  310. return IQS269_SLIDER_RAW;
  311. }
  312. static int iqs269_ati_mode_set(struct iqs269_private *iqs269,
  313. unsigned int ch_num, unsigned int mode)
  314. {
  315. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  316. u16 engine_a;
  317. if (ch_num >= IQS269_NUM_CH)
  318. return -EINVAL;
  319. if (mode > IQS269_CHx_ENG_A_ATI_MODE_MAX)
  320. return -EINVAL;
  321. mutex_lock(&iqs269->lock);
  322. engine_a = be16_to_cpu(ch_reg[ch_num].engine_a);
  323. engine_a &= ~IQS269_CHx_ENG_A_ATI_MODE_MASK;
  324. engine_a |= (mode << IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
  325. ch_reg[ch_num].engine_a = cpu_to_be16(engine_a);
  326. iqs269->ati_current = false;
  327. mutex_unlock(&iqs269->lock);
  328. return 0;
  329. }
  330. static int iqs269_ati_mode_get(struct iqs269_private *iqs269,
  331. unsigned int ch_num, unsigned int *mode)
  332. {
  333. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  334. u16 engine_a;
  335. if (ch_num >= IQS269_NUM_CH)
  336. return -EINVAL;
  337. mutex_lock(&iqs269->lock);
  338. engine_a = be16_to_cpu(ch_reg[ch_num].engine_a);
  339. mutex_unlock(&iqs269->lock);
  340. engine_a &= IQS269_CHx_ENG_A_ATI_MODE_MASK;
  341. *mode = (engine_a >> IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
  342. return 0;
  343. }
  344. static int iqs269_ati_base_set(struct iqs269_private *iqs269,
  345. unsigned int ch_num, unsigned int base)
  346. {
  347. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  348. u16 engine_b;
  349. if (ch_num >= IQS269_NUM_CH)
  350. return -EINVAL;
  351. switch (base) {
  352. case 75:
  353. base = IQS269_CHx_ENG_B_ATI_BASE_75;
  354. break;
  355. case 100:
  356. base = IQS269_CHx_ENG_B_ATI_BASE_100;
  357. break;
  358. case 150:
  359. base = IQS269_CHx_ENG_B_ATI_BASE_150;
  360. break;
  361. case 200:
  362. base = IQS269_CHx_ENG_B_ATI_BASE_200;
  363. break;
  364. default:
  365. return -EINVAL;
  366. }
  367. mutex_lock(&iqs269->lock);
  368. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  369. engine_b &= ~IQS269_CHx_ENG_B_ATI_BASE_MASK;
  370. engine_b |= base;
  371. ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
  372. iqs269->ati_current = false;
  373. mutex_unlock(&iqs269->lock);
  374. return 0;
  375. }
  376. static int iqs269_ati_base_get(struct iqs269_private *iqs269,
  377. unsigned int ch_num, unsigned int *base)
  378. {
  379. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  380. u16 engine_b;
  381. if (ch_num >= IQS269_NUM_CH)
  382. return -EINVAL;
  383. mutex_lock(&iqs269->lock);
  384. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  385. mutex_unlock(&iqs269->lock);
  386. switch (engine_b & IQS269_CHx_ENG_B_ATI_BASE_MASK) {
  387. case IQS269_CHx_ENG_B_ATI_BASE_75:
  388. *base = 75;
  389. return 0;
  390. case IQS269_CHx_ENG_B_ATI_BASE_100:
  391. *base = 100;
  392. return 0;
  393. case IQS269_CHx_ENG_B_ATI_BASE_150:
  394. *base = 150;
  395. return 0;
  396. case IQS269_CHx_ENG_B_ATI_BASE_200:
  397. *base = 200;
  398. return 0;
  399. default:
  400. return -EINVAL;
  401. }
  402. }
  403. static int iqs269_ati_target_set(struct iqs269_private *iqs269,
  404. unsigned int ch_num, unsigned int target)
  405. {
  406. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  407. u16 engine_b;
  408. if (ch_num >= IQS269_NUM_CH)
  409. return -EINVAL;
  410. if (target > IQS269_CHx_ENG_B_ATI_TARGET_MAX)
  411. return -EINVAL;
  412. mutex_lock(&iqs269->lock);
  413. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  414. engine_b &= ~IQS269_CHx_ENG_B_ATI_TARGET_MASK;
  415. engine_b |= target / 32;
  416. ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
  417. iqs269->ati_current = false;
  418. mutex_unlock(&iqs269->lock);
  419. return 0;
  420. }
  421. static int iqs269_ati_target_get(struct iqs269_private *iqs269,
  422. unsigned int ch_num, unsigned int *target)
  423. {
  424. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  425. u16 engine_b;
  426. if (ch_num >= IQS269_NUM_CH)
  427. return -EINVAL;
  428. mutex_lock(&iqs269->lock);
  429. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  430. mutex_unlock(&iqs269->lock);
  431. *target = (engine_b & IQS269_CHx_ENG_B_ATI_TARGET_MASK) * 32;
  432. return 0;
  433. }
  434. static int iqs269_parse_mask(const struct fwnode_handle *fwnode,
  435. const char *propname, u8 *mask)
  436. {
  437. unsigned int val[IQS269_NUM_CH];
  438. int count, error, i;
  439. count = fwnode_property_count_u32(fwnode, propname);
  440. if (count < 0)
  441. return 0;
  442. if (count > IQS269_NUM_CH)
  443. return -EINVAL;
  444. error = fwnode_property_read_u32_array(fwnode, propname, val, count);
  445. if (error)
  446. return error;
  447. *mask = 0;
  448. for (i = 0; i < count; i++) {
  449. if (val[i] >= IQS269_NUM_CH)
  450. return -EINVAL;
  451. *mask |= BIT(val[i]);
  452. }
  453. return 0;
  454. }
  455. static int iqs269_parse_chan(struct iqs269_private *iqs269,
  456. const struct fwnode_handle *ch_node)
  457. {
  458. struct i2c_client *client = iqs269->client;
  459. struct fwnode_handle *ev_node;
  460. struct iqs269_ch_reg *ch_reg;
  461. u16 engine_a, engine_b;
  462. unsigned int reg, val;
  463. int error, i;
  464. error = fwnode_property_read_u32(ch_node, "reg", &reg);
  465. if (error) {
  466. dev_err(&client->dev, "Failed to read channel number: %d\n",
  467. error);
  468. return error;
  469. } else if (reg >= IQS269_NUM_CH) {
  470. dev_err(&client->dev, "Invalid channel number: %u\n", reg);
  471. return -EINVAL;
  472. }
  473. iqs269->sys_reg.active |= BIT(reg);
  474. if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
  475. iqs269->sys_reg.reseed |= BIT(reg);
  476. if (fwnode_property_present(ch_node, "azoteq,blocking-enable"))
  477. iqs269->sys_reg.blocking |= BIT(reg);
  478. if (fwnode_property_present(ch_node, "azoteq,slider0-select"))
  479. iqs269->sys_reg.slider_select[0] |= BIT(reg);
  480. if (fwnode_property_present(ch_node, "azoteq,slider1-select") &&
  481. !(iqs269->otp_option & IQS269_OTP_OPTION_HOLD))
  482. iqs269->sys_reg.slider_select[1] |= BIT(reg);
  483. ch_reg = &iqs269->sys_reg.ch_reg[reg];
  484. error = iqs269_parse_mask(ch_node, "azoteq,rx-enable",
  485. &ch_reg->rx_enable);
  486. if (error) {
  487. dev_err(&client->dev, "Invalid channel %u RX enable mask: %d\n",
  488. reg, error);
  489. return error;
  490. }
  491. error = iqs269_parse_mask(ch_node, "azoteq,tx-enable",
  492. &ch_reg->tx_enable);
  493. if (error) {
  494. dev_err(&client->dev, "Invalid channel %u TX enable mask: %d\n",
  495. reg, error);
  496. return error;
  497. }
  498. engine_a = be16_to_cpu(ch_reg->engine_a);
  499. engine_b = be16_to_cpu(ch_reg->engine_b);
  500. engine_a |= IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
  501. if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
  502. engine_a &= ~IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
  503. engine_a |= IQS269_CHx_ENG_A_RX_GND_INACTIVE;
  504. if (fwnode_property_present(ch_node, "azoteq,rx-float-inactive"))
  505. engine_a &= ~IQS269_CHx_ENG_A_RX_GND_INACTIVE;
  506. engine_a &= ~IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
  507. engine_b &= ~IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
  508. if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", &val)) {
  509. switch (val) {
  510. case IQS269_LOCAL_CAP_SIZE_0:
  511. break;
  512. case IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5:
  513. engine_a |= IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
  514. fallthrough;
  515. case IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY:
  516. engine_b |= IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
  517. break;
  518. default:
  519. dev_err(&client->dev,
  520. "Invalid channel %u local cap. size: %u\n", reg,
  521. val);
  522. return -EINVAL;
  523. }
  524. }
  525. engine_a &= ~IQS269_CHx_ENG_A_INV_LOGIC;
  526. if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
  527. engine_a |= IQS269_CHx_ENG_A_INV_LOGIC;
  528. if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
  529. if (val > IQS269_CHx_ENG_A_PROJ_BIAS_MAX) {
  530. dev_err(&client->dev,
  531. "Invalid channel %u bias current: %u\n", reg,
  532. val);
  533. return -EINVAL;
  534. }
  535. engine_a &= ~IQS269_CHx_ENG_A_PROJ_BIAS_MASK;
  536. engine_a |= (val << IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT);
  537. }
  538. if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
  539. if (val > IQS269_CHx_ENG_A_SENSE_MODE_MAX) {
  540. dev_err(&client->dev,
  541. "Invalid channel %u sensing mode: %u\n", reg,
  542. val);
  543. return -EINVAL;
  544. }
  545. engine_a &= ~IQS269_CHx_ENG_A_SENSE_MODE_MASK;
  546. engine_a |= val;
  547. }
  548. if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
  549. if (val > IQS269_CHx_ENG_B_SENSE_FREQ_MAX) {
  550. dev_err(&client->dev,
  551. "Invalid channel %u sensing frequency: %u\n",
  552. reg, val);
  553. return -EINVAL;
  554. }
  555. engine_b &= ~IQS269_CHx_ENG_B_SENSE_FREQ_MASK;
  556. engine_b |= (val << IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT);
  557. }
  558. engine_b &= ~IQS269_CHx_ENG_B_STATIC_ENABLE;
  559. if (fwnode_property_present(ch_node, "azoteq,static-enable"))
  560. engine_b |= IQS269_CHx_ENG_B_STATIC_ENABLE;
  561. ch_reg->engine_a = cpu_to_be16(engine_a);
  562. ch_reg->engine_b = cpu_to_be16(engine_b);
  563. if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
  564. error = iqs269_ati_mode_set(iqs269, reg, val);
  565. if (error) {
  566. dev_err(&client->dev,
  567. "Invalid channel %u ATI mode: %u\n", reg, val);
  568. return error;
  569. }
  570. }
  571. if (!fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
  572. error = iqs269_ati_base_set(iqs269, reg, val);
  573. if (error) {
  574. dev_err(&client->dev,
  575. "Invalid channel %u ATI base: %u\n", reg, val);
  576. return error;
  577. }
  578. }
  579. if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
  580. error = iqs269_ati_target_set(iqs269, reg, val);
  581. if (error) {
  582. dev_err(&client->dev,
  583. "Invalid channel %u ATI target: %u\n", reg,
  584. val);
  585. return error;
  586. }
  587. }
  588. error = iqs269_parse_mask(ch_node, "azoteq,assoc-select",
  589. &ch_reg->assoc_select);
  590. if (error) {
  591. dev_err(&client->dev, "Invalid channel %u association: %d\n",
  592. reg, error);
  593. return error;
  594. }
  595. if (!fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) {
  596. if (val > IQS269_CHx_WEIGHT_MAX) {
  597. dev_err(&client->dev,
  598. "Invalid channel %u associated weight: %u\n",
  599. reg, val);
  600. return -EINVAL;
  601. }
  602. ch_reg->assoc_weight = val;
  603. }
  604. for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
  605. ev_node = fwnode_get_named_child_node(ch_node,
  606. iqs269_events[i].name);
  607. if (!ev_node)
  608. continue;
  609. if (!fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
  610. if (val > IQS269_CHx_THRESH_MAX) {
  611. dev_err(&client->dev,
  612. "Invalid channel %u threshold: %u\n",
  613. reg, val);
  614. fwnode_handle_put(ev_node);
  615. return -EINVAL;
  616. }
  617. ch_reg->thresh[iqs269_events[i].th_offs] = val;
  618. }
  619. if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
  620. u8 *hyst = &ch_reg->hyst;
  621. if (val > IQS269_CHx_HYST_MAX) {
  622. dev_err(&client->dev,
  623. "Invalid channel %u hysteresis: %u\n",
  624. reg, val);
  625. fwnode_handle_put(ev_node);
  626. return -EINVAL;
  627. }
  628. if (i == IQS269_EVENT_DEEP_DN ||
  629. i == IQS269_EVENT_DEEP_UP) {
  630. *hyst &= ~IQS269_CHx_HYST_DEEP_MASK;
  631. *hyst |= (val << IQS269_CHx_HYST_DEEP_SHIFT);
  632. } else if (i == IQS269_EVENT_TOUCH_DN ||
  633. i == IQS269_EVENT_TOUCH_UP) {
  634. *hyst &= ~IQS269_CHx_HYST_TOUCH_MASK;
  635. *hyst |= val;
  636. }
  637. }
  638. error = fwnode_property_read_u32(ev_node, "linux,code", &val);
  639. fwnode_handle_put(ev_node);
  640. if (error == -EINVAL) {
  641. continue;
  642. } else if (error) {
  643. dev_err(&client->dev,
  644. "Failed to read channel %u code: %d\n", reg,
  645. error);
  646. return error;
  647. }
  648. switch (reg) {
  649. case IQS269_CHx_HALL_ACTIVE:
  650. if (iqs269->hall_enable) {
  651. iqs269->switches[i].code = val;
  652. iqs269->switches[i].enabled = true;
  653. }
  654. fallthrough;
  655. case IQS269_CHx_HALL_INACTIVE:
  656. if (iqs269->hall_enable)
  657. break;
  658. fallthrough;
  659. default:
  660. iqs269->keycode[i * IQS269_NUM_CH + reg] = val;
  661. }
  662. iqs269->sys_reg.event_mask &= ~iqs269_events[i].mask;
  663. }
  664. return 0;
  665. }
  666. static int iqs269_parse_prop(struct iqs269_private *iqs269)
  667. {
  668. struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
  669. struct i2c_client *client = iqs269->client;
  670. u16 general, misc_a, misc_b;
  671. unsigned int val;
  672. int error;
  673. iqs269->hall_enable = device_property_present(&client->dev,
  674. "azoteq,hall-enable");
  675. error = regmap_raw_read(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
  676. sizeof(*sys_reg));
  677. if (error)
  678. return error;
  679. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-lta",
  680. &val)) {
  681. if (val > IQS269_FILT_STR_MAX) {
  682. dev_err(&client->dev, "Invalid filter strength: %u\n",
  683. val);
  684. return -EINVAL;
  685. }
  686. sys_reg->filter &= ~IQS269_FILT_STR_LP_LTA_MASK;
  687. sys_reg->filter |= (val << IQS269_FILT_STR_LP_LTA_SHIFT);
  688. }
  689. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-cnt",
  690. &val)) {
  691. if (val > IQS269_FILT_STR_MAX) {
  692. dev_err(&client->dev, "Invalid filter strength: %u\n",
  693. val);
  694. return -EINVAL;
  695. }
  696. sys_reg->filter &= ~IQS269_FILT_STR_LP_CNT_MASK;
  697. sys_reg->filter |= (val << IQS269_FILT_STR_LP_CNT_SHIFT);
  698. }
  699. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-lta",
  700. &val)) {
  701. if (val > IQS269_FILT_STR_MAX) {
  702. dev_err(&client->dev, "Invalid filter strength: %u\n",
  703. val);
  704. return -EINVAL;
  705. }
  706. sys_reg->filter &= ~IQS269_FILT_STR_NP_LTA_MASK;
  707. sys_reg->filter |= (val << IQS269_FILT_STR_NP_LTA_SHIFT);
  708. }
  709. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-cnt",
  710. &val)) {
  711. if (val > IQS269_FILT_STR_MAX) {
  712. dev_err(&client->dev, "Invalid filter strength: %u\n",
  713. val);
  714. return -EINVAL;
  715. }
  716. sys_reg->filter &= ~IQS269_FILT_STR_NP_CNT_MASK;
  717. sys_reg->filter |= val;
  718. }
  719. if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
  720. &val)) {
  721. if (val > IQS269_RATE_NP_MS_MAX) {
  722. dev_err(&client->dev, "Invalid report rate: %u\n", val);
  723. return -EINVAL;
  724. }
  725. sys_reg->rate_np = val;
  726. }
  727. if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
  728. &val)) {
  729. if (val > IQS269_RATE_LP_MS_MAX) {
  730. dev_err(&client->dev, "Invalid report rate: %u\n", val);
  731. return -EINVAL;
  732. }
  733. sys_reg->rate_lp = val;
  734. }
  735. if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
  736. &val)) {
  737. if (val > IQS269_RATE_ULP_MS_MAX) {
  738. dev_err(&client->dev, "Invalid report rate: %u\n", val);
  739. return -EINVAL;
  740. }
  741. sys_reg->rate_ulp = val / 16;
  742. }
  743. if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
  744. &val)) {
  745. if (val > IQS269_TIMEOUT_PWR_MS_MAX) {
  746. dev_err(&client->dev, "Invalid timeout: %u\n", val);
  747. return -EINVAL;
  748. }
  749. sys_reg->timeout_pwr = val / 512;
  750. }
  751. if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
  752. &val)) {
  753. if (val > IQS269_TIMEOUT_LTA_MS_MAX) {
  754. dev_err(&client->dev, "Invalid timeout: %u\n", val);
  755. return -EINVAL;
  756. }
  757. sys_reg->timeout_lta = val / 512;
  758. }
  759. misc_a = be16_to_cpu(sys_reg->misc_a);
  760. misc_b = be16_to_cpu(sys_reg->misc_b);
  761. misc_a &= ~IQS269_MISC_A_ATI_BAND_DISABLE;
  762. if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
  763. misc_a |= IQS269_MISC_A_ATI_BAND_DISABLE;
  764. misc_a &= ~IQS269_MISC_A_ATI_LP_ONLY;
  765. if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
  766. misc_a |= IQS269_MISC_A_ATI_LP_ONLY;
  767. misc_a &= ~IQS269_MISC_A_ATI_BAND_TIGHTEN;
  768. if (device_property_present(&client->dev, "azoteq,ati-band-tighten"))
  769. misc_a |= IQS269_MISC_A_ATI_BAND_TIGHTEN;
  770. misc_a &= ~IQS269_MISC_A_FILT_DISABLE;
  771. if (device_property_present(&client->dev, "azoteq,filt-disable"))
  772. misc_a |= IQS269_MISC_A_FILT_DISABLE;
  773. if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
  774. &val)) {
  775. if (val >= IQS269_NUM_CH) {
  776. dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
  777. val);
  778. return -EINVAL;
  779. }
  780. misc_a &= ~IQS269_MISC_A_GPIO3_SELECT_MASK;
  781. misc_a |= (val << IQS269_MISC_A_GPIO3_SELECT_SHIFT);
  782. }
  783. misc_a &= ~IQS269_MISC_A_DUAL_DIR;
  784. if (device_property_present(&client->dev, "azoteq,dual-direction"))
  785. misc_a |= IQS269_MISC_A_DUAL_DIR;
  786. if (!device_property_read_u32(&client->dev, "azoteq,tx-freq", &val)) {
  787. if (val > IQS269_MISC_A_TX_FREQ_MAX) {
  788. dev_err(&client->dev,
  789. "Invalid excitation frequency: %u\n", val);
  790. return -EINVAL;
  791. }
  792. misc_a &= ~IQS269_MISC_A_TX_FREQ_MASK;
  793. misc_a |= (val << IQS269_MISC_A_TX_FREQ_SHIFT);
  794. }
  795. misc_a &= ~IQS269_MISC_A_GLOBAL_CAP_SIZE;
  796. if (device_property_present(&client->dev, "azoteq,global-cap-increase"))
  797. misc_a |= IQS269_MISC_A_GLOBAL_CAP_SIZE;
  798. if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
  799. &val)) {
  800. if (val > IQS269_MISC_B_RESEED_UI_SEL_MAX) {
  801. dev_err(&client->dev, "Invalid reseed selection: %u\n",
  802. val);
  803. return -EINVAL;
  804. }
  805. misc_b &= ~IQS269_MISC_B_RESEED_UI_SEL_MASK;
  806. misc_b |= (val << IQS269_MISC_B_RESEED_UI_SEL_SHIFT);
  807. }
  808. misc_b &= ~IQS269_MISC_B_TRACKING_UI_ENABLE;
  809. if (device_property_present(&client->dev, "azoteq,tracking-enable"))
  810. misc_b |= IQS269_MISC_B_TRACKING_UI_ENABLE;
  811. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-slider",
  812. &val)) {
  813. if (val > IQS269_FILT_STR_MAX) {
  814. dev_err(&client->dev, "Invalid filter strength: %u\n",
  815. val);
  816. return -EINVAL;
  817. }
  818. misc_b &= ~IQS269_MISC_B_FILT_STR_SLIDER;
  819. misc_b |= val;
  820. }
  821. sys_reg->misc_a = cpu_to_be16(misc_a);
  822. sys_reg->misc_b = cpu_to_be16(misc_b);
  823. sys_reg->active = 0;
  824. sys_reg->reseed = 0;
  825. sys_reg->blocking = 0;
  826. sys_reg->slider_select[0] = 0;
  827. /*
  828. * If configured via OTP to do so, the device asserts a pulse on the
  829. * GPIO4 pin for approximately 60 ms once a selected channel is held
  830. * in a state of touch for a configurable length of time.
  831. *
  832. * In that case, the register used for slider 1 channel selection is
  833. * repurposed for the touch-and-hold timer ceiling.
  834. */
  835. if (iqs269->otp_option & IQS269_OTP_OPTION_HOLD) {
  836. if (!device_property_read_u32(&client->dev,
  837. "azoteq,touch-hold-ms", &val)) {
  838. if (val < IQS269_TOUCH_HOLD_MS_MIN ||
  839. val > IQS269_TOUCH_HOLD_MS_MAX) {
  840. dev_err(&client->dev,
  841. "Invalid touch-and-hold ceiling: %u\n",
  842. val);
  843. return -EINVAL;
  844. }
  845. sys_reg->slider_select[1] = val / 256;
  846. } else if (iqs269->ver_info.fw_num < IQS269_VER_INFO_FW_NUM_3) {
  847. /*
  848. * The default touch-and-hold timer ceiling initially
  849. * read from early revisions of silicon is invalid if
  850. * the device experienced a soft reset between power-
  851. * on and the read operation.
  852. *
  853. * To protect against this case, explicitly cache the
  854. * default value so that it is restored each time the
  855. * device is re-initialized.
  856. */
  857. sys_reg->slider_select[1] = IQS269_TOUCH_HOLD_DEFAULT;
  858. }
  859. } else {
  860. sys_reg->slider_select[1] = 0;
  861. }
  862. sys_reg->event_mask = ~((u8)IQS269_EVENT_MASK_SYS);
  863. device_for_each_child_node_scoped(&client->dev, ch_node) {
  864. error = iqs269_parse_chan(iqs269, ch_node);
  865. if (error)
  866. return error;
  867. }
  868. /*
  869. * Volunteer all active channels to participate in ATI when REDO-ATI is
  870. * manually triggered.
  871. */
  872. sys_reg->redo_ati = sys_reg->active;
  873. general = be16_to_cpu(sys_reg->general);
  874. if (device_property_present(&client->dev, "azoteq,clk-div"))
  875. general |= IQS269_SYS_SETTINGS_CLK_DIV;
  876. /*
  877. * Configure the device to automatically switch between normal and low-
  878. * power modes as a function of sensing activity. Ultra-low-power mode,
  879. * if enabled, is reserved for suspend.
  880. */
  881. general &= ~IQS269_SYS_SETTINGS_ULP_AUTO;
  882. general &= ~IQS269_SYS_SETTINGS_DIS_AUTO;
  883. general &= ~IQS269_SYS_SETTINGS_PWR_MODE_MASK;
  884. if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
  885. &val)) {
  886. if (val > IQS269_SYS_SETTINGS_PWR_MODE_MAX) {
  887. dev_err(&client->dev, "Invalid suspend mode: %u\n",
  888. val);
  889. return -EINVAL;
  890. }
  891. general |= (val << IQS269_SYS_SETTINGS_PWR_MODE_SHIFT);
  892. }
  893. if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
  894. &val)) {
  895. if (val > IQS269_SYS_SETTINGS_ULP_UPDATE_MAX) {
  896. dev_err(&client->dev, "Invalid update rate: %u\n", val);
  897. return -EINVAL;
  898. }
  899. general &= ~IQS269_SYS_SETTINGS_ULP_UPDATE_MASK;
  900. general |= (val << IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT);
  901. }
  902. if (device_property_present(&client->dev, "linux,keycodes")) {
  903. int scale = 1;
  904. int count = device_property_count_u32(&client->dev,
  905. "linux,keycodes");
  906. if (count > IQS269_NUM_GESTURES * IQS269_NUM_SL) {
  907. dev_err(&client->dev, "Too many keycodes present\n");
  908. return -EINVAL;
  909. } else if (count < 0) {
  910. dev_err(&client->dev, "Failed to count keycodes: %d\n",
  911. count);
  912. return count;
  913. }
  914. error = device_property_read_u32_array(&client->dev,
  915. "linux,keycodes",
  916. *iqs269->sl_code, count);
  917. if (error) {
  918. dev_err(&client->dev, "Failed to read keycodes: %d\n",
  919. error);
  920. return error;
  921. }
  922. if (device_property_present(&client->dev,
  923. "azoteq,gesture-swipe"))
  924. general |= IQS269_SYS_SETTINGS_SLIDER_SWIPE;
  925. /*
  926. * Early revisions of silicon use a more granular step size for
  927. * tap and swipe gesture timeouts; scale them appropriately.
  928. */
  929. if (iqs269->ver_info.fw_num < IQS269_VER_INFO_FW_NUM_3)
  930. scale = 4;
  931. if (!device_property_read_u32(&client->dev,
  932. "azoteq,timeout-tap-ms", &val)) {
  933. if (val > IQS269_TIMEOUT_TAP_MS_MAX / scale) {
  934. dev_err(&client->dev, "Invalid timeout: %u\n",
  935. val);
  936. return -EINVAL;
  937. }
  938. sys_reg->timeout_tap = val / (16 / scale);
  939. }
  940. if (!device_property_read_u32(&client->dev,
  941. "azoteq,timeout-swipe-ms",
  942. &val)) {
  943. if (val > IQS269_TIMEOUT_SWIPE_MS_MAX / scale) {
  944. dev_err(&client->dev, "Invalid timeout: %u\n",
  945. val);
  946. return -EINVAL;
  947. }
  948. sys_reg->timeout_swipe = val / (16 / scale);
  949. }
  950. if (!device_property_read_u32(&client->dev,
  951. "azoteq,thresh-swipe", &val)) {
  952. if (val > IQS269_THRESH_SWIPE_MAX) {
  953. dev_err(&client->dev, "Invalid threshold: %u\n",
  954. val);
  955. return -EINVAL;
  956. }
  957. sys_reg->thresh_swipe = val;
  958. }
  959. sys_reg->event_mask &= ~IQS269_EVENT_MASK_GESTURE;
  960. }
  961. general &= ~IQS269_SYS_SETTINGS_RESEED_OFFSET;
  962. if (device_property_present(&client->dev, "azoteq,reseed-offset"))
  963. general |= IQS269_SYS_SETTINGS_RESEED_OFFSET;
  964. general |= IQS269_SYS_SETTINGS_EVENT_MODE;
  965. /*
  966. * As per the datasheet, enable streaming during normal-power mode if
  967. * raw coordinates will be read from either slider. In that case, the
  968. * device returns to event mode during low-power mode.
  969. */
  970. if (iqs269_slider_type(iqs269, 0) == IQS269_SLIDER_RAW ||
  971. iqs269_slider_type(iqs269, 1) == IQS269_SLIDER_RAW)
  972. general |= IQS269_SYS_SETTINGS_EVENT_MODE_LP;
  973. general |= IQS269_SYS_SETTINGS_REDO_ATI;
  974. general |= IQS269_SYS_SETTINGS_ACK_RESET;
  975. sys_reg->general = cpu_to_be16(general);
  976. return 0;
  977. }
  978. static const struct reg_sequence iqs269_tws_init[] = {
  979. { IQS269_TOUCH_HOLD_SLIDER_SEL, IQS269_TOUCH_HOLD_DEFAULT },
  980. { 0xF0, 0x580F },
  981. { 0xF0, 0x59EF },
  982. };
  983. static int iqs269_dev_init(struct iqs269_private *iqs269)
  984. {
  985. int error;
  986. mutex_lock(&iqs269->lock);
  987. /*
  988. * Early revisions of silicon require the following workaround in order
  989. * to restore any OTP-enabled functionality after a soft reset.
  990. */
  991. if (iqs269->otp_option == IQS269_OTP_OPTION_TWS &&
  992. iqs269->ver_info.fw_num < IQS269_VER_INFO_FW_NUM_3) {
  993. error = regmap_multi_reg_write(iqs269->regmap, iqs269_tws_init,
  994. ARRAY_SIZE(iqs269_tws_init));
  995. if (error)
  996. goto err_mutex;
  997. }
  998. error = regmap_update_bits(iqs269->regmap, IQS269_HALL_UI,
  999. IQS269_HALL_UI_ENABLE,
  1000. iqs269->hall_enable ? ~0 : 0);
  1001. if (error)
  1002. goto err_mutex;
  1003. error = regmap_raw_write(iqs269->regmap, IQS269_SYS_SETTINGS,
  1004. &iqs269->sys_reg, sizeof(iqs269->sys_reg));
  1005. if (error)
  1006. goto err_mutex;
  1007. /*
  1008. * The following delay gives the device time to deassert its RDY output
  1009. * so as to prevent an interrupt from being serviced prematurely.
  1010. */
  1011. usleep_range(2000, 2100);
  1012. iqs269->ati_current = true;
  1013. err_mutex:
  1014. mutex_unlock(&iqs269->lock);
  1015. return error;
  1016. }
  1017. static int iqs269_input_init(struct iqs269_private *iqs269)
  1018. {
  1019. struct i2c_client *client = iqs269->client;
  1020. unsigned int sw_code, keycode;
  1021. int error, i, j;
  1022. iqs269->keypad = devm_input_allocate_device(&client->dev);
  1023. if (!iqs269->keypad)
  1024. return -ENOMEM;
  1025. iqs269->keypad->keycodemax = ARRAY_SIZE(iqs269->keycode);
  1026. iqs269->keypad->keycode = iqs269->keycode;
  1027. iqs269->keypad->keycodesize = sizeof(*iqs269->keycode);
  1028. iqs269->keypad->name = "iqs269a_keypad";
  1029. iqs269->keypad->id.bustype = BUS_I2C;
  1030. for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
  1031. sw_code = iqs269->switches[i].code;
  1032. for (j = 0; j < IQS269_NUM_CH; j++) {
  1033. keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
  1034. /*
  1035. * Hall-effect sensing repurposes a pair of dedicated
  1036. * channels, only one of which reports events.
  1037. */
  1038. switch (j) {
  1039. case IQS269_CHx_HALL_ACTIVE:
  1040. if (iqs269->hall_enable &&
  1041. iqs269->switches[i].enabled)
  1042. input_set_capability(iqs269->keypad,
  1043. EV_SW, sw_code);
  1044. fallthrough;
  1045. case IQS269_CHx_HALL_INACTIVE:
  1046. if (iqs269->hall_enable)
  1047. continue;
  1048. fallthrough;
  1049. default:
  1050. if (keycode != KEY_RESERVED)
  1051. input_set_capability(iqs269->keypad,
  1052. EV_KEY, keycode);
  1053. }
  1054. }
  1055. }
  1056. for (i = 0; i < IQS269_NUM_SL; i++) {
  1057. if (iqs269_slider_type(iqs269, i) == IQS269_SLIDER_NONE)
  1058. continue;
  1059. iqs269->slider[i] = devm_input_allocate_device(&client->dev);
  1060. if (!iqs269->slider[i])
  1061. return -ENOMEM;
  1062. iqs269->slider[i]->keycodemax = ARRAY_SIZE(iqs269->sl_code[i]);
  1063. iqs269->slider[i]->keycode = iqs269->sl_code[i];
  1064. iqs269->slider[i]->keycodesize = sizeof(**iqs269->sl_code);
  1065. iqs269->slider[i]->name = i ? "iqs269a_slider_1"
  1066. : "iqs269a_slider_0";
  1067. iqs269->slider[i]->id.bustype = BUS_I2C;
  1068. for (j = 0; j < IQS269_NUM_GESTURES; j++)
  1069. if (iqs269->sl_code[i][j] != KEY_RESERVED)
  1070. input_set_capability(iqs269->slider[i], EV_KEY,
  1071. iqs269->sl_code[i][j]);
  1072. /*
  1073. * Present the slider as a narrow trackpad if one or more chan-
  1074. * nels have been selected to participate, but no gestures have
  1075. * been mapped to a keycode.
  1076. */
  1077. if (iqs269_slider_type(iqs269, i) == IQS269_SLIDER_RAW) {
  1078. input_set_capability(iqs269->slider[i],
  1079. EV_KEY, BTN_TOUCH);
  1080. input_set_abs_params(iqs269->slider[i],
  1081. ABS_X, 0, 255, 0, 0);
  1082. }
  1083. error = input_register_device(iqs269->slider[i]);
  1084. if (error) {
  1085. dev_err(&client->dev,
  1086. "Failed to register slider %d: %d\n", i, error);
  1087. return error;
  1088. }
  1089. }
  1090. return 0;
  1091. }
  1092. static int iqs269_report(struct iqs269_private *iqs269)
  1093. {
  1094. struct i2c_client *client = iqs269->client;
  1095. struct iqs269_flags flags;
  1096. unsigned int sw_code, keycode;
  1097. int error, i, j;
  1098. u8 slider_x[IQS269_NUM_SL];
  1099. u8 dir_mask, state;
  1100. error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS, &flags,
  1101. sizeof(flags));
  1102. if (error) {
  1103. dev_err(&client->dev, "Failed to read device status: %d\n",
  1104. error);
  1105. return error;
  1106. }
  1107. /*
  1108. * The device resets itself if its own watchdog bites, which can happen
  1109. * in the event of an I2C communication error. In this case, the device
  1110. * asserts a SHOW_RESET interrupt and all registers must be restored.
  1111. */
  1112. if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_SHOW_RESET) {
  1113. dev_err(&client->dev, "Unexpected device reset\n");
  1114. error = iqs269_dev_init(iqs269);
  1115. if (error)
  1116. dev_err(&client->dev,
  1117. "Failed to re-initialize device: %d\n", error);
  1118. return error;
  1119. }
  1120. if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_IN_ATI)
  1121. return 0;
  1122. if (iqs269_slider_type(iqs269, 0) == IQS269_SLIDER_RAW ||
  1123. iqs269_slider_type(iqs269, 1) == IQS269_SLIDER_RAW) {
  1124. error = regmap_raw_read(iqs269->regmap, IQS269_SLIDER_X,
  1125. slider_x, sizeof(slider_x));
  1126. if (error) {
  1127. dev_err(&client->dev,
  1128. "Failed to read slider position: %d\n", error);
  1129. return error;
  1130. }
  1131. }
  1132. for (i = 0; i < IQS269_NUM_SL; i++) {
  1133. flags.gesture >>= (i * IQS269_NUM_GESTURES);
  1134. switch (iqs269_slider_type(iqs269, i)) {
  1135. case IQS269_SLIDER_NONE:
  1136. continue;
  1137. case IQS269_SLIDER_KEY:
  1138. for (j = 0; j < IQS269_NUM_GESTURES; j++)
  1139. input_report_key(iqs269->slider[i],
  1140. iqs269->sl_code[i][j],
  1141. flags.gesture & BIT(j));
  1142. if (!(flags.gesture & (BIT(IQS269_GESTURE_FLICK_NEG) |
  1143. BIT(IQS269_GESTURE_FLICK_POS) |
  1144. BIT(IQS269_GESTURE_TAP))))
  1145. break;
  1146. input_sync(iqs269->slider[i]);
  1147. /*
  1148. * Momentary gestures are followed by a complementary
  1149. * release cycle so as to emulate a full keystroke.
  1150. */
  1151. for (j = 0; j < IQS269_NUM_GESTURES; j++)
  1152. if (j != IQS269_GESTURE_HOLD)
  1153. input_report_key(iqs269->slider[i],
  1154. iqs269->sl_code[i][j],
  1155. 0);
  1156. break;
  1157. case IQS269_SLIDER_RAW:
  1158. /*
  1159. * The slider is considered to be in a state of touch
  1160. * if any selected channels are in a state of touch.
  1161. */
  1162. state = flags.states[IQS269_ST_OFFS_TOUCH];
  1163. state &= iqs269->sys_reg.slider_select[i];
  1164. input_report_key(iqs269->slider[i], BTN_TOUCH, state);
  1165. if (state)
  1166. input_report_abs(iqs269->slider[i],
  1167. ABS_X, slider_x[i]);
  1168. break;
  1169. }
  1170. input_sync(iqs269->slider[i]);
  1171. }
  1172. for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
  1173. dir_mask = flags.states[IQS269_ST_OFFS_DIR];
  1174. if (!iqs269_events[i].dir_up)
  1175. dir_mask = ~dir_mask;
  1176. state = flags.states[iqs269_events[i].st_offs] & dir_mask;
  1177. sw_code = iqs269->switches[i].code;
  1178. for (j = 0; j < IQS269_NUM_CH; j++) {
  1179. keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
  1180. switch (j) {
  1181. case IQS269_CHx_HALL_ACTIVE:
  1182. if (iqs269->hall_enable &&
  1183. iqs269->switches[i].enabled)
  1184. input_report_switch(iqs269->keypad,
  1185. sw_code,
  1186. state & BIT(j));
  1187. fallthrough;
  1188. case IQS269_CHx_HALL_INACTIVE:
  1189. if (iqs269->hall_enable)
  1190. continue;
  1191. fallthrough;
  1192. default:
  1193. input_report_key(iqs269->keypad, keycode,
  1194. state & BIT(j));
  1195. }
  1196. }
  1197. }
  1198. input_sync(iqs269->keypad);
  1199. /*
  1200. * The following completion signals that ATI has finished, any initial
  1201. * switch states have been reported and the keypad can be registered.
  1202. */
  1203. complete_all(&iqs269->ati_done);
  1204. return 0;
  1205. }
  1206. static irqreturn_t iqs269_irq(int irq, void *context)
  1207. {
  1208. struct iqs269_private *iqs269 = context;
  1209. if (iqs269_report(iqs269))
  1210. return IRQ_NONE;
  1211. /*
  1212. * The device does not deassert its interrupt (RDY) pin until shortly
  1213. * after receiving an I2C stop condition; the following delay ensures
  1214. * the interrupt handler does not return before this time.
  1215. */
  1216. iqs269_irq_wait();
  1217. return IRQ_HANDLED;
  1218. }
  1219. static ssize_t counts_show(struct device *dev,
  1220. struct device_attribute *attr, char *buf)
  1221. {
  1222. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1223. struct i2c_client *client = iqs269->client;
  1224. __le16 counts;
  1225. int error;
  1226. if (!iqs269->ati_current || iqs269->hall_enable)
  1227. return -EPERM;
  1228. if (!completion_done(&iqs269->ati_done))
  1229. return -EBUSY;
  1230. /*
  1231. * Unsolicited I2C communication prompts the device to assert its RDY
  1232. * pin, so disable the interrupt line until the operation is finished
  1233. * and RDY has been deasserted.
  1234. */
  1235. disable_irq(client->irq);
  1236. error = regmap_raw_read(iqs269->regmap,
  1237. IQS269_CHx_COUNTS + iqs269->ch_num * 2,
  1238. &counts, sizeof(counts));
  1239. iqs269_irq_wait();
  1240. enable_irq(client->irq);
  1241. if (error)
  1242. return error;
  1243. return sysfs_emit(buf, "%u\n", le16_to_cpu(counts));
  1244. }
  1245. static ssize_t hall_bin_show(struct device *dev,
  1246. struct device_attribute *attr, char *buf)
  1247. {
  1248. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1249. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  1250. struct i2c_client *client = iqs269->client;
  1251. unsigned int val;
  1252. int error;
  1253. disable_irq(client->irq);
  1254. error = regmap_read(iqs269->regmap, IQS269_CAL_DATA_A, &val);
  1255. iqs269_irq_wait();
  1256. enable_irq(client->irq);
  1257. if (error)
  1258. return error;
  1259. switch (ch_reg[IQS269_CHx_HALL_ACTIVE].rx_enable &
  1260. ch_reg[IQS269_CHx_HALL_INACTIVE].rx_enable) {
  1261. case IQS269_HALL_PAD_R:
  1262. val &= IQS269_CAL_DATA_A_HALL_BIN_R_MASK;
  1263. val >>= IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT;
  1264. break;
  1265. case IQS269_HALL_PAD_L:
  1266. val &= IQS269_CAL_DATA_A_HALL_BIN_L_MASK;
  1267. val >>= IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT;
  1268. break;
  1269. default:
  1270. return -EINVAL;
  1271. }
  1272. return sysfs_emit(buf, "%u\n", val);
  1273. }
  1274. static ssize_t hall_enable_show(struct device *dev,
  1275. struct device_attribute *attr, char *buf)
  1276. {
  1277. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1278. return sysfs_emit(buf, "%u\n", iqs269->hall_enable);
  1279. }
  1280. static ssize_t hall_enable_store(struct device *dev,
  1281. struct device_attribute *attr, const char *buf,
  1282. size_t count)
  1283. {
  1284. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1285. unsigned int val;
  1286. int error;
  1287. error = kstrtouint(buf, 10, &val);
  1288. if (error)
  1289. return error;
  1290. mutex_lock(&iqs269->lock);
  1291. iqs269->hall_enable = val;
  1292. iqs269->ati_current = false;
  1293. mutex_unlock(&iqs269->lock);
  1294. return count;
  1295. }
  1296. static ssize_t ch_number_show(struct device *dev,
  1297. struct device_attribute *attr, char *buf)
  1298. {
  1299. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1300. return sysfs_emit(buf, "%u\n", iqs269->ch_num);
  1301. }
  1302. static ssize_t ch_number_store(struct device *dev,
  1303. struct device_attribute *attr, const char *buf,
  1304. size_t count)
  1305. {
  1306. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1307. unsigned int val;
  1308. int error;
  1309. error = kstrtouint(buf, 10, &val);
  1310. if (error)
  1311. return error;
  1312. if (val >= IQS269_NUM_CH)
  1313. return -EINVAL;
  1314. iqs269->ch_num = val;
  1315. return count;
  1316. }
  1317. static ssize_t rx_enable_show(struct device *dev,
  1318. struct device_attribute *attr, char *buf)
  1319. {
  1320. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1321. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  1322. return sysfs_emit(buf, "%u\n", ch_reg[iqs269->ch_num].rx_enable);
  1323. }
  1324. static ssize_t rx_enable_store(struct device *dev,
  1325. struct device_attribute *attr, const char *buf,
  1326. size_t count)
  1327. {
  1328. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1329. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  1330. unsigned int val;
  1331. int error;
  1332. error = kstrtouint(buf, 10, &val);
  1333. if (error)
  1334. return error;
  1335. if (val > 0xFF)
  1336. return -EINVAL;
  1337. mutex_lock(&iqs269->lock);
  1338. ch_reg[iqs269->ch_num].rx_enable = val;
  1339. iqs269->ati_current = false;
  1340. mutex_unlock(&iqs269->lock);
  1341. return count;
  1342. }
  1343. static ssize_t ati_mode_show(struct device *dev,
  1344. struct device_attribute *attr, char *buf)
  1345. {
  1346. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1347. unsigned int val;
  1348. int error;
  1349. error = iqs269_ati_mode_get(iqs269, iqs269->ch_num, &val);
  1350. if (error)
  1351. return error;
  1352. return sysfs_emit(buf, "%u\n", val);
  1353. }
  1354. static ssize_t ati_mode_store(struct device *dev,
  1355. struct device_attribute *attr, const char *buf,
  1356. size_t count)
  1357. {
  1358. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1359. unsigned int val;
  1360. int error;
  1361. error = kstrtouint(buf, 10, &val);
  1362. if (error)
  1363. return error;
  1364. error = iqs269_ati_mode_set(iqs269, iqs269->ch_num, val);
  1365. if (error)
  1366. return error;
  1367. return count;
  1368. }
  1369. static ssize_t ati_base_show(struct device *dev,
  1370. struct device_attribute *attr, char *buf)
  1371. {
  1372. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1373. unsigned int val;
  1374. int error;
  1375. error = iqs269_ati_base_get(iqs269, iqs269->ch_num, &val);
  1376. if (error)
  1377. return error;
  1378. return sysfs_emit(buf, "%u\n", val);
  1379. }
  1380. static ssize_t ati_base_store(struct device *dev,
  1381. struct device_attribute *attr, const char *buf,
  1382. size_t count)
  1383. {
  1384. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1385. unsigned int val;
  1386. int error;
  1387. error = kstrtouint(buf, 10, &val);
  1388. if (error)
  1389. return error;
  1390. error = iqs269_ati_base_set(iqs269, iqs269->ch_num, val);
  1391. if (error)
  1392. return error;
  1393. return count;
  1394. }
  1395. static ssize_t ati_target_show(struct device *dev,
  1396. struct device_attribute *attr, char *buf)
  1397. {
  1398. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1399. unsigned int val;
  1400. int error;
  1401. error = iqs269_ati_target_get(iqs269, iqs269->ch_num, &val);
  1402. if (error)
  1403. return error;
  1404. return sysfs_emit(buf, "%u\n", val);
  1405. }
  1406. static ssize_t ati_target_store(struct device *dev,
  1407. struct device_attribute *attr, const char *buf,
  1408. size_t count)
  1409. {
  1410. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1411. unsigned int val;
  1412. int error;
  1413. error = kstrtouint(buf, 10, &val);
  1414. if (error)
  1415. return error;
  1416. error = iqs269_ati_target_set(iqs269, iqs269->ch_num, val);
  1417. if (error)
  1418. return error;
  1419. return count;
  1420. }
  1421. static ssize_t ati_trigger_show(struct device *dev,
  1422. struct device_attribute *attr, char *buf)
  1423. {
  1424. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1425. return sysfs_emit(buf, "%u\n",
  1426. iqs269->ati_current &&
  1427. completion_done(&iqs269->ati_done));
  1428. }
  1429. static ssize_t ati_trigger_store(struct device *dev,
  1430. struct device_attribute *attr, const char *buf,
  1431. size_t count)
  1432. {
  1433. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1434. struct i2c_client *client = iqs269->client;
  1435. unsigned int val;
  1436. int error;
  1437. error = kstrtouint(buf, 10, &val);
  1438. if (error)
  1439. return error;
  1440. if (!val)
  1441. return count;
  1442. disable_irq(client->irq);
  1443. reinit_completion(&iqs269->ati_done);
  1444. error = iqs269_dev_init(iqs269);
  1445. iqs269_irq_wait();
  1446. enable_irq(client->irq);
  1447. if (error)
  1448. return error;
  1449. if (!wait_for_completion_timeout(&iqs269->ati_done,
  1450. msecs_to_jiffies(2000)))
  1451. return -ETIMEDOUT;
  1452. return count;
  1453. }
  1454. static DEVICE_ATTR_RO(counts);
  1455. static DEVICE_ATTR_RO(hall_bin);
  1456. static DEVICE_ATTR_RW(hall_enable);
  1457. static DEVICE_ATTR_RW(ch_number);
  1458. static DEVICE_ATTR_RW(rx_enable);
  1459. static DEVICE_ATTR_RW(ati_mode);
  1460. static DEVICE_ATTR_RW(ati_base);
  1461. static DEVICE_ATTR_RW(ati_target);
  1462. static DEVICE_ATTR_RW(ati_trigger);
  1463. static struct attribute *iqs269_attrs[] = {
  1464. &dev_attr_counts.attr,
  1465. &dev_attr_hall_bin.attr,
  1466. &dev_attr_hall_enable.attr,
  1467. &dev_attr_ch_number.attr,
  1468. &dev_attr_rx_enable.attr,
  1469. &dev_attr_ati_mode.attr,
  1470. &dev_attr_ati_base.attr,
  1471. &dev_attr_ati_target.attr,
  1472. &dev_attr_ati_trigger.attr,
  1473. NULL,
  1474. };
  1475. ATTRIBUTE_GROUPS(iqs269);
  1476. static const struct regmap_config iqs269_regmap_config = {
  1477. .reg_bits = 8,
  1478. .val_bits = 16,
  1479. .max_register = IQS269_MAX_REG,
  1480. };
  1481. static int iqs269_probe(struct i2c_client *client)
  1482. {
  1483. struct iqs269_private *iqs269;
  1484. int error;
  1485. iqs269 = devm_kzalloc(&client->dev, sizeof(*iqs269), GFP_KERNEL);
  1486. if (!iqs269)
  1487. return -ENOMEM;
  1488. i2c_set_clientdata(client, iqs269);
  1489. iqs269->client = client;
  1490. iqs269->regmap = devm_regmap_init_i2c(client, &iqs269_regmap_config);
  1491. if (IS_ERR(iqs269->regmap)) {
  1492. error = PTR_ERR(iqs269->regmap);
  1493. dev_err(&client->dev, "Failed to initialize register map: %d\n",
  1494. error);
  1495. return error;
  1496. }
  1497. mutex_init(&iqs269->lock);
  1498. init_completion(&iqs269->ati_done);
  1499. iqs269->otp_option = (uintptr_t)device_get_match_data(&client->dev);
  1500. error = regmap_raw_read(iqs269->regmap, IQS269_VER_INFO,
  1501. &iqs269->ver_info, sizeof(iqs269->ver_info));
  1502. if (error)
  1503. return error;
  1504. if (iqs269->ver_info.prod_num != IQS269_VER_INFO_PROD_NUM) {
  1505. dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
  1506. iqs269->ver_info.prod_num);
  1507. return -EINVAL;
  1508. }
  1509. error = iqs269_parse_prop(iqs269);
  1510. if (error)
  1511. return error;
  1512. error = iqs269_dev_init(iqs269);
  1513. if (error) {
  1514. dev_err(&client->dev, "Failed to initialize device: %d\n",
  1515. error);
  1516. return error;
  1517. }
  1518. error = iqs269_input_init(iqs269);
  1519. if (error)
  1520. return error;
  1521. error = devm_request_threaded_irq(&client->dev, client->irq,
  1522. NULL, iqs269_irq, IRQF_ONESHOT,
  1523. client->name, iqs269);
  1524. if (error) {
  1525. dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
  1526. return error;
  1527. }
  1528. if (!wait_for_completion_timeout(&iqs269->ati_done,
  1529. msecs_to_jiffies(2000))) {
  1530. dev_err(&client->dev, "Failed to complete ATI\n");
  1531. return -ETIMEDOUT;
  1532. }
  1533. /*
  1534. * The keypad may include one or more switches and is not registered
  1535. * until ATI is complete and the initial switch states are read.
  1536. */
  1537. error = input_register_device(iqs269->keypad);
  1538. if (error) {
  1539. dev_err(&client->dev, "Failed to register keypad: %d\n", error);
  1540. return error;
  1541. }
  1542. return error;
  1543. }
  1544. static u16 iqs269_general_get(struct iqs269_private *iqs269)
  1545. {
  1546. u16 general = be16_to_cpu(iqs269->sys_reg.general);
  1547. general &= ~IQS269_SYS_SETTINGS_REDO_ATI;
  1548. general &= ~IQS269_SYS_SETTINGS_ACK_RESET;
  1549. return general | IQS269_SYS_SETTINGS_DIS_AUTO;
  1550. }
  1551. static int iqs269_suspend(struct device *dev)
  1552. {
  1553. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1554. struct i2c_client *client = iqs269->client;
  1555. int error;
  1556. u16 general = iqs269_general_get(iqs269);
  1557. if (!(general & IQS269_SYS_SETTINGS_PWR_MODE_MASK))
  1558. return 0;
  1559. disable_irq(client->irq);
  1560. error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS, general);
  1561. iqs269_irq_wait();
  1562. enable_irq(client->irq);
  1563. return error;
  1564. }
  1565. static int iqs269_resume(struct device *dev)
  1566. {
  1567. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1568. struct i2c_client *client = iqs269->client;
  1569. int error;
  1570. u16 general = iqs269_general_get(iqs269);
  1571. if (!(general & IQS269_SYS_SETTINGS_PWR_MODE_MASK))
  1572. return 0;
  1573. disable_irq(client->irq);
  1574. error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS,
  1575. general & ~IQS269_SYS_SETTINGS_PWR_MODE_MASK);
  1576. if (!error)
  1577. error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS,
  1578. general & ~IQS269_SYS_SETTINGS_DIS_AUTO);
  1579. iqs269_irq_wait();
  1580. enable_irq(client->irq);
  1581. return error;
  1582. }
  1583. static DEFINE_SIMPLE_DEV_PM_OPS(iqs269_pm, iqs269_suspend, iqs269_resume);
  1584. static const struct of_device_id iqs269_of_match[] = {
  1585. {
  1586. .compatible = "azoteq,iqs269a",
  1587. .data = (void *)IQS269_OTP_OPTION_DEFAULT,
  1588. },
  1589. {
  1590. .compatible = "azoteq,iqs269a-00",
  1591. .data = (void *)IQS269_OTP_OPTION_DEFAULT,
  1592. },
  1593. {
  1594. .compatible = "azoteq,iqs269a-d0",
  1595. .data = (void *)IQS269_OTP_OPTION_TWS,
  1596. },
  1597. { }
  1598. };
  1599. MODULE_DEVICE_TABLE(of, iqs269_of_match);
  1600. static struct i2c_driver iqs269_i2c_driver = {
  1601. .driver = {
  1602. .name = "iqs269a",
  1603. .dev_groups = iqs269_groups,
  1604. .of_match_table = iqs269_of_match,
  1605. .pm = pm_sleep_ptr(&iqs269_pm),
  1606. },
  1607. .probe = iqs269_probe,
  1608. };
  1609. module_i2c_driver(iqs269_i2c_driver);
  1610. MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
  1611. MODULE_DESCRIPTION("Azoteq IQS269A Capacitive Touch Controller");
  1612. MODULE_LICENSE("GPL");