vgxy61.c 52 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for VGXY61 global shutter sensor family driver
  4. *
  5. * Copyright (C) 2022 STMicroelectronics SA
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/delay.h>
  9. #include <linux/gpio/consumer.h>
  10. #include <linux/i2c.h>
  11. #include <linux/iopoll.h>
  12. #include <linux/module.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/regmap.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/units.h>
  17. #include <linux/unaligned.h>
  18. #include <media/mipi-csi2.h>
  19. #include <media/v4l2-async.h>
  20. #include <media/v4l2-cci.h>
  21. #include <media/v4l2-ctrls.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-event.h>
  24. #include <media/v4l2-fwnode.h>
  25. #include <media/v4l2-subdev.h>
  26. #define VGXY61_REG_MODEL_ID CCI_REG16_LE(0x0000)
  27. #define VG5661_MODEL_ID 0x5661
  28. #define VG5761_MODEL_ID 0x5761
  29. #define VGXY61_REG_REVISION CCI_REG16_LE(0x0002)
  30. #define VGXY61_REG_FWPATCH_REVISION CCI_REG16_LE(0x0014)
  31. #define VGXY61_REG_FWPATCH_START_ADDR CCI_REG8(0x2000)
  32. #define VGXY61_REG_SYSTEM_FSM CCI_REG8(0x0020)
  33. #define VGXY61_SYSTEM_FSM_SW_STBY 0x03
  34. #define VGXY61_SYSTEM_FSM_STREAMING 0x04
  35. #define VGXY61_REG_NVM CCI_REG8(0x0023)
  36. #define VGXY61_NVM_OK 0x04
  37. #define VGXY61_REG_STBY CCI_REG8(0x0201)
  38. #define VGXY61_STBY_NO_REQ 0
  39. #define VGXY61_STBY_REQ_TMP_READ BIT(2)
  40. #define VGXY61_REG_STREAMING CCI_REG8(0x0202)
  41. #define VGXY61_STREAMING_NO_REQ 0
  42. #define VGXY61_STREAMING_REQ_STOP BIT(0)
  43. #define VGXY61_STREAMING_REQ_START BIT(1)
  44. #define VGXY61_REG_EXT_CLOCK CCI_REG32_LE(0x0220)
  45. #define VGXY61_REG_CLK_PLL_PREDIV CCI_REG8(0x0224)
  46. #define VGXY61_REG_CLK_SYS_PLL_MULT CCI_REG8(0x0225)
  47. #define VGXY61_REG_GPIO_0_CTRL CCI_REG8(0x0236)
  48. #define VGXY61_REG_GPIO_1_CTRL CCI_REG8(0x0237)
  49. #define VGXY61_REG_GPIO_2_CTRL CCI_REG8(0x0238)
  50. #define VGXY61_REG_GPIO_3_CTRL CCI_REG8(0x0239)
  51. #define VGXY61_REG_SIGNALS_POLARITY_CTRL CCI_REG8(0x023b)
  52. #define VGXY61_REG_LINE_LENGTH CCI_REG16_LE(0x0300)
  53. #define VGXY61_REG_ORIENTATION CCI_REG8(0x0302)
  54. #define VGXY61_REG_VT_CTRL CCI_REG8(0x0304)
  55. #define VGXY61_REG_FORMAT_CTRL CCI_REG8(0x0305)
  56. #define VGXY61_REG_OIF_CTRL CCI_REG16_LE(0x0306)
  57. #define VGXY61_REG_OIF_ROI0_CTRL CCI_REG8(0x030a)
  58. #define VGXY61_REG_ROI0_START_H CCI_REG16_LE(0x0400)
  59. #define VGXY61_REG_ROI0_START_V CCI_REG16_LE(0x0402)
  60. #define VGXY61_REG_ROI0_END_H CCI_REG16_LE(0x0404)
  61. #define VGXY61_REG_ROI0_END_V CCI_REG16_LE(0x0406)
  62. #define VGXY61_REG_PATGEN_CTRL CCI_REG32_LE(0x0440)
  63. #define VGXY61_PATGEN_LONG_ENABLE BIT(16)
  64. #define VGXY61_PATGEN_SHORT_ENABLE BIT(0)
  65. #define VGXY61_PATGEN_LONG_TYPE_SHIFT 18
  66. #define VGXY61_PATGEN_SHORT_TYPE_SHIFT 4
  67. #define VGXY61_REG_FRAME_CONTENT_CTRL CCI_REG8(0x0478)
  68. #define VGXY61_REG_COARSE_EXPOSURE_LONG CCI_REG16_LE(0x0500)
  69. #define VGXY61_REG_COARSE_EXPOSURE_SHORT CCI_REG16_LE(0x0504)
  70. #define VGXY61_REG_ANALOG_GAIN CCI_REG8(0x0508)
  71. #define VGXY61_REG_DIGITAL_GAIN_LONG CCI_REG16_LE(0x050a)
  72. #define VGXY61_REG_DIGITAL_GAIN_SHORT CCI_REG16_LE(0x0512)
  73. #define VGXY61_REG_FRAME_LENGTH CCI_REG16_LE(0x051a)
  74. #define VGXY61_REG_SIGNALS_CTRL CCI_REG16_LE(0x0522)
  75. #define VGXY61_SIGNALS_GPIO_ID_SHIFT 4
  76. #define VGXY61_REG_READOUT_CTRL CCI_REG8(0x0530)
  77. #define VGXY61_REG_HDR_CTRL CCI_REG8(0x0532)
  78. #define VGXY61_REG_PATGEN_LONG_DATA_GR CCI_REG16_LE(0x092c)
  79. #define VGXY61_REG_PATGEN_LONG_DATA_R CCI_REG16_LE(0x092e)
  80. #define VGXY61_REG_PATGEN_LONG_DATA_B CCI_REG16_LE(0x0930)
  81. #define VGXY61_REG_PATGEN_LONG_DATA_GB CCI_REG16_LE(0x0932)
  82. #define VGXY61_REG_PATGEN_SHORT_DATA_GR CCI_REG16_LE(0x0950)
  83. #define VGXY61_REG_PATGEN_SHORT_DATA_R CCI_REG16_LE(0x0952)
  84. #define VGXY61_REG_PATGEN_SHORT_DATA_B CCI_REG16_LE(0x0954)
  85. #define VGXY61_REG_PATGEN_SHORT_DATA_GB CCI_REG16_LE(0x0956)
  86. #define VGXY61_REG_BYPASS_CTRL CCI_REG8(0x0a60)
  87. #define VGX661_WIDTH 1464
  88. #define VGX661_HEIGHT 1104
  89. #define VGX761_WIDTH 1944
  90. #define VGX761_HEIGHT 1204
  91. #define VGX661_DEFAULT_MODE 1
  92. #define VGX761_DEFAULT_MODE 1
  93. #define VGX661_SHORT_ROT_TERM 93
  94. #define VGX761_SHORT_ROT_TERM 90
  95. #define VGXY61_EXPOS_ROT_TERM 66
  96. #define VGXY61_WRITE_MULTIPLE_CHUNK_MAX 16
  97. #define VGXY61_NB_GPIOS 4
  98. #define VGXY61_NB_POLARITIES 5
  99. #define VGXY61_FRAME_LENGTH_DEF 1313
  100. #define VGXY61_MIN_FRAME_LENGTH 1288
  101. #define VGXY61_MIN_EXPOSURE 10
  102. #define VGXY61_HDR_LINEAR_RATIO 10
  103. #define VGXY61_TIMEOUT_MS 500
  104. #define VGXY61_MEDIA_BUS_FMT_DEF MEDIA_BUS_FMT_Y8_1X8
  105. #define VGXY61_FWPATCH_REVISION_MAJOR 2
  106. #define VGXY61_FWPATCH_REVISION_MINOR 0
  107. #define VGXY61_FWPATCH_REVISION_MICRO 5
  108. static const u8 patch_array[] = {
  109. 0xbf, 0x00, 0x05, 0x20, 0x06, 0x01, 0xe0, 0xe0, 0x04, 0x80, 0xe6, 0x45,
  110. 0xed, 0x6f, 0xfe, 0xff, 0x14, 0x80, 0x1f, 0x84, 0x10, 0x42, 0x05, 0x7c,
  111. 0x01, 0xc4, 0x1e, 0x80, 0xb6, 0x42, 0x00, 0xe0, 0x1e, 0x82, 0x1e, 0xc0,
  112. 0x93, 0xdd, 0xc3, 0xc1, 0x0c, 0x04, 0x00, 0xfa, 0x86, 0x0d, 0x70, 0xe1,
  113. 0x04, 0x98, 0x15, 0x00, 0x28, 0xe0, 0x14, 0x02, 0x08, 0xfc, 0x15, 0x40,
  114. 0x28, 0xe0, 0x98, 0x58, 0xe0, 0xef, 0x04, 0x98, 0x0e, 0x04, 0x00, 0xf0,
  115. 0x15, 0x00, 0x28, 0xe0, 0x19, 0xc8, 0x15, 0x40, 0x28, 0xe0, 0xc6, 0x41,
  116. 0xfc, 0xe0, 0x14, 0x80, 0x1f, 0x84, 0x14, 0x02, 0xa0, 0xfc, 0x1e, 0x80,
  117. 0x14, 0x80, 0x14, 0x02, 0x80, 0xfb, 0x14, 0x02, 0xe0, 0xfc, 0x1e, 0x80,
  118. 0x14, 0xc0, 0x1f, 0x84, 0x14, 0x02, 0xa4, 0xfc, 0x1e, 0xc0, 0x14, 0xc0,
  119. 0x14, 0x02, 0x80, 0xfb, 0x14, 0x02, 0xe4, 0xfc, 0x1e, 0xc0, 0x0c, 0x0c,
  120. 0x00, 0xf2, 0x93, 0xdd, 0x86, 0x00, 0xf8, 0xe0, 0x04, 0x80, 0xc6, 0x03,
  121. 0x70, 0xe1, 0x0e, 0x84, 0x93, 0xdd, 0xc3, 0xc1, 0x0c, 0x04, 0x00, 0xfa,
  122. 0x6b, 0x80, 0x06, 0x40, 0x6c, 0xe1, 0x04, 0x80, 0x09, 0x00, 0xe0, 0xe0,
  123. 0x0b, 0xa1, 0x95, 0x84, 0x05, 0x0c, 0x1c, 0xe0, 0x86, 0x02, 0xf9, 0x60,
  124. 0xe0, 0xcf, 0x78, 0x6e, 0x80, 0xef, 0x25, 0x0c, 0x18, 0xe0, 0x05, 0x4c,
  125. 0x1c, 0xe0, 0x86, 0x02, 0xf9, 0x60, 0xe0, 0xcf, 0x0b, 0x84, 0xd8, 0x6d,
  126. 0x80, 0xef, 0x05, 0x4c, 0x18, 0xe0, 0x04, 0xd8, 0x0b, 0xa5, 0x95, 0x84,
  127. 0x05, 0x0c, 0x2c, 0xe0, 0x06, 0x02, 0x01, 0x60, 0xe0, 0xce, 0x18, 0x6d,
  128. 0x80, 0xef, 0x25, 0x0c, 0x30, 0xe0, 0x05, 0x4c, 0x2c, 0xe0, 0x06, 0x02,
  129. 0x01, 0x60, 0xe0, 0xce, 0x0b, 0x84, 0x78, 0x6c, 0x80, 0xef, 0x05, 0x4c,
  130. 0x30, 0xe0, 0x0c, 0x0c, 0x00, 0xf2, 0x93, 0xdd, 0x46, 0x01, 0x70, 0xe1,
  131. 0x08, 0x80, 0x0b, 0xa1, 0x08, 0x5c, 0x00, 0xda, 0x06, 0x01, 0x68, 0xe1,
  132. 0x04, 0x80, 0x4a, 0x40, 0x84, 0xe0, 0x08, 0x5c, 0x00, 0x9a, 0x06, 0x01,
  133. 0xe0, 0xe0, 0x04, 0x80, 0x15, 0x00, 0x60, 0xe0, 0x19, 0xc4, 0x15, 0x40,
  134. 0x60, 0xe0, 0x15, 0x00, 0x78, 0xe0, 0x19, 0xc4, 0x15, 0x40, 0x78, 0xe0,
  135. 0x93, 0xdd, 0xc3, 0xc1, 0x46, 0x01, 0x70, 0xe1, 0x08, 0x80, 0x0b, 0xa1,
  136. 0x08, 0x5c, 0x00, 0xda, 0x06, 0x01, 0x68, 0xe1, 0x04, 0x80, 0x4a, 0x40,
  137. 0x84, 0xe0, 0x08, 0x5c, 0x00, 0x9a, 0x06, 0x01, 0xe0, 0xe0, 0x14, 0x80,
  138. 0x25, 0x02, 0x54, 0xe0, 0x29, 0xc4, 0x25, 0x42, 0x54, 0xe0, 0x24, 0x80,
  139. 0x35, 0x04, 0x6c, 0xe0, 0x39, 0xc4, 0x35, 0x44, 0x6c, 0xe0, 0x25, 0x02,
  140. 0x64, 0xe0, 0x29, 0xc4, 0x25, 0x42, 0x64, 0xe0, 0x04, 0x80, 0x15, 0x00,
  141. 0x7c, 0xe0, 0x19, 0xc4, 0x15, 0x40, 0x7c, 0xe0, 0x93, 0xdd, 0xc3, 0xc1,
  142. 0x4c, 0x04, 0x7c, 0xfa, 0x86, 0x40, 0x98, 0xe0, 0x14, 0x80, 0x1b, 0xa1,
  143. 0x06, 0x00, 0x00, 0xc0, 0x08, 0x42, 0x38, 0xdc, 0x08, 0x64, 0xa0, 0xef,
  144. 0x86, 0x42, 0x3c, 0xe0, 0x68, 0x49, 0x80, 0xef, 0x6b, 0x80, 0x78, 0x53,
  145. 0xc8, 0xef, 0xc6, 0x54, 0x6c, 0xe1, 0x7b, 0x80, 0xb5, 0x14, 0x0c, 0xf8,
  146. 0x05, 0x14, 0x14, 0xf8, 0x1a, 0xac, 0x8a, 0x80, 0x0b, 0x90, 0x38, 0x55,
  147. 0x80, 0xef, 0x1a, 0xae, 0x17, 0xc2, 0x03, 0x82, 0x88, 0x65, 0x80, 0xef,
  148. 0x1b, 0x80, 0x0b, 0x8e, 0x68, 0x65, 0x80, 0xef, 0x9b, 0x80, 0x0b, 0x8c,
  149. 0x08, 0x65, 0x80, 0xef, 0x6b, 0x80, 0x0b, 0x92, 0x1b, 0x8c, 0x98, 0x64,
  150. 0x80, 0xef, 0x1a, 0xec, 0x9b, 0x80, 0x0b, 0x90, 0x95, 0x54, 0x10, 0xe0,
  151. 0xa8, 0x53, 0x80, 0xef, 0x1a, 0xee, 0x17, 0xc2, 0x03, 0x82, 0xf8, 0x63,
  152. 0x80, 0xef, 0x1b, 0x80, 0x0b, 0x8e, 0xd8, 0x63, 0x80, 0xef, 0x1b, 0x8c,
  153. 0x68, 0x63, 0x80, 0xef, 0x6b, 0x80, 0x0b, 0x92, 0x65, 0x54, 0x14, 0xe0,
  154. 0x08, 0x65, 0x84, 0xef, 0x68, 0x63, 0x80, 0xef, 0x7b, 0x80, 0x0b, 0x8c,
  155. 0xa8, 0x64, 0x84, 0xef, 0x08, 0x63, 0x80, 0xef, 0x14, 0xe8, 0x46, 0x44,
  156. 0x94, 0xe1, 0x24, 0x88, 0x4a, 0x4e, 0x04, 0xe0, 0x14, 0xea, 0x1a, 0x04,
  157. 0x08, 0xe0, 0x0a, 0x40, 0x84, 0xed, 0x0c, 0x04, 0x00, 0xe2, 0x4a, 0x40,
  158. 0x04, 0xe0, 0x19, 0x16, 0xc0, 0xe0, 0x0a, 0x40, 0x84, 0xed, 0x21, 0x54,
  159. 0x60, 0xe0, 0x0c, 0x04, 0x00, 0xe2, 0x1b, 0xa5, 0x0e, 0xea, 0x01, 0x89,
  160. 0x21, 0x54, 0x64, 0xe0, 0x7e, 0xe8, 0x65, 0x82, 0x1b, 0xa7, 0x26, 0x00,
  161. 0x00, 0x80, 0xa5, 0x82, 0x1b, 0xa9, 0x65, 0x82, 0x1b, 0xa3, 0x01, 0x85,
  162. 0x16, 0x00, 0x00, 0xc0, 0x01, 0x54, 0x04, 0xf8, 0x06, 0xaa, 0x01, 0x83,
  163. 0x06, 0xa8, 0x65, 0x81, 0x06, 0xa8, 0x01, 0x54, 0x04, 0xf8, 0x01, 0x83,
  164. 0x06, 0xaa, 0x09, 0x14, 0x18, 0xf8, 0x0b, 0xa1, 0x05, 0x84, 0xc6, 0x42,
  165. 0xd4, 0xe0, 0x14, 0x84, 0x01, 0x83, 0x01, 0x54, 0x60, 0xe0, 0x01, 0x54,
  166. 0x64, 0xe0, 0x0b, 0x02, 0x90, 0xe0, 0x10, 0x02, 0x90, 0xe5, 0x01, 0x54,
  167. 0x88, 0xe0, 0xb5, 0x81, 0xc6, 0x40, 0xd4, 0xe0, 0x14, 0x80, 0x0b, 0x02,
  168. 0xe0, 0xe4, 0x10, 0x02, 0x31, 0x66, 0x02, 0xc0, 0x01, 0x54, 0x88, 0xe0,
  169. 0x1a, 0x84, 0x29, 0x14, 0x10, 0xe0, 0x1c, 0xaa, 0x2b, 0xa1, 0xf5, 0x82,
  170. 0x25, 0x14, 0x10, 0xf8, 0x2b, 0x04, 0xa8, 0xe0, 0x20, 0x44, 0x0d, 0x70,
  171. 0x03, 0xc0, 0x2b, 0xa1, 0x04, 0x00, 0x80, 0x9a, 0x02, 0x40, 0x84, 0x90,
  172. 0x03, 0x54, 0x04, 0x80, 0x4c, 0x0c, 0x7c, 0xf2, 0x93, 0xdd, 0x00, 0x00,
  173. 0x02, 0xa9, 0x00, 0x00, 0x64, 0x4a, 0x40, 0x00, 0x08, 0x2d, 0x58, 0xe0,
  174. 0xa8, 0x98, 0x40, 0x00, 0x28, 0x07, 0x34, 0xe0, 0x05, 0xb9, 0x00, 0x00,
  175. 0x28, 0x00, 0x41, 0x05, 0x88, 0x00, 0x41, 0x3c, 0x98, 0x00, 0x41, 0x52,
  176. 0x04, 0x01, 0x41, 0x79, 0x3c, 0x01, 0x41, 0x6a, 0x3d, 0xfe, 0x00, 0x00,
  177. };
  178. static const char * const vgxy61_test_pattern_menu[] = {
  179. "Disabled",
  180. "Solid",
  181. "Colorbar",
  182. "Gradbar",
  183. "Hgrey",
  184. "Vgrey",
  185. "Dgrey",
  186. "PN28",
  187. };
  188. static const char * const vgxy61_hdr_mode_menu[] = {
  189. "HDR linearize",
  190. "HDR substraction",
  191. "No HDR",
  192. };
  193. static const char * const vgxy61_supply_name[] = {
  194. "VCORE",
  195. "VDDIO",
  196. "VANA",
  197. };
  198. static const s64 link_freq[] = {
  199. /*
  200. * MIPI output freq is 804Mhz / 2, as it uses both rising edge and
  201. * falling edges to send data
  202. */
  203. 402000000ULL
  204. };
  205. enum vgxy61_bin_mode {
  206. VGXY61_BIN_MODE_NORMAL,
  207. VGXY61_BIN_MODE_DIGITAL_X2,
  208. VGXY61_BIN_MODE_DIGITAL_X4,
  209. };
  210. enum vgxy61_hdr_mode {
  211. VGXY61_HDR_LINEAR,
  212. VGXY61_HDR_SUB,
  213. VGXY61_NO_HDR,
  214. };
  215. enum vgxy61_strobe_mode {
  216. VGXY61_STROBE_DISABLED,
  217. VGXY61_STROBE_LONG,
  218. VGXY61_STROBE_ENABLED,
  219. };
  220. struct vgxy61_mode_info {
  221. u32 width;
  222. u32 height;
  223. enum vgxy61_bin_mode bin_mode;
  224. struct v4l2_rect crop;
  225. };
  226. struct vgxy61_fmt_desc {
  227. u32 code;
  228. u8 bpp;
  229. u8 data_type;
  230. };
  231. static const struct vgxy61_fmt_desc vgxy61_supported_codes[] = {
  232. {
  233. .code = MEDIA_BUS_FMT_Y8_1X8,
  234. .bpp = 8,
  235. .data_type = MIPI_CSI2_DT_RAW8,
  236. },
  237. {
  238. .code = MEDIA_BUS_FMT_Y10_1X10,
  239. .bpp = 10,
  240. .data_type = MIPI_CSI2_DT_RAW10,
  241. },
  242. {
  243. .code = MEDIA_BUS_FMT_Y12_1X12,
  244. .bpp = 12,
  245. .data_type = MIPI_CSI2_DT_RAW12,
  246. },
  247. {
  248. .code = MEDIA_BUS_FMT_Y14_1X14,
  249. .bpp = 14,
  250. .data_type = MIPI_CSI2_DT_RAW14,
  251. },
  252. {
  253. .code = MEDIA_BUS_FMT_Y16_1X16,
  254. .bpp = 16,
  255. .data_type = MIPI_CSI2_DT_RAW16,
  256. },
  257. };
  258. static const struct vgxy61_mode_info vgx661_mode_data[] = {
  259. {
  260. .width = VGX661_WIDTH,
  261. .height = VGX661_HEIGHT,
  262. .bin_mode = VGXY61_BIN_MODE_NORMAL,
  263. .crop = {
  264. .left = 0,
  265. .top = 0,
  266. .width = VGX661_WIDTH,
  267. .height = VGX661_HEIGHT,
  268. },
  269. },
  270. {
  271. .width = 1280,
  272. .height = 720,
  273. .bin_mode = VGXY61_BIN_MODE_NORMAL,
  274. .crop = {
  275. .left = 92,
  276. .top = 192,
  277. .width = 1280,
  278. .height = 720,
  279. },
  280. },
  281. {
  282. .width = 640,
  283. .height = 480,
  284. .bin_mode = VGXY61_BIN_MODE_DIGITAL_X2,
  285. .crop = {
  286. .left = 92,
  287. .top = 72,
  288. .width = 1280,
  289. .height = 960,
  290. },
  291. },
  292. {
  293. .width = 320,
  294. .height = 240,
  295. .bin_mode = VGXY61_BIN_MODE_DIGITAL_X4,
  296. .crop = {
  297. .left = 92,
  298. .top = 72,
  299. .width = 1280,
  300. .height = 960,
  301. },
  302. },
  303. };
  304. static const struct vgxy61_mode_info vgx761_mode_data[] = {
  305. {
  306. .width = VGX761_WIDTH,
  307. .height = VGX761_HEIGHT,
  308. .bin_mode = VGXY61_BIN_MODE_NORMAL,
  309. .crop = {
  310. .left = 0,
  311. .top = 0,
  312. .width = VGX761_WIDTH,
  313. .height = VGX761_HEIGHT,
  314. },
  315. },
  316. {
  317. .width = 1920,
  318. .height = 1080,
  319. .bin_mode = VGXY61_BIN_MODE_NORMAL,
  320. .crop = {
  321. .left = 12,
  322. .top = 62,
  323. .width = 1920,
  324. .height = 1080,
  325. },
  326. },
  327. {
  328. .width = 1280,
  329. .height = 720,
  330. .bin_mode = VGXY61_BIN_MODE_NORMAL,
  331. .crop = {
  332. .left = 332,
  333. .top = 242,
  334. .width = 1280,
  335. .height = 720,
  336. },
  337. },
  338. {
  339. .width = 640,
  340. .height = 480,
  341. .bin_mode = VGXY61_BIN_MODE_DIGITAL_X2,
  342. .crop = {
  343. .left = 332,
  344. .top = 122,
  345. .width = 1280,
  346. .height = 960,
  347. },
  348. },
  349. {
  350. .width = 320,
  351. .height = 240,
  352. .bin_mode = VGXY61_BIN_MODE_DIGITAL_X4,
  353. .crop = {
  354. .left = 332,
  355. .top = 122,
  356. .width = 1280,
  357. .height = 960,
  358. },
  359. },
  360. };
  361. struct vgxy61_dev {
  362. struct i2c_client *i2c_client;
  363. struct regmap *regmap;
  364. struct v4l2_subdev sd;
  365. struct media_pad pad;
  366. struct regulator_bulk_data supplies[ARRAY_SIZE(vgxy61_supply_name)];
  367. struct gpio_desc *reset_gpio;
  368. struct clk *xclk;
  369. u32 clk_freq;
  370. u16 id;
  371. u16 sensor_width;
  372. u16 sensor_height;
  373. u16 oif_ctrl;
  374. unsigned int nb_of_lane;
  375. u32 data_rate_in_mbps;
  376. u32 pclk;
  377. u16 line_length;
  378. u16 rot_term;
  379. bool gpios_polarity;
  380. /* Lock to protect all members below */
  381. struct mutex lock;
  382. struct v4l2_ctrl_handler ctrl_handler;
  383. struct v4l2_ctrl *pixel_rate_ctrl;
  384. struct v4l2_ctrl *expo_ctrl;
  385. struct v4l2_ctrl *vblank_ctrl;
  386. struct v4l2_ctrl *vflip_ctrl;
  387. struct v4l2_ctrl *hflip_ctrl;
  388. bool streaming;
  389. struct v4l2_mbus_framefmt fmt;
  390. const struct vgxy61_mode_info *sensor_modes;
  391. unsigned int sensor_modes_nb;
  392. const struct vgxy61_mode_info *default_mode;
  393. const struct vgxy61_mode_info *current_mode;
  394. bool hflip;
  395. bool vflip;
  396. enum vgxy61_hdr_mode hdr;
  397. u16 expo_long;
  398. u16 expo_short;
  399. u16 expo_max;
  400. u16 expo_min;
  401. u16 vblank;
  402. u16 vblank_min;
  403. u16 frame_length;
  404. u16 digital_gain;
  405. u8 analog_gain;
  406. enum vgxy61_strobe_mode strobe_mode;
  407. u32 pattern;
  408. };
  409. static u8 get_bpp_by_code(__u32 code)
  410. {
  411. unsigned int i;
  412. for (i = 0; i < ARRAY_SIZE(vgxy61_supported_codes); i++) {
  413. if (vgxy61_supported_codes[i].code == code)
  414. return vgxy61_supported_codes[i].bpp;
  415. }
  416. /* Should never happen */
  417. WARN(1, "Unsupported code %d. default to 8 bpp", code);
  418. return 8;
  419. }
  420. static u8 get_data_type_by_code(__u32 code)
  421. {
  422. unsigned int i;
  423. for (i = 0; i < ARRAY_SIZE(vgxy61_supported_codes); i++) {
  424. if (vgxy61_supported_codes[i].code == code)
  425. return vgxy61_supported_codes[i].data_type;
  426. }
  427. /* Should never happen */
  428. WARN(1, "Unsupported code %d. default to MIPI_CSI2_DT_RAW8 data type",
  429. code);
  430. return MIPI_CSI2_DT_RAW8;
  431. }
  432. static void compute_pll_parameters_by_freq(u32 freq, u8 *prediv, u8 *mult)
  433. {
  434. const unsigned int predivs[] = {1, 2, 4};
  435. unsigned int i;
  436. /*
  437. * Freq range is [6Mhz-27Mhz] already checked.
  438. * Output of divider should be in [6Mhz-12Mhz[.
  439. */
  440. for (i = 0; i < ARRAY_SIZE(predivs); i++) {
  441. *prediv = predivs[i];
  442. if (freq / *prediv < 12 * HZ_PER_MHZ)
  443. break;
  444. }
  445. WARN_ON(i == ARRAY_SIZE(predivs));
  446. /*
  447. * Target freq is 804Mhz. Don't change this as it will impact image
  448. * quality.
  449. */
  450. *mult = ((804 * HZ_PER_MHZ) * (*prediv) + freq / 2) / freq;
  451. }
  452. static s32 get_pixel_rate(struct vgxy61_dev *sensor)
  453. {
  454. return div64_u64((u64)sensor->data_rate_in_mbps * sensor->nb_of_lane,
  455. get_bpp_by_code(sensor->fmt.code));
  456. }
  457. static inline struct vgxy61_dev *to_vgxy61_dev(struct v4l2_subdev *sd)
  458. {
  459. return container_of(sd, struct vgxy61_dev, sd);
  460. }
  461. static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
  462. {
  463. return &container_of(ctrl->handler, struct vgxy61_dev,
  464. ctrl_handler)->sd;
  465. }
  466. static unsigned int get_chunk_size(struct vgxy61_dev *sensor)
  467. {
  468. struct i2c_adapter *adapter = sensor->i2c_client->adapter;
  469. int max_write_len = VGXY61_WRITE_MULTIPLE_CHUNK_MAX;
  470. if (adapter->quirks && adapter->quirks->max_write_len)
  471. max_write_len = adapter->quirks->max_write_len - 2;
  472. max_write_len = min(max_write_len, VGXY61_WRITE_MULTIPLE_CHUNK_MAX);
  473. return max(max_write_len, 1);
  474. }
  475. static int vgxy61_write_array(struct vgxy61_dev *sensor, u32 reg,
  476. unsigned int nb, const u8 *array)
  477. {
  478. const unsigned int chunk_size = get_chunk_size(sensor);
  479. int ret;
  480. unsigned int sz;
  481. while (nb) {
  482. sz = min(nb, chunk_size);
  483. ret = regmap_bulk_write(sensor->regmap, CCI_REG_ADDR(reg),
  484. array, sz);
  485. if (ret < 0)
  486. return ret;
  487. nb -= sz;
  488. reg += sz;
  489. array += sz;
  490. }
  491. return 0;
  492. }
  493. static int vgxy61_poll_reg(struct vgxy61_dev *sensor, u32 reg, u8 poll_val,
  494. unsigned int timeout_ms)
  495. {
  496. const unsigned int loop_delay_ms = 10;
  497. u64 val;
  498. int ret;
  499. return read_poll_timeout(cci_read, ret,
  500. ((ret < 0) || (val == poll_val)),
  501. loop_delay_ms * 1000, timeout_ms * 1000,
  502. false, sensor->regmap, reg, &val, NULL);
  503. }
  504. static int vgxy61_wait_state(struct vgxy61_dev *sensor, int state,
  505. unsigned int timeout_ms)
  506. {
  507. return vgxy61_poll_reg(sensor, VGXY61_REG_SYSTEM_FSM, state,
  508. timeout_ms);
  509. }
  510. static int vgxy61_check_bw(struct vgxy61_dev *sensor)
  511. {
  512. /*
  513. * Simplification of time needed to send short packets and for the MIPI
  514. * to add transition times (EoT, LPS, and SoT packet delimiters) needed
  515. * by the protocol to go in low power between 2 packets of data. This
  516. * is a mipi IP constant for the sensor.
  517. */
  518. const unsigned int mipi_margin = 1056;
  519. unsigned int binning_scale = sensor->current_mode->crop.height /
  520. sensor->current_mode->height;
  521. u8 bpp = get_bpp_by_code(sensor->fmt.code);
  522. unsigned int max_bit_per_line;
  523. unsigned int bit_per_line;
  524. u64 line_rate;
  525. line_rate = sensor->nb_of_lane * (u64)sensor->data_rate_in_mbps *
  526. sensor->line_length;
  527. max_bit_per_line = div64_u64(line_rate, sensor->pclk) - mipi_margin;
  528. bit_per_line = (bpp * sensor->current_mode->width) / binning_scale;
  529. return bit_per_line > max_bit_per_line ? -EINVAL : 0;
  530. }
  531. static int vgxy61_apply_exposure(struct vgxy61_dev *sensor)
  532. {
  533. int ret = 0;
  534. /* We first set expo to zero to avoid forbidden parameters couple */
  535. cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_SHORT, 0, &ret);
  536. cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_LONG,
  537. sensor->expo_long, &ret);
  538. cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_SHORT,
  539. sensor->expo_short, &ret);
  540. return ret;
  541. }
  542. static int vgxy61_get_regulators(struct vgxy61_dev *sensor)
  543. {
  544. unsigned int i;
  545. for (i = 0; i < ARRAY_SIZE(vgxy61_supply_name); i++)
  546. sensor->supplies[i].supply = vgxy61_supply_name[i];
  547. return devm_regulator_bulk_get(&sensor->i2c_client->dev,
  548. ARRAY_SIZE(vgxy61_supply_name),
  549. sensor->supplies);
  550. }
  551. static int vgxy61_apply_reset(struct vgxy61_dev *sensor)
  552. {
  553. gpiod_set_value_cansleep(sensor->reset_gpio, 0);
  554. usleep_range(5000, 10000);
  555. gpiod_set_value_cansleep(sensor->reset_gpio, 1);
  556. usleep_range(5000, 10000);
  557. gpiod_set_value_cansleep(sensor->reset_gpio, 0);
  558. usleep_range(40000, 100000);
  559. return vgxy61_wait_state(sensor, VGXY61_SYSTEM_FSM_SW_STBY,
  560. VGXY61_TIMEOUT_MS);
  561. }
  562. static void vgxy61_fill_framefmt(struct vgxy61_dev *sensor,
  563. const struct vgxy61_mode_info *mode,
  564. struct v4l2_mbus_framefmt *fmt, u32 code)
  565. {
  566. fmt->code = code;
  567. fmt->width = mode->width;
  568. fmt->height = mode->height;
  569. fmt->colorspace = V4L2_COLORSPACE_RAW;
  570. fmt->field = V4L2_FIELD_NONE;
  571. fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
  572. fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
  573. fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
  574. }
  575. static int vgxy61_try_fmt_internal(struct v4l2_subdev *sd,
  576. struct v4l2_mbus_framefmt *fmt,
  577. const struct vgxy61_mode_info **new_mode)
  578. {
  579. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  580. const struct vgxy61_mode_info *mode;
  581. unsigned int index;
  582. for (index = 0; index < ARRAY_SIZE(vgxy61_supported_codes); index++) {
  583. if (vgxy61_supported_codes[index].code == fmt->code)
  584. break;
  585. }
  586. if (index == ARRAY_SIZE(vgxy61_supported_codes))
  587. index = 0;
  588. mode = v4l2_find_nearest_size(sensor->sensor_modes,
  589. sensor->sensor_modes_nb, width, height,
  590. fmt->width, fmt->height);
  591. if (new_mode)
  592. *new_mode = mode;
  593. vgxy61_fill_framefmt(sensor, mode, fmt,
  594. vgxy61_supported_codes[index].code);
  595. return 0;
  596. }
  597. static int vgxy61_get_selection(struct v4l2_subdev *sd,
  598. struct v4l2_subdev_state *sd_state,
  599. struct v4l2_subdev_selection *sel)
  600. {
  601. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  602. switch (sel->target) {
  603. case V4L2_SEL_TGT_CROP:
  604. sel->r = sensor->current_mode->crop;
  605. return 0;
  606. case V4L2_SEL_TGT_NATIVE_SIZE:
  607. case V4L2_SEL_TGT_CROP_DEFAULT:
  608. case V4L2_SEL_TGT_CROP_BOUNDS:
  609. sel->r.top = 0;
  610. sel->r.left = 0;
  611. sel->r.width = sensor->sensor_width;
  612. sel->r.height = sensor->sensor_height;
  613. return 0;
  614. }
  615. return -EINVAL;
  616. }
  617. static int vgxy61_enum_mbus_code(struct v4l2_subdev *sd,
  618. struct v4l2_subdev_state *sd_state,
  619. struct v4l2_subdev_mbus_code_enum *code)
  620. {
  621. if (code->index >= ARRAY_SIZE(vgxy61_supported_codes))
  622. return -EINVAL;
  623. code->code = vgxy61_supported_codes[code->index].code;
  624. return 0;
  625. }
  626. static int vgxy61_get_fmt(struct v4l2_subdev *sd,
  627. struct v4l2_subdev_state *sd_state,
  628. struct v4l2_subdev_format *format)
  629. {
  630. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  631. struct v4l2_mbus_framefmt *fmt;
  632. mutex_lock(&sensor->lock);
  633. if (format->which == V4L2_SUBDEV_FORMAT_TRY)
  634. fmt = v4l2_subdev_state_get_format(sd_state, format->pad);
  635. else
  636. fmt = &sensor->fmt;
  637. format->format = *fmt;
  638. mutex_unlock(&sensor->lock);
  639. return 0;
  640. }
  641. static u16 vgxy61_get_vblank_min(struct vgxy61_dev *sensor,
  642. enum vgxy61_hdr_mode hdr)
  643. {
  644. u16 min_vblank = VGXY61_MIN_FRAME_LENGTH -
  645. sensor->current_mode->crop.height;
  646. /* Ensure the first rule of thumb can't be negative */
  647. u16 min_vblank_hdr = VGXY61_MIN_EXPOSURE + sensor->rot_term + 1;
  648. if (hdr != VGXY61_NO_HDR)
  649. return max(min_vblank, min_vblank_hdr);
  650. return min_vblank;
  651. }
  652. static int vgxy61_enum_frame_size(struct v4l2_subdev *sd,
  653. struct v4l2_subdev_state *sd_state,
  654. struct v4l2_subdev_frame_size_enum *fse)
  655. {
  656. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  657. if (fse->index >= sensor->sensor_modes_nb)
  658. return -EINVAL;
  659. fse->min_width = sensor->sensor_modes[fse->index].width;
  660. fse->max_width = fse->min_width;
  661. fse->min_height = sensor->sensor_modes[fse->index].height;
  662. fse->max_height = fse->min_height;
  663. return 0;
  664. }
  665. static int vgxy61_update_analog_gain(struct vgxy61_dev *sensor, u32 target)
  666. {
  667. sensor->analog_gain = target;
  668. if (sensor->streaming)
  669. return cci_write(sensor->regmap, VGXY61_REG_ANALOG_GAIN, target,
  670. NULL);
  671. return 0;
  672. }
  673. static int vgxy61_apply_digital_gain(struct vgxy61_dev *sensor,
  674. u32 digital_gain)
  675. {
  676. int ret = 0;
  677. /*
  678. * For a monochrome version, configuring DIGITAL_GAIN_LONG_CH0 and
  679. * DIGITAL_GAIN_SHORT_CH0 is enough to configure the gain of all
  680. * four sub pixels.
  681. */
  682. cci_write(sensor->regmap, VGXY61_REG_DIGITAL_GAIN_LONG, digital_gain,
  683. &ret);
  684. cci_write(sensor->regmap, VGXY61_REG_DIGITAL_GAIN_SHORT, digital_gain,
  685. &ret);
  686. return ret;
  687. }
  688. static int vgxy61_update_digital_gain(struct vgxy61_dev *sensor, u32 target)
  689. {
  690. sensor->digital_gain = target;
  691. if (sensor->streaming)
  692. return vgxy61_apply_digital_gain(sensor, sensor->digital_gain);
  693. return 0;
  694. }
  695. static int vgxy61_apply_patgen(struct vgxy61_dev *sensor, u32 index)
  696. {
  697. static const u8 index2val[] = {
  698. 0x0, 0x1, 0x2, 0x3, 0x10, 0x11, 0x12, 0x13
  699. };
  700. u32 pattern = index2val[index];
  701. u32 reg = (pattern << VGXY61_PATGEN_LONG_TYPE_SHIFT) |
  702. (pattern << VGXY61_PATGEN_SHORT_TYPE_SHIFT);
  703. if (pattern)
  704. reg |= VGXY61_PATGEN_LONG_ENABLE | VGXY61_PATGEN_SHORT_ENABLE;
  705. return cci_write(sensor->regmap, VGXY61_REG_PATGEN_CTRL, reg, NULL);
  706. }
  707. static int vgxy61_update_patgen(struct vgxy61_dev *sensor, u32 pattern)
  708. {
  709. sensor->pattern = pattern;
  710. if (sensor->streaming)
  711. return vgxy61_apply_patgen(sensor, sensor->pattern);
  712. return 0;
  713. }
  714. static int vgxy61_apply_gpiox_strobe_mode(struct vgxy61_dev *sensor,
  715. enum vgxy61_strobe_mode mode,
  716. unsigned int idx)
  717. {
  718. static const u8 index2val[] = {0x0, 0x1, 0x3};
  719. u16 mask, val;
  720. mask = 0xf << (idx * VGXY61_SIGNALS_GPIO_ID_SHIFT);
  721. val = index2val[mode] << (idx * VGXY61_SIGNALS_GPIO_ID_SHIFT);
  722. return cci_update_bits(sensor->regmap, VGXY61_REG_SIGNALS_CTRL,
  723. mask, val, NULL);
  724. }
  725. static int vgxy61_update_gpios_strobe_mode(struct vgxy61_dev *sensor,
  726. enum vgxy61_hdr_mode hdr)
  727. {
  728. unsigned int i;
  729. int ret;
  730. switch (hdr) {
  731. case VGXY61_HDR_LINEAR:
  732. sensor->strobe_mode = VGXY61_STROBE_ENABLED;
  733. break;
  734. case VGXY61_HDR_SUB:
  735. case VGXY61_NO_HDR:
  736. sensor->strobe_mode = VGXY61_STROBE_LONG;
  737. break;
  738. default:
  739. /* Should never happen */
  740. WARN_ON(true);
  741. break;
  742. }
  743. if (!sensor->streaming)
  744. return 0;
  745. for (i = 0; i < VGXY61_NB_GPIOS; i++) {
  746. ret = vgxy61_apply_gpiox_strobe_mode(sensor,
  747. sensor->strobe_mode,
  748. i);
  749. if (ret)
  750. return ret;
  751. }
  752. return 0;
  753. }
  754. static int vgxy61_update_gpios_strobe_polarity(struct vgxy61_dev *sensor,
  755. bool polarity)
  756. {
  757. int ret = 0;
  758. if (sensor->streaming)
  759. return -EBUSY;
  760. cci_write(sensor->regmap, VGXY61_REG_GPIO_0_CTRL, polarity << 1, &ret);
  761. cci_write(sensor->regmap, VGXY61_REG_GPIO_1_CTRL, polarity << 1, &ret);
  762. cci_write(sensor->regmap, VGXY61_REG_GPIO_2_CTRL, polarity << 1, &ret);
  763. cci_write(sensor->regmap, VGXY61_REG_GPIO_3_CTRL, polarity << 1, &ret);
  764. cci_write(sensor->regmap, VGXY61_REG_SIGNALS_POLARITY_CTRL, polarity,
  765. &ret);
  766. return ret;
  767. }
  768. static u32 vgxy61_get_expo_long_max(struct vgxy61_dev *sensor,
  769. unsigned int short_expo_ratio)
  770. {
  771. u32 first_rot_max_expo, second_rot_max_expo, third_rot_max_expo;
  772. /* Apply sensor's rules of thumb */
  773. /*
  774. * Short exposure + height must be less than frame length to avoid bad
  775. * pixel line at the botom of the image
  776. */
  777. first_rot_max_expo =
  778. ((sensor->frame_length - sensor->current_mode->crop.height -
  779. sensor->rot_term) * short_expo_ratio) - 1;
  780. /*
  781. * Total exposition time must be less than frame length to avoid sensor
  782. * crash
  783. */
  784. second_rot_max_expo =
  785. (((sensor->frame_length - VGXY61_EXPOS_ROT_TERM) *
  786. short_expo_ratio) / (short_expo_ratio + 1)) - 1;
  787. /*
  788. * Short exposure times 71 must be less than frame length to avoid
  789. * sensor crash
  790. */
  791. third_rot_max_expo = (sensor->frame_length / 71) * short_expo_ratio;
  792. /* Take the minimum from all rules */
  793. return min(min(first_rot_max_expo, second_rot_max_expo),
  794. third_rot_max_expo);
  795. }
  796. static int vgxy61_update_exposure(struct vgxy61_dev *sensor, u16 new_expo_long,
  797. enum vgxy61_hdr_mode hdr)
  798. {
  799. struct i2c_client *client = sensor->i2c_client;
  800. u16 new_expo_short = 0;
  801. u16 expo_short_max = 0;
  802. u16 expo_long_min = VGXY61_MIN_EXPOSURE;
  803. u16 expo_long_max = 0;
  804. /* Compute short exposure according to hdr mode and long exposure */
  805. switch (hdr) {
  806. case VGXY61_HDR_LINEAR:
  807. /*
  808. * Take ratio into account for minimal exposures in
  809. * VGXY61_HDR_LINEAR
  810. */
  811. expo_long_min = VGXY61_MIN_EXPOSURE * VGXY61_HDR_LINEAR_RATIO;
  812. new_expo_long = max(expo_long_min, new_expo_long);
  813. expo_long_max =
  814. vgxy61_get_expo_long_max(sensor,
  815. VGXY61_HDR_LINEAR_RATIO);
  816. expo_short_max = (expo_long_max +
  817. (VGXY61_HDR_LINEAR_RATIO / 2)) /
  818. VGXY61_HDR_LINEAR_RATIO;
  819. new_expo_short = (new_expo_long +
  820. (VGXY61_HDR_LINEAR_RATIO / 2)) /
  821. VGXY61_HDR_LINEAR_RATIO;
  822. break;
  823. case VGXY61_HDR_SUB:
  824. new_expo_long = max(expo_long_min, new_expo_long);
  825. expo_long_max = vgxy61_get_expo_long_max(sensor, 1);
  826. /* Short and long are the same in VGXY61_HDR_SUB */
  827. expo_short_max = expo_long_max;
  828. new_expo_short = new_expo_long;
  829. break;
  830. case VGXY61_NO_HDR:
  831. new_expo_long = max(expo_long_min, new_expo_long);
  832. /*
  833. * As short expo is 0 here, only the second rule of thumb
  834. * applies, see vgxy61_get_expo_long_max for more
  835. */
  836. expo_long_max = sensor->frame_length - VGXY61_EXPOS_ROT_TERM;
  837. break;
  838. default:
  839. /* Should never happen */
  840. WARN_ON(true);
  841. break;
  842. }
  843. /* If this happens, something is wrong with formulas */
  844. WARN_ON(expo_long_min > expo_long_max);
  845. if (new_expo_long > expo_long_max) {
  846. dev_warn(&client->dev, "Exposure %d too high, clamping to %d\n",
  847. new_expo_long, expo_long_max);
  848. new_expo_long = expo_long_max;
  849. new_expo_short = expo_short_max;
  850. }
  851. sensor->expo_long = new_expo_long;
  852. sensor->expo_short = new_expo_short;
  853. sensor->expo_max = expo_long_max;
  854. sensor->expo_min = expo_long_min;
  855. if (sensor->streaming)
  856. return vgxy61_apply_exposure(sensor);
  857. return 0;
  858. }
  859. static int vgxy61_apply_framelength(struct vgxy61_dev *sensor)
  860. {
  861. return cci_write(sensor->regmap, VGXY61_REG_FRAME_LENGTH,
  862. sensor->frame_length, NULL);
  863. }
  864. static int vgxy61_update_vblank(struct vgxy61_dev *sensor, u16 vblank,
  865. enum vgxy61_hdr_mode hdr)
  866. {
  867. int ret;
  868. sensor->vblank_min = vgxy61_get_vblank_min(sensor, hdr);
  869. sensor->vblank = max(sensor->vblank_min, vblank);
  870. sensor->frame_length = sensor->current_mode->crop.height +
  871. sensor->vblank;
  872. /* Update exposure according to vblank */
  873. ret = vgxy61_update_exposure(sensor, sensor->expo_long, hdr);
  874. if (ret)
  875. return ret;
  876. if (sensor->streaming)
  877. return vgxy61_apply_framelength(sensor);
  878. return 0;
  879. }
  880. static int vgxy61_apply_hdr(struct vgxy61_dev *sensor,
  881. enum vgxy61_hdr_mode index)
  882. {
  883. static const u8 index2val[] = {0x1, 0x4, 0xa};
  884. return cci_write(sensor->regmap, VGXY61_REG_HDR_CTRL, index2val[index],
  885. NULL);
  886. }
  887. static int vgxy61_update_hdr(struct vgxy61_dev *sensor,
  888. enum vgxy61_hdr_mode index)
  889. {
  890. int ret;
  891. /*
  892. * vblank and short exposure change according to HDR mode, do it first
  893. * as it can violate sensors 'rule of thumbs' and therefore will require
  894. * to change the long exposure.
  895. */
  896. ret = vgxy61_update_vblank(sensor, sensor->vblank, index);
  897. if (ret)
  898. return ret;
  899. /* Update strobe mode according to HDR */
  900. ret = vgxy61_update_gpios_strobe_mode(sensor, index);
  901. if (ret)
  902. return ret;
  903. sensor->hdr = index;
  904. if (sensor->streaming)
  905. return vgxy61_apply_hdr(sensor, sensor->hdr);
  906. return 0;
  907. }
  908. static int vgxy61_apply_settings(struct vgxy61_dev *sensor)
  909. {
  910. int ret;
  911. unsigned int i;
  912. ret = vgxy61_apply_hdr(sensor, sensor->hdr);
  913. if (ret)
  914. return ret;
  915. ret = vgxy61_apply_framelength(sensor);
  916. if (ret)
  917. return ret;
  918. ret = vgxy61_apply_exposure(sensor);
  919. if (ret)
  920. return ret;
  921. ret = cci_write(sensor->regmap, VGXY61_REG_ANALOG_GAIN,
  922. sensor->analog_gain, NULL);
  923. if (ret)
  924. return ret;
  925. ret = vgxy61_apply_digital_gain(sensor, sensor->digital_gain);
  926. if (ret)
  927. return ret;
  928. ret = cci_write(sensor->regmap, VGXY61_REG_ORIENTATION,
  929. sensor->hflip | (sensor->vflip << 1), NULL);
  930. if (ret)
  931. return ret;
  932. ret = vgxy61_apply_patgen(sensor, sensor->pattern);
  933. if (ret)
  934. return ret;
  935. for (i = 0; i < VGXY61_NB_GPIOS; i++) {
  936. ret = vgxy61_apply_gpiox_strobe_mode(sensor,
  937. sensor->strobe_mode, i);
  938. if (ret)
  939. return ret;
  940. }
  941. return 0;
  942. }
  943. static int vgxy61_stream_enable(struct vgxy61_dev *sensor)
  944. {
  945. struct i2c_client *client = v4l2_get_subdevdata(&sensor->sd);
  946. const struct v4l2_rect *crop = &sensor->current_mode->crop;
  947. int ret = 0;
  948. ret = vgxy61_check_bw(sensor);
  949. if (ret)
  950. return ret;
  951. ret = pm_runtime_resume_and_get(&client->dev);
  952. if (ret)
  953. return ret;
  954. cci_write(sensor->regmap, VGXY61_REG_FORMAT_CTRL,
  955. get_bpp_by_code(sensor->fmt.code), &ret);
  956. cci_write(sensor->regmap, VGXY61_REG_OIF_ROI0_CTRL,
  957. get_data_type_by_code(sensor->fmt.code), &ret);
  958. cci_write(sensor->regmap, VGXY61_REG_READOUT_CTRL,
  959. sensor->current_mode->bin_mode, &ret);
  960. cci_write(sensor->regmap, VGXY61_REG_ROI0_START_H, crop->left, &ret);
  961. cci_write(sensor->regmap, VGXY61_REG_ROI0_END_H,
  962. crop->left + crop->width - 1, &ret);
  963. cci_write(sensor->regmap, VGXY61_REG_ROI0_START_V, crop->top, &ret);
  964. cci_write(sensor->regmap, VGXY61_REG_ROI0_END_V,
  965. crop->top + crop->height - 1, &ret);
  966. if (ret)
  967. goto err_rpm_put;
  968. ret = vgxy61_apply_settings(sensor);
  969. if (ret)
  970. goto err_rpm_put;
  971. ret = cci_write(sensor->regmap, VGXY61_REG_STREAMING,
  972. VGXY61_STREAMING_REQ_START, NULL);
  973. if (ret)
  974. goto err_rpm_put;
  975. ret = vgxy61_poll_reg(sensor, VGXY61_REG_STREAMING,
  976. VGXY61_STREAMING_NO_REQ, VGXY61_TIMEOUT_MS);
  977. if (ret)
  978. goto err_rpm_put;
  979. ret = vgxy61_wait_state(sensor, VGXY61_SYSTEM_FSM_STREAMING,
  980. VGXY61_TIMEOUT_MS);
  981. if (ret)
  982. goto err_rpm_put;
  983. /* vflip and hflip cannot change during streaming */
  984. __v4l2_ctrl_grab(sensor->vflip_ctrl, true);
  985. __v4l2_ctrl_grab(sensor->hflip_ctrl, true);
  986. return 0;
  987. err_rpm_put:
  988. pm_runtime_put(&client->dev);
  989. return ret;
  990. }
  991. static int vgxy61_stream_disable(struct vgxy61_dev *sensor)
  992. {
  993. struct i2c_client *client = v4l2_get_subdevdata(&sensor->sd);
  994. int ret;
  995. ret = cci_write(sensor->regmap, VGXY61_REG_STREAMING,
  996. VGXY61_STREAMING_REQ_STOP, NULL);
  997. if (ret)
  998. goto err_str_dis;
  999. ret = vgxy61_poll_reg(sensor, VGXY61_REG_STREAMING,
  1000. VGXY61_STREAMING_NO_REQ, 2000);
  1001. if (ret)
  1002. goto err_str_dis;
  1003. ret = vgxy61_wait_state(sensor, VGXY61_SYSTEM_FSM_SW_STBY,
  1004. VGXY61_TIMEOUT_MS);
  1005. if (ret)
  1006. goto err_str_dis;
  1007. __v4l2_ctrl_grab(sensor->vflip_ctrl, false);
  1008. __v4l2_ctrl_grab(sensor->hflip_ctrl, false);
  1009. err_str_dis:
  1010. if (ret)
  1011. WARN(1, "Can't disable stream");
  1012. pm_runtime_put(&client->dev);
  1013. return ret;
  1014. }
  1015. static int vgxy61_s_stream(struct v4l2_subdev *sd, int enable)
  1016. {
  1017. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1018. int ret = 0;
  1019. mutex_lock(&sensor->lock);
  1020. ret = enable ? vgxy61_stream_enable(sensor) :
  1021. vgxy61_stream_disable(sensor);
  1022. if (!ret)
  1023. sensor->streaming = enable;
  1024. mutex_unlock(&sensor->lock);
  1025. return ret;
  1026. }
  1027. static int vgxy61_set_fmt(struct v4l2_subdev *sd,
  1028. struct v4l2_subdev_state *sd_state,
  1029. struct v4l2_subdev_format *format)
  1030. {
  1031. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1032. const struct vgxy61_mode_info *new_mode;
  1033. struct v4l2_mbus_framefmt *fmt;
  1034. int ret;
  1035. mutex_lock(&sensor->lock);
  1036. if (sensor->streaming) {
  1037. ret = -EBUSY;
  1038. goto out;
  1039. }
  1040. ret = vgxy61_try_fmt_internal(sd, &format->format, &new_mode);
  1041. if (ret)
  1042. goto out;
  1043. if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
  1044. fmt = v4l2_subdev_state_get_format(sd_state, 0);
  1045. *fmt = format->format;
  1046. } else if (sensor->current_mode != new_mode ||
  1047. sensor->fmt.code != format->format.code) {
  1048. fmt = &sensor->fmt;
  1049. *fmt = format->format;
  1050. sensor->current_mode = new_mode;
  1051. /* Reset vblank and framelength to default */
  1052. ret = vgxy61_update_vblank(sensor,
  1053. VGXY61_FRAME_LENGTH_DEF -
  1054. new_mode->crop.height,
  1055. sensor->hdr);
  1056. /* Update controls to reflect new mode */
  1057. __v4l2_ctrl_s_ctrl_int64(sensor->pixel_rate_ctrl,
  1058. get_pixel_rate(sensor));
  1059. __v4l2_ctrl_modify_range(sensor->vblank_ctrl,
  1060. sensor->vblank_min,
  1061. 0xffff - new_mode->crop.height,
  1062. 1, sensor->vblank);
  1063. __v4l2_ctrl_s_ctrl(sensor->vblank_ctrl, sensor->vblank);
  1064. __v4l2_ctrl_modify_range(sensor->expo_ctrl, sensor->expo_min,
  1065. sensor->expo_max, 1,
  1066. sensor->expo_long);
  1067. }
  1068. out:
  1069. mutex_unlock(&sensor->lock);
  1070. return ret;
  1071. }
  1072. static int vgxy61_init_state(struct v4l2_subdev *sd,
  1073. struct v4l2_subdev_state *sd_state)
  1074. {
  1075. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1076. struct v4l2_subdev_format fmt = { 0 };
  1077. vgxy61_fill_framefmt(sensor, sensor->current_mode, &fmt.format,
  1078. VGXY61_MEDIA_BUS_FMT_DEF);
  1079. return vgxy61_set_fmt(sd, sd_state, &fmt);
  1080. }
  1081. static int vgxy61_s_ctrl(struct v4l2_ctrl *ctrl)
  1082. {
  1083. struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
  1084. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1085. const struct vgxy61_mode_info *cur_mode = sensor->current_mode;
  1086. int ret;
  1087. switch (ctrl->id) {
  1088. case V4L2_CID_EXPOSURE:
  1089. ret = vgxy61_update_exposure(sensor, ctrl->val, sensor->hdr);
  1090. ctrl->val = sensor->expo_long;
  1091. break;
  1092. case V4L2_CID_ANALOGUE_GAIN:
  1093. ret = vgxy61_update_analog_gain(sensor, ctrl->val);
  1094. break;
  1095. case V4L2_CID_DIGITAL_GAIN:
  1096. ret = vgxy61_update_digital_gain(sensor, ctrl->val);
  1097. break;
  1098. case V4L2_CID_VFLIP:
  1099. case V4L2_CID_HFLIP:
  1100. if (sensor->streaming) {
  1101. ret = -EBUSY;
  1102. break;
  1103. }
  1104. if (ctrl->id == V4L2_CID_VFLIP)
  1105. sensor->vflip = ctrl->val;
  1106. if (ctrl->id == V4L2_CID_HFLIP)
  1107. sensor->hflip = ctrl->val;
  1108. ret = 0;
  1109. break;
  1110. case V4L2_CID_TEST_PATTERN:
  1111. ret = vgxy61_update_patgen(sensor, ctrl->val);
  1112. break;
  1113. case V4L2_CID_HDR_SENSOR_MODE:
  1114. ret = vgxy61_update_hdr(sensor, ctrl->val);
  1115. /* Update vblank and exposure controls to match new hdr */
  1116. __v4l2_ctrl_modify_range(sensor->vblank_ctrl,
  1117. sensor->vblank_min,
  1118. 0xffff - cur_mode->crop.height,
  1119. 1, sensor->vblank);
  1120. __v4l2_ctrl_modify_range(sensor->expo_ctrl, sensor->expo_min,
  1121. sensor->expo_max, 1,
  1122. sensor->expo_long);
  1123. break;
  1124. case V4L2_CID_VBLANK:
  1125. ret = vgxy61_update_vblank(sensor, ctrl->val, sensor->hdr);
  1126. /* Update exposure control to match new vblank */
  1127. __v4l2_ctrl_modify_range(sensor->expo_ctrl, sensor->expo_min,
  1128. sensor->expo_max, 1,
  1129. sensor->expo_long);
  1130. break;
  1131. default:
  1132. ret = -EINVAL;
  1133. break;
  1134. }
  1135. return ret;
  1136. }
  1137. static const struct v4l2_ctrl_ops vgxy61_ctrl_ops = {
  1138. .s_ctrl = vgxy61_s_ctrl,
  1139. };
  1140. static int vgxy61_init_controls(struct vgxy61_dev *sensor)
  1141. {
  1142. const struct v4l2_ctrl_ops *ops = &vgxy61_ctrl_ops;
  1143. struct v4l2_ctrl_handler *hdl = &sensor->ctrl_handler;
  1144. const struct vgxy61_mode_info *cur_mode = sensor->current_mode;
  1145. struct v4l2_fwnode_device_properties props;
  1146. struct v4l2_ctrl *ctrl;
  1147. int ret;
  1148. v4l2_ctrl_handler_init(hdl, 16);
  1149. /* We can use our own mutex for the ctrl lock */
  1150. hdl->lock = &sensor->lock;
  1151. v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, 0, 0x1c, 1,
  1152. sensor->analog_gain);
  1153. v4l2_ctrl_new_std(hdl, ops, V4L2_CID_DIGITAL_GAIN, 0, 0xfff, 1,
  1154. sensor->digital_gain);
  1155. v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
  1156. ARRAY_SIZE(vgxy61_test_pattern_menu) - 1,
  1157. 0, 0, vgxy61_test_pattern_menu);
  1158. ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, 0,
  1159. sensor->line_length, 1,
  1160. sensor->line_length - cur_mode->width);
  1161. if (ctrl)
  1162. ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1163. ctrl = v4l2_ctrl_new_int_menu(hdl, ops, V4L2_CID_LINK_FREQ,
  1164. ARRAY_SIZE(link_freq) - 1, 0, link_freq);
  1165. if (ctrl)
  1166. ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1167. v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_HDR_SENSOR_MODE,
  1168. ARRAY_SIZE(vgxy61_hdr_mode_menu) - 1, 0,
  1169. VGXY61_NO_HDR, vgxy61_hdr_mode_menu);
  1170. /*
  1171. * Keep a pointer to these controls as we need to update them when
  1172. * setting the format
  1173. */
  1174. sensor->pixel_rate_ctrl = v4l2_ctrl_new_std(hdl, ops,
  1175. V4L2_CID_PIXEL_RATE, 1,
  1176. INT_MAX, 1,
  1177. get_pixel_rate(sensor));
  1178. if (sensor->pixel_rate_ctrl)
  1179. sensor->pixel_rate_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1180. sensor->expo_ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
  1181. sensor->expo_min,
  1182. sensor->expo_max, 1,
  1183. sensor->expo_long);
  1184. sensor->vblank_ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VBLANK,
  1185. sensor->vblank_min,
  1186. 0xffff - cur_mode->crop.height,
  1187. 1, sensor->vblank);
  1188. sensor->vflip_ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
  1189. 0, 1, 1, sensor->vflip);
  1190. sensor->hflip_ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
  1191. 0, 1, 1, sensor->hflip);
  1192. if (hdl->error) {
  1193. ret = hdl->error;
  1194. goto free_ctrls;
  1195. }
  1196. ret = v4l2_fwnode_device_parse(&sensor->i2c_client->dev, &props);
  1197. if (ret)
  1198. goto free_ctrls;
  1199. ret = v4l2_ctrl_new_fwnode_properties(hdl, ops, &props);
  1200. if (ret)
  1201. goto free_ctrls;
  1202. sensor->sd.ctrl_handler = hdl;
  1203. return 0;
  1204. free_ctrls:
  1205. v4l2_ctrl_handler_free(hdl);
  1206. return ret;
  1207. }
  1208. static const struct v4l2_subdev_core_ops vgxy61_core_ops = {
  1209. .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
  1210. .unsubscribe_event = v4l2_event_subdev_unsubscribe,
  1211. };
  1212. static const struct v4l2_subdev_video_ops vgxy61_video_ops = {
  1213. .s_stream = vgxy61_s_stream,
  1214. };
  1215. static const struct v4l2_subdev_pad_ops vgxy61_pad_ops = {
  1216. .enum_mbus_code = vgxy61_enum_mbus_code,
  1217. .get_fmt = vgxy61_get_fmt,
  1218. .set_fmt = vgxy61_set_fmt,
  1219. .get_selection = vgxy61_get_selection,
  1220. .enum_frame_size = vgxy61_enum_frame_size,
  1221. };
  1222. static const struct v4l2_subdev_ops vgxy61_subdev_ops = {
  1223. .core = &vgxy61_core_ops,
  1224. .video = &vgxy61_video_ops,
  1225. .pad = &vgxy61_pad_ops,
  1226. };
  1227. static const struct v4l2_subdev_internal_ops vgxy61_internal_ops = {
  1228. .init_state = vgxy61_init_state,
  1229. };
  1230. static const struct media_entity_operations vgxy61_subdev_entity_ops = {
  1231. .link_validate = v4l2_subdev_link_validate,
  1232. };
  1233. static int vgxy61_tx_from_ep(struct vgxy61_dev *sensor,
  1234. struct fwnode_handle *handle)
  1235. {
  1236. struct v4l2_fwnode_endpoint ep = { .bus_type = V4L2_MBUS_CSI2_DPHY };
  1237. struct i2c_client *client = sensor->i2c_client;
  1238. u32 log2phy[VGXY61_NB_POLARITIES] = {~0, ~0, ~0, ~0, ~0};
  1239. u32 phy2log[VGXY61_NB_POLARITIES] = {~0, ~0, ~0, ~0, ~0};
  1240. int polarities[VGXY61_NB_POLARITIES] = {0, 0, 0, 0, 0};
  1241. int l_nb;
  1242. unsigned int p, l, i;
  1243. int ret;
  1244. ret = v4l2_fwnode_endpoint_alloc_parse(handle, &ep);
  1245. if (ret)
  1246. return -EINVAL;
  1247. l_nb = ep.bus.mipi_csi2.num_data_lanes;
  1248. if (l_nb != 1 && l_nb != 2 && l_nb != 4) {
  1249. dev_err(&client->dev, "invalid data lane number %d\n", l_nb);
  1250. goto error_ep;
  1251. }
  1252. /* Build log2phy, phy2log and polarities from ep info */
  1253. log2phy[0] = ep.bus.mipi_csi2.clock_lane;
  1254. phy2log[log2phy[0]] = 0;
  1255. for (l = 1; l < l_nb + 1; l++) {
  1256. log2phy[l] = ep.bus.mipi_csi2.data_lanes[l - 1];
  1257. phy2log[log2phy[l]] = l;
  1258. }
  1259. /*
  1260. * Then fill remaining slots for every physical slot to have something
  1261. * valid for hardware stuff.
  1262. */
  1263. for (p = 0; p < VGXY61_NB_POLARITIES; p++) {
  1264. if (phy2log[p] != ~0)
  1265. continue;
  1266. phy2log[p] = l;
  1267. log2phy[l] = p;
  1268. l++;
  1269. }
  1270. for (l = 0; l < l_nb + 1; l++)
  1271. polarities[l] = ep.bus.mipi_csi2.lane_polarities[l];
  1272. if (log2phy[0] != 0) {
  1273. dev_err(&client->dev, "clk lane must be map to physical lane 0\n");
  1274. goto error_ep;
  1275. }
  1276. sensor->oif_ctrl = (polarities[4] << 15) + ((phy2log[4] - 1) << 13) +
  1277. (polarities[3] << 12) + ((phy2log[3] - 1) << 10) +
  1278. (polarities[2] << 9) + ((phy2log[2] - 1) << 7) +
  1279. (polarities[1] << 6) + ((phy2log[1] - 1) << 4) +
  1280. (polarities[0] << 3) +
  1281. l_nb;
  1282. sensor->nb_of_lane = l_nb;
  1283. dev_dbg(&client->dev, "tx uses %d lanes", l_nb);
  1284. for (i = 0; i < VGXY61_NB_POLARITIES; i++) {
  1285. dev_dbg(&client->dev, "log2phy[%d] = %d\n", i, log2phy[i]);
  1286. dev_dbg(&client->dev, "phy2log[%d] = %d\n", i, phy2log[i]);
  1287. dev_dbg(&client->dev, "polarity[%d] = %d\n", i, polarities[i]);
  1288. }
  1289. dev_dbg(&client->dev, "oif_ctrl = 0x%04x\n", sensor->oif_ctrl);
  1290. v4l2_fwnode_endpoint_free(&ep);
  1291. return 0;
  1292. error_ep:
  1293. v4l2_fwnode_endpoint_free(&ep);
  1294. return -EINVAL;
  1295. }
  1296. static int vgxy61_configure(struct vgxy61_dev *sensor)
  1297. {
  1298. u32 sensor_freq;
  1299. u8 prediv, mult;
  1300. u64 line_length;
  1301. int ret = 0;
  1302. compute_pll_parameters_by_freq(sensor->clk_freq, &prediv, &mult);
  1303. sensor_freq = (mult * sensor->clk_freq) / prediv;
  1304. /* Frequency to data rate is 1:1 ratio for MIPI */
  1305. sensor->data_rate_in_mbps = sensor_freq;
  1306. /* Video timing ISP path (pixel clock) requires 804/5 mhz = 160 mhz */
  1307. sensor->pclk = sensor_freq / 5;
  1308. cci_read(sensor->regmap, VGXY61_REG_LINE_LENGTH, &line_length, &ret);
  1309. if (ret < 0)
  1310. return ret;
  1311. sensor->line_length = (u16)line_length;
  1312. cci_write(sensor->regmap, VGXY61_REG_EXT_CLOCK, sensor->clk_freq, &ret);
  1313. cci_write(sensor->regmap, VGXY61_REG_CLK_PLL_PREDIV, prediv, &ret);
  1314. cci_write(sensor->regmap, VGXY61_REG_CLK_SYS_PLL_MULT, mult, &ret);
  1315. cci_write(sensor->regmap, VGXY61_REG_OIF_CTRL, sensor->oif_ctrl, &ret);
  1316. cci_write(sensor->regmap, VGXY61_REG_FRAME_CONTENT_CTRL, 0, &ret);
  1317. cci_write(sensor->regmap, VGXY61_REG_BYPASS_CTRL, 4, &ret);
  1318. if (ret)
  1319. return ret;
  1320. vgxy61_update_gpios_strobe_polarity(sensor, sensor->gpios_polarity);
  1321. /* Set pattern generator solid to middle value */
  1322. cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_GR, 0x800, &ret);
  1323. cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_R, 0x800, &ret);
  1324. cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_B, 0x800, &ret);
  1325. cci_write(sensor->regmap, VGXY61_REG_PATGEN_LONG_DATA_GB, 0x800, &ret);
  1326. cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_GR, 0x800, &ret);
  1327. cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_R, 0x800, &ret);
  1328. cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_B, 0x800, &ret);
  1329. cci_write(sensor->regmap, VGXY61_REG_PATGEN_SHORT_DATA_GB, 0x800, &ret);
  1330. if (ret)
  1331. return ret;
  1332. return 0;
  1333. }
  1334. static int vgxy61_patch(struct vgxy61_dev *sensor)
  1335. {
  1336. struct i2c_client *client = sensor->i2c_client;
  1337. u64 patch;
  1338. int ret;
  1339. ret = vgxy61_write_array(sensor, VGXY61_REG_FWPATCH_START_ADDR,
  1340. sizeof(patch_array), patch_array);
  1341. cci_write(sensor->regmap, VGXY61_REG_STBY, 0x10, &ret);
  1342. if (ret)
  1343. return ret;
  1344. ret = vgxy61_poll_reg(sensor, VGXY61_REG_STBY, 0, VGXY61_TIMEOUT_MS);
  1345. cci_read(sensor->regmap, VGXY61_REG_FWPATCH_REVISION, &patch, &ret);
  1346. if (ret < 0)
  1347. return ret;
  1348. if (patch != (VGXY61_FWPATCH_REVISION_MAJOR << 12) +
  1349. (VGXY61_FWPATCH_REVISION_MINOR << 8) +
  1350. VGXY61_FWPATCH_REVISION_MICRO) {
  1351. dev_err(&client->dev,
  1352. "bad patch version expected %d.%d.%d got %u.%u.%u\n",
  1353. VGXY61_FWPATCH_REVISION_MAJOR,
  1354. VGXY61_FWPATCH_REVISION_MINOR,
  1355. VGXY61_FWPATCH_REVISION_MICRO,
  1356. (u16)patch >> 12, ((u16)patch >> 8) & 0x0f, (u16)patch & 0xff);
  1357. return -ENODEV;
  1358. }
  1359. dev_dbg(&client->dev, "patch %u.%u.%u applied\n",
  1360. (u16)patch >> 12, ((u16)patch >> 8) & 0x0f, (u16)patch & 0xff);
  1361. return 0;
  1362. }
  1363. static int vgxy61_detect_cut_version(struct vgxy61_dev *sensor)
  1364. {
  1365. struct i2c_client *client = sensor->i2c_client;
  1366. u64 device_rev;
  1367. int ret;
  1368. ret = cci_read(sensor->regmap, VGXY61_REG_REVISION, &device_rev, NULL);
  1369. if (ret < 0)
  1370. return ret;
  1371. switch (device_rev >> 8) {
  1372. case 0xA:
  1373. dev_dbg(&client->dev, "Cut1 detected\n");
  1374. dev_err(&client->dev, "Cut1 not supported by this driver\n");
  1375. return -ENODEV;
  1376. case 0xB:
  1377. dev_dbg(&client->dev, "Cut2 detected\n");
  1378. return 0;
  1379. case 0xC:
  1380. dev_dbg(&client->dev, "Cut3 detected\n");
  1381. return 0;
  1382. default:
  1383. dev_err(&client->dev, "Unable to detect cut version\n");
  1384. return -ENODEV;
  1385. }
  1386. }
  1387. static int vgxy61_detect(struct vgxy61_dev *sensor)
  1388. {
  1389. struct i2c_client *client = sensor->i2c_client;
  1390. u64 st, id = 0;
  1391. int ret;
  1392. ret = cci_read(sensor->regmap, VGXY61_REG_MODEL_ID, &id, NULL);
  1393. if (ret < 0)
  1394. return ret;
  1395. if (id != VG5661_MODEL_ID && id != VG5761_MODEL_ID) {
  1396. dev_warn(&client->dev, "Unsupported sensor id %x\n", (u16)id);
  1397. return -ENODEV;
  1398. }
  1399. dev_dbg(&client->dev, "detected sensor id = 0x%04x\n", (u16)id);
  1400. sensor->id = id;
  1401. ret = vgxy61_wait_state(sensor, VGXY61_SYSTEM_FSM_SW_STBY,
  1402. VGXY61_TIMEOUT_MS);
  1403. if (ret)
  1404. return ret;
  1405. ret = cci_read(sensor->regmap, VGXY61_REG_NVM, &st, NULL);
  1406. if (ret < 0)
  1407. return ret;
  1408. if (st != VGXY61_NVM_OK)
  1409. dev_warn(&client->dev, "Bad nvm state got %u\n", (u8)st);
  1410. ret = vgxy61_detect_cut_version(sensor);
  1411. if (ret)
  1412. return ret;
  1413. return 0;
  1414. }
  1415. /* Power/clock management functions */
  1416. static int vgxy61_power_on(struct device *dev)
  1417. {
  1418. struct i2c_client *client = to_i2c_client(dev);
  1419. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1420. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1421. int ret;
  1422. ret = regulator_bulk_enable(ARRAY_SIZE(vgxy61_supply_name),
  1423. sensor->supplies);
  1424. if (ret) {
  1425. dev_err(&client->dev, "failed to enable regulators %d\n", ret);
  1426. return ret;
  1427. }
  1428. ret = clk_prepare_enable(sensor->xclk);
  1429. if (ret) {
  1430. dev_err(&client->dev, "failed to enable clock %d\n", ret);
  1431. goto disable_bulk;
  1432. }
  1433. if (sensor->reset_gpio) {
  1434. ret = vgxy61_apply_reset(sensor);
  1435. if (ret) {
  1436. dev_err(&client->dev, "sensor reset failed %d\n", ret);
  1437. goto disable_clock;
  1438. }
  1439. }
  1440. ret = vgxy61_detect(sensor);
  1441. if (ret) {
  1442. dev_err(&client->dev, "sensor detect failed %d\n", ret);
  1443. goto disable_clock;
  1444. }
  1445. ret = vgxy61_patch(sensor);
  1446. if (ret) {
  1447. dev_err(&client->dev, "sensor patch failed %d\n", ret);
  1448. goto disable_clock;
  1449. }
  1450. ret = vgxy61_configure(sensor);
  1451. if (ret) {
  1452. dev_err(&client->dev, "sensor configuration failed %d\n", ret);
  1453. goto disable_clock;
  1454. }
  1455. return 0;
  1456. disable_clock:
  1457. clk_disable_unprepare(sensor->xclk);
  1458. disable_bulk:
  1459. regulator_bulk_disable(ARRAY_SIZE(vgxy61_supply_name),
  1460. sensor->supplies);
  1461. return ret;
  1462. }
  1463. static int vgxy61_power_off(struct device *dev)
  1464. {
  1465. struct i2c_client *client = to_i2c_client(dev);
  1466. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1467. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1468. clk_disable_unprepare(sensor->xclk);
  1469. regulator_bulk_disable(ARRAY_SIZE(vgxy61_supply_name),
  1470. sensor->supplies);
  1471. return 0;
  1472. }
  1473. static void vgxy61_fill_sensor_param(struct vgxy61_dev *sensor)
  1474. {
  1475. if (sensor->id == VG5761_MODEL_ID) {
  1476. sensor->sensor_width = VGX761_WIDTH;
  1477. sensor->sensor_height = VGX761_HEIGHT;
  1478. sensor->sensor_modes = vgx761_mode_data;
  1479. sensor->sensor_modes_nb = ARRAY_SIZE(vgx761_mode_data);
  1480. sensor->default_mode = &vgx761_mode_data[VGX761_DEFAULT_MODE];
  1481. sensor->rot_term = VGX761_SHORT_ROT_TERM;
  1482. } else if (sensor->id == VG5661_MODEL_ID) {
  1483. sensor->sensor_width = VGX661_WIDTH;
  1484. sensor->sensor_height = VGX661_HEIGHT;
  1485. sensor->sensor_modes = vgx661_mode_data;
  1486. sensor->sensor_modes_nb = ARRAY_SIZE(vgx661_mode_data);
  1487. sensor->default_mode = &vgx661_mode_data[VGX661_DEFAULT_MODE];
  1488. sensor->rot_term = VGX661_SHORT_ROT_TERM;
  1489. } else {
  1490. /* Should never happen */
  1491. WARN_ON(true);
  1492. }
  1493. sensor->current_mode = sensor->default_mode;
  1494. }
  1495. static int vgxy61_probe(struct i2c_client *client)
  1496. {
  1497. struct device *dev = &client->dev;
  1498. struct fwnode_handle *handle;
  1499. struct vgxy61_dev *sensor;
  1500. int ret;
  1501. sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
  1502. if (!sensor)
  1503. return -ENOMEM;
  1504. sensor->i2c_client = client;
  1505. sensor->streaming = false;
  1506. sensor->hdr = VGXY61_NO_HDR;
  1507. sensor->expo_long = 200;
  1508. sensor->expo_short = 0;
  1509. sensor->hflip = false;
  1510. sensor->vflip = false;
  1511. sensor->analog_gain = 0;
  1512. sensor->digital_gain = 256;
  1513. sensor->regmap = devm_cci_regmap_init_i2c(client, 16);
  1514. if (IS_ERR(sensor->regmap)) {
  1515. ret = PTR_ERR(sensor->regmap);
  1516. return dev_err_probe(dev, ret, "Failed to init regmap\n");
  1517. }
  1518. handle = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0, 0);
  1519. if (!handle) {
  1520. dev_err(dev, "handle node not found\n");
  1521. return -EINVAL;
  1522. }
  1523. ret = vgxy61_tx_from_ep(sensor, handle);
  1524. fwnode_handle_put(handle);
  1525. if (ret) {
  1526. dev_err(dev, "Failed to parse handle %d\n", ret);
  1527. return ret;
  1528. }
  1529. sensor->xclk = devm_clk_get(dev, NULL);
  1530. if (IS_ERR(sensor->xclk)) {
  1531. dev_err(dev, "failed to get xclk\n");
  1532. return PTR_ERR(sensor->xclk);
  1533. }
  1534. sensor->clk_freq = clk_get_rate(sensor->xclk);
  1535. if (sensor->clk_freq < 6 * HZ_PER_MHZ ||
  1536. sensor->clk_freq > 27 * HZ_PER_MHZ) {
  1537. dev_err(dev, "Only 6Mhz-27Mhz clock range supported. provide %lu MHz\n",
  1538. sensor->clk_freq / HZ_PER_MHZ);
  1539. return -EINVAL;
  1540. }
  1541. sensor->gpios_polarity =
  1542. device_property_read_bool(dev, "st,strobe-gpios-polarity");
  1543. v4l2_i2c_subdev_init(&sensor->sd, client, &vgxy61_subdev_ops);
  1544. sensor->sd.internal_ops = &vgxy61_internal_ops;
  1545. sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
  1546. V4L2_SUBDEV_FL_HAS_EVENTS;
  1547. sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
  1548. sensor->sd.entity.ops = &vgxy61_subdev_entity_ops;
  1549. sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1550. sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
  1551. GPIOD_OUT_HIGH);
  1552. ret = vgxy61_get_regulators(sensor);
  1553. if (ret) {
  1554. dev_err(&client->dev, "failed to get regulators %d\n", ret);
  1555. return ret;
  1556. }
  1557. ret = vgxy61_power_on(dev);
  1558. if (ret)
  1559. return ret;
  1560. vgxy61_fill_sensor_param(sensor);
  1561. vgxy61_fill_framefmt(sensor, sensor->current_mode, &sensor->fmt,
  1562. VGXY61_MEDIA_BUS_FMT_DEF);
  1563. mutex_init(&sensor->lock);
  1564. ret = vgxy61_update_hdr(sensor, sensor->hdr);
  1565. if (ret)
  1566. goto error_power_off;
  1567. ret = vgxy61_init_controls(sensor);
  1568. if (ret) {
  1569. dev_err(&client->dev, "controls initialization failed %d\n",
  1570. ret);
  1571. goto error_power_off;
  1572. }
  1573. ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
  1574. if (ret) {
  1575. dev_err(&client->dev, "pads init failed %d\n", ret);
  1576. goto error_handler_free;
  1577. }
  1578. /* Enable runtime PM and turn off the device */
  1579. pm_runtime_set_active(dev);
  1580. pm_runtime_enable(dev);
  1581. pm_runtime_idle(dev);
  1582. ret = v4l2_async_register_subdev(&sensor->sd);
  1583. if (ret) {
  1584. dev_err(&client->dev, "async subdev register failed %d\n", ret);
  1585. goto error_pm_runtime;
  1586. }
  1587. pm_runtime_set_autosuspend_delay(&client->dev, 1000);
  1588. pm_runtime_use_autosuspend(&client->dev);
  1589. dev_dbg(&client->dev, "vgxy61 probe successfully\n");
  1590. return 0;
  1591. error_pm_runtime:
  1592. pm_runtime_disable(&client->dev);
  1593. pm_runtime_set_suspended(&client->dev);
  1594. media_entity_cleanup(&sensor->sd.entity);
  1595. error_handler_free:
  1596. v4l2_ctrl_handler_free(sensor->sd.ctrl_handler);
  1597. error_power_off:
  1598. mutex_destroy(&sensor->lock);
  1599. vgxy61_power_off(dev);
  1600. return ret;
  1601. }
  1602. static void vgxy61_remove(struct i2c_client *client)
  1603. {
  1604. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1605. struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
  1606. v4l2_async_unregister_subdev(&sensor->sd);
  1607. mutex_destroy(&sensor->lock);
  1608. media_entity_cleanup(&sensor->sd.entity);
  1609. pm_runtime_disable(&client->dev);
  1610. if (!pm_runtime_status_suspended(&client->dev))
  1611. vgxy61_power_off(&client->dev);
  1612. pm_runtime_set_suspended(&client->dev);
  1613. }
  1614. static const struct of_device_id vgxy61_dt_ids[] = {
  1615. { .compatible = "st,st-vgxy61" },
  1616. { /* sentinel */ }
  1617. };
  1618. MODULE_DEVICE_TABLE(of, vgxy61_dt_ids);
  1619. static const struct dev_pm_ops vgxy61_pm_ops = {
  1620. SET_RUNTIME_PM_OPS(vgxy61_power_off, vgxy61_power_on, NULL)
  1621. };
  1622. static struct i2c_driver vgxy61_i2c_driver = {
  1623. .driver = {
  1624. .name = "vgxy61",
  1625. .of_match_table = vgxy61_dt_ids,
  1626. .pm = &vgxy61_pm_ops,
  1627. },
  1628. .probe = vgxy61_probe,
  1629. .remove = vgxy61_remove,
  1630. };
  1631. module_i2c_driver(vgxy61_i2c_driver);
  1632. MODULE_AUTHOR("Benjamin Mugnier <benjamin.mugnier@foss.st.com>");
  1633. MODULE_AUTHOR("Mickael Guene <mickael.guene@st.com>");
  1634. MODULE_AUTHOR("Sylvain Petinot <sylvain.petinot@foss.st.com>");
  1635. MODULE_DESCRIPTION("VGXY61 camera subdev driver");
  1636. MODULE_LICENSE("GPL");