ipa_interrupt.c 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2018-2024 Linaro Ltd.
  4. */
  5. /* DOC: IPA Interrupts
  6. *
  7. * The IPA has an interrupt line distinct from the interrupt used by the GSI
  8. * code. Whereas GSI interrupts are generally related to channel events (like
  9. * transfer completions), IPA interrupts are related to other events related
  10. * to the IPA. Some of the IPA interrupts come from a microcontroller
  11. * embedded in the IPA. Each IPA interrupt type can be both masked and
  12. * acknowledged independent of the others.
  13. *
  14. * Two of the IPA interrupts are initiated by the microcontroller. A third
  15. * can be generated to signal the need for a wakeup/resume when an IPA
  16. * endpoint has been suspended. There are other IPA events, but at this
  17. * time only these three are supported.
  18. */
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/pm_wakeirq.h>
  23. #include <linux/types.h>
  24. #include "ipa.h"
  25. #include "ipa_endpoint.h"
  26. #include "ipa_interrupt.h"
  27. #include "ipa_power.h"
  28. #include "ipa_reg.h"
  29. #include "ipa_uc.h"
  30. /**
  31. * struct ipa_interrupt - IPA interrupt information
  32. * @ipa: IPA pointer
  33. * @irq: Linux IRQ number used for IPA interrupts
  34. * @enabled: Mask indicating which interrupts are enabled
  35. * @suspend_enabled: Bitmap of endpoints with the SUSPEND interrupt enabled
  36. */
  37. struct ipa_interrupt {
  38. struct ipa *ipa;
  39. u32 irq;
  40. u32 enabled;
  41. unsigned long *suspend_enabled;
  42. };
  43. /* Clear the suspend interrupt for all endpoints that signaled it */
  44. static void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
  45. {
  46. struct ipa *ipa = interrupt->ipa;
  47. u32 unit_count;
  48. u32 unit;
  49. unit_count = DIV_ROUND_UP(ipa->endpoint_count, 32);
  50. for (unit = 0; unit < unit_count; unit++) {
  51. const struct reg *reg;
  52. u32 val;
  53. reg = ipa_reg(ipa, IRQ_SUSPEND_INFO);
  54. val = ioread32(ipa->reg_virt + reg_n_offset(reg, unit));
  55. /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
  56. if (!val || ipa->version == IPA_VERSION_3_0)
  57. continue;
  58. reg = ipa_reg(ipa, IRQ_SUSPEND_CLR);
  59. iowrite32(val, ipa->reg_virt + reg_n_offset(reg, unit));
  60. }
  61. }
  62. /* Process a particular interrupt type that has been received */
  63. static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
  64. {
  65. struct ipa *ipa = interrupt->ipa;
  66. const struct reg *reg;
  67. u32 mask = BIT(irq_id);
  68. u32 offset;
  69. reg = ipa_reg(ipa, IPA_IRQ_CLR);
  70. offset = reg_offset(reg);
  71. switch (irq_id) {
  72. case IPA_IRQ_UC_0:
  73. case IPA_IRQ_UC_1:
  74. /* For microcontroller interrupts, clear the interrupt right
  75. * away, "to avoid clearing unhandled interrupts."
  76. */
  77. iowrite32(mask, ipa->reg_virt + offset);
  78. ipa_uc_interrupt_handler(ipa, irq_id);
  79. break;
  80. case IPA_IRQ_TX_SUSPEND:
  81. /* Clearing the SUSPEND_TX interrupt also clears the
  82. * register that tells us which suspended endpoint(s)
  83. * caused the interrupt, so defer clearing until after
  84. * the handler has been called.
  85. */
  86. ipa_interrupt_suspend_clear_all(interrupt);
  87. fallthrough;
  88. default: /* Silently ignore (and clear) any other condition */
  89. iowrite32(mask, ipa->reg_virt + offset);
  90. break;
  91. }
  92. }
  93. /* IPA IRQ handler is threaded */
  94. static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
  95. {
  96. struct ipa_interrupt *interrupt = dev_id;
  97. struct ipa *ipa = interrupt->ipa;
  98. u32 enabled = interrupt->enabled;
  99. struct device *dev = ipa->dev;
  100. const struct reg *reg;
  101. u32 pending;
  102. u32 offset;
  103. u32 mask;
  104. int ret;
  105. ret = pm_runtime_get_sync(dev);
  106. if (WARN_ON(ret < 0))
  107. goto out_power_put;
  108. /* The status register indicates which conditions are present,
  109. * including conditions whose interrupt is not enabled. Handle
  110. * only the enabled ones.
  111. */
  112. reg = ipa_reg(ipa, IPA_IRQ_STTS);
  113. offset = reg_offset(reg);
  114. pending = ioread32(ipa->reg_virt + offset);
  115. while ((mask = pending & enabled)) {
  116. do {
  117. u32 irq_id = __ffs(mask);
  118. mask ^= BIT(irq_id);
  119. ipa_interrupt_process(interrupt, irq_id);
  120. } while (mask);
  121. pending = ioread32(ipa->reg_virt + offset);
  122. }
  123. /* If any disabled interrupts are pending, clear them */
  124. if (pending) {
  125. dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
  126. pending);
  127. reg = ipa_reg(ipa, IPA_IRQ_CLR);
  128. iowrite32(pending, ipa->reg_virt + reg_offset(reg));
  129. }
  130. out_power_put:
  131. pm_runtime_mark_last_busy(dev);
  132. (void)pm_runtime_put_autosuspend(dev);
  133. return IRQ_HANDLED;
  134. }
  135. static void ipa_interrupt_enabled_update(struct ipa *ipa)
  136. {
  137. const struct reg *reg = ipa_reg(ipa, IPA_IRQ_EN);
  138. iowrite32(ipa->interrupt->enabled, ipa->reg_virt + reg_offset(reg));
  139. }
  140. /* Enable an IPA interrupt type */
  141. void ipa_interrupt_enable(struct ipa *ipa, enum ipa_irq_id ipa_irq)
  142. {
  143. /* Update the IPA interrupt mask to enable it */
  144. ipa->interrupt->enabled |= BIT(ipa_irq);
  145. ipa_interrupt_enabled_update(ipa);
  146. }
  147. /* Disable an IPA interrupt type */
  148. void ipa_interrupt_disable(struct ipa *ipa, enum ipa_irq_id ipa_irq)
  149. {
  150. /* Update the IPA interrupt mask to disable it */
  151. ipa->interrupt->enabled &= ~BIT(ipa_irq);
  152. ipa_interrupt_enabled_update(ipa);
  153. }
  154. void ipa_interrupt_irq_disable(struct ipa *ipa)
  155. {
  156. disable_irq(ipa->interrupt->irq);
  157. }
  158. void ipa_interrupt_irq_enable(struct ipa *ipa)
  159. {
  160. enable_irq(ipa->interrupt->irq);
  161. }
  162. /* Common function used to enable/disable TX_SUSPEND for an endpoint */
  163. static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
  164. u32 endpoint_id, bool enable)
  165. {
  166. struct ipa *ipa = interrupt->ipa;
  167. u32 mask = BIT(endpoint_id % 32);
  168. u32 unit = endpoint_id / 32;
  169. const struct reg *reg;
  170. unsigned long weight;
  171. u32 offset;
  172. u32 val;
  173. WARN_ON(!test_bit(endpoint_id, ipa->available));
  174. /* IPA version 3.0 does not support TX_SUSPEND interrupt control */
  175. if (ipa->version == IPA_VERSION_3_0)
  176. return;
  177. weight = bitmap_weight(interrupt->suspend_enabled, ipa->endpoint_count);
  178. if (weight == 1 && !enable)
  179. ipa_interrupt_disable(ipa, IPA_IRQ_TX_SUSPEND);
  180. reg = ipa_reg(ipa, IRQ_SUSPEND_EN);
  181. offset = reg_n_offset(reg, unit);
  182. val = ioread32(ipa->reg_virt + offset);
  183. if (enable)
  184. val |= mask;
  185. else
  186. val &= ~mask;
  187. __change_bit(endpoint_id, interrupt->suspend_enabled);
  188. iowrite32(val, ipa->reg_virt + offset);
  189. if (!weight && enable)
  190. ipa_interrupt_enable(ipa, IPA_IRQ_TX_SUSPEND);
  191. }
  192. /* Enable TX_SUSPEND for an endpoint */
  193. void
  194. ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
  195. {
  196. ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
  197. }
  198. /* Disable TX_SUSPEND for an endpoint */
  199. void
  200. ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
  201. {
  202. ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
  203. }
  204. /* Simulate arrival of an IPA TX_SUSPEND interrupt */
  205. void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
  206. {
  207. ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
  208. }
  209. /* Configure the IPA interrupt framework */
  210. int ipa_interrupt_config(struct ipa *ipa)
  211. {
  212. struct ipa_interrupt *interrupt = ipa->interrupt;
  213. unsigned int irq = interrupt->irq;
  214. struct device *dev = ipa->dev;
  215. const struct reg *reg;
  216. int ret;
  217. interrupt->ipa = ipa;
  218. /* Initially all IPA interrupt types are disabled */
  219. interrupt->enabled = 0;
  220. interrupt->suspend_enabled = bitmap_zalloc(ipa->endpoint_count,
  221. GFP_KERNEL);
  222. if (!interrupt->suspend_enabled) {
  223. ret = -ENOMEM;
  224. goto err_kfree;
  225. }
  226. /* Disable IPA interrupt types */
  227. reg = ipa_reg(ipa, IPA_IRQ_EN);
  228. iowrite32(0, ipa->reg_virt + reg_offset(reg));
  229. ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
  230. "ipa", interrupt);
  231. if (ret) {
  232. dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
  233. goto err_free_bitmap;
  234. }
  235. ret = device_init_wakeup(dev, true);
  236. if (ret) {
  237. dev_err(dev, "error %d enabling wakeup\n", ret);
  238. goto err_free_irq;
  239. }
  240. ret = dev_pm_set_wake_irq(dev, irq);
  241. if (ret) {
  242. dev_err(dev, "error %d registering \"ipa\" IRQ as wakeirq\n",
  243. ret);
  244. goto err_disable_wakeup;
  245. }
  246. ipa->interrupt = interrupt;
  247. return 0;
  248. err_disable_wakeup:
  249. (void)device_init_wakeup(dev, false);
  250. err_free_irq:
  251. free_irq(interrupt->irq, interrupt);
  252. err_free_bitmap:
  253. bitmap_free(interrupt->suspend_enabled);
  254. err_kfree:
  255. kfree(interrupt);
  256. return ret;
  257. }
  258. /* Inverse of ipa_interrupt_config() */
  259. void ipa_interrupt_deconfig(struct ipa *ipa)
  260. {
  261. struct ipa_interrupt *interrupt = ipa->interrupt;
  262. struct device *dev = ipa->dev;
  263. ipa->interrupt = NULL;
  264. dev_pm_clear_wake_irq(dev);
  265. (void)device_init_wakeup(dev, false);
  266. free_irq(interrupt->irq, interrupt);
  267. bitmap_free(interrupt->suspend_enabled);
  268. }
  269. /* Initialize the IPA interrupt structure */
  270. struct ipa_interrupt *ipa_interrupt_init(struct platform_device *pdev)
  271. {
  272. struct ipa_interrupt *interrupt;
  273. int irq;
  274. irq = platform_get_irq_byname(pdev, "ipa");
  275. if (irq <= 0)
  276. return ERR_PTR(irq ? : -EINVAL);
  277. interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
  278. if (!interrupt)
  279. return ERR_PTR(-ENOMEM);
  280. interrupt->irq = irq;
  281. return interrupt;
  282. }
  283. /* Inverse of ipa_interrupt_init() */
  284. void ipa_interrupt_exit(struct ipa_interrupt *interrupt)
  285. {
  286. kfree(interrupt);
  287. }