arm_pmu_platform.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * platform_device probing code for ARM performance counters.
  4. *
  5. * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
  6. * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
  7. */
  8. #define pr_fmt(fmt) "hw perfevents: " fmt
  9. #define dev_fmt pr_fmt
  10. #include <linux/bug.h>
  11. #include <linux/cpumask.h>
  12. #include <linux/device.h>
  13. #include <linux/errno.h>
  14. #include <linux/irq.h>
  15. #include <linux/irqdesc.h>
  16. #include <linux/kconfig.h>
  17. #include <linux/of.h>
  18. #include <linux/percpu.h>
  19. #include <linux/perf/arm_pmu.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/printk.h>
  22. #include <linux/smp.h>
  23. static int probe_current_pmu(struct arm_pmu *pmu,
  24. const struct pmu_probe_info *info)
  25. {
  26. int cpu = get_cpu();
  27. unsigned int cpuid = read_cpuid_id();
  28. int ret = -ENODEV;
  29. pr_info("probing PMU on CPU %d\n", cpu);
  30. for (; info->init != NULL; info++) {
  31. if ((cpuid & info->mask) != info->cpuid)
  32. continue;
  33. ret = info->init(pmu);
  34. break;
  35. }
  36. put_cpu();
  37. return ret;
  38. }
  39. static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
  40. {
  41. int cpu, ret;
  42. struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
  43. ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
  44. if (ret)
  45. return ret;
  46. for_each_cpu(cpu, &pmu->supported_cpus)
  47. per_cpu(hw_events->irq, cpu) = irq;
  48. return 0;
  49. }
  50. static bool pmu_has_irq_affinity(struct device_node *node)
  51. {
  52. return of_property_present(node, "interrupt-affinity");
  53. }
  54. static int pmu_parse_irq_affinity(struct device *dev, int i)
  55. {
  56. struct device_node *dn;
  57. int cpu;
  58. /*
  59. * If we don't have an interrupt-affinity property, we guess irq
  60. * affinity matches our logical CPU order, as we used to assume.
  61. * This is fragile, so we'll warn in pmu_parse_irqs().
  62. */
  63. if (!pmu_has_irq_affinity(dev->of_node))
  64. return i;
  65. dn = of_parse_phandle(dev->of_node, "interrupt-affinity", i);
  66. if (!dn) {
  67. dev_warn(dev, "failed to parse interrupt-affinity[%d]\n", i);
  68. return -EINVAL;
  69. }
  70. cpu = of_cpu_node_to_id(dn);
  71. if (cpu < 0) {
  72. dev_warn(dev, "failed to find logical CPU for %pOFn\n", dn);
  73. cpu = nr_cpu_ids;
  74. }
  75. of_node_put(dn);
  76. return cpu;
  77. }
  78. static int pmu_parse_irqs(struct arm_pmu *pmu)
  79. {
  80. int i = 0, num_irqs;
  81. struct platform_device *pdev = pmu->plat_device;
  82. struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
  83. struct device *dev = &pdev->dev;
  84. num_irqs = platform_irq_count(pdev);
  85. if (num_irqs < 0)
  86. return dev_err_probe(dev, num_irqs, "unable to count PMU IRQs\n");
  87. /*
  88. * In this case we have no idea which CPUs are covered by the PMU.
  89. * To match our prior behaviour, we assume all CPUs in this case.
  90. */
  91. if (num_irqs == 0) {
  92. dev_warn(dev, "no irqs for PMU, sampling events not supported\n");
  93. pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
  94. cpumask_setall(&pmu->supported_cpus);
  95. return 0;
  96. }
  97. if (num_irqs == 1) {
  98. int irq = platform_get_irq(pdev, 0);
  99. if ((irq > 0) && irq_is_percpu_devid(irq))
  100. return pmu_parse_percpu_irq(pmu, irq);
  101. }
  102. if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(dev->of_node))
  103. dev_warn(dev, "no interrupt-affinity property, guessing.\n");
  104. for (i = 0; i < num_irqs; i++) {
  105. int cpu, irq;
  106. irq = platform_get_irq(pdev, i);
  107. if (WARN_ON(irq <= 0))
  108. continue;
  109. if (irq_is_percpu_devid(irq)) {
  110. dev_warn(dev, "multiple PPIs or mismatched SPI/PPI detected\n");
  111. return -EINVAL;
  112. }
  113. cpu = pmu_parse_irq_affinity(dev, i);
  114. if (cpu < 0)
  115. return cpu;
  116. if (cpu >= nr_cpu_ids)
  117. continue;
  118. if (per_cpu(hw_events->irq, cpu)) {
  119. dev_warn(dev, "multiple PMU IRQs for the same CPU detected\n");
  120. return -EINVAL;
  121. }
  122. per_cpu(hw_events->irq, cpu) = irq;
  123. cpumask_set_cpu(cpu, &pmu->supported_cpus);
  124. }
  125. return 0;
  126. }
  127. static int armpmu_request_irqs(struct arm_pmu *armpmu)
  128. {
  129. struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
  130. int cpu, err = 0;
  131. for_each_cpu(cpu, &armpmu->supported_cpus) {
  132. int irq = per_cpu(hw_events->irq, cpu);
  133. if (!irq)
  134. continue;
  135. err = armpmu_request_irq(irq, cpu);
  136. if (err)
  137. break;
  138. }
  139. return err;
  140. }
  141. static void armpmu_free_irqs(struct arm_pmu *armpmu)
  142. {
  143. int cpu;
  144. struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
  145. for_each_cpu(cpu, &armpmu->supported_cpus) {
  146. int irq = per_cpu(hw_events->irq, cpu);
  147. armpmu_free_irq(irq, cpu);
  148. }
  149. }
  150. int arm_pmu_device_probe(struct platform_device *pdev,
  151. const struct of_device_id *of_table,
  152. const struct pmu_probe_info *probe_table)
  153. {
  154. armpmu_init_fn init_fn;
  155. struct device *dev = &pdev->dev;
  156. struct arm_pmu *pmu;
  157. int ret = -ENODEV;
  158. pmu = armpmu_alloc();
  159. if (!pmu)
  160. return -ENOMEM;
  161. pmu->pmu.parent = &pdev->dev;
  162. pmu->plat_device = pdev;
  163. ret = pmu_parse_irqs(pmu);
  164. if (ret)
  165. goto out_free;
  166. init_fn = of_device_get_match_data(dev);
  167. if (init_fn) {
  168. pmu->secure_access = of_property_read_bool(dev->of_node,
  169. "secure-reg-access");
  170. /* arm64 systems boot only as non-secure */
  171. if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
  172. dev_warn(dev, "ignoring \"secure-reg-access\" property for arm64\n");
  173. pmu->secure_access = false;
  174. }
  175. ret = init_fn(pmu);
  176. } else if (probe_table) {
  177. cpumask_setall(&pmu->supported_cpus);
  178. ret = probe_current_pmu(pmu, probe_table);
  179. }
  180. if (ret) {
  181. dev_err(dev, "failed to probe PMU!\n");
  182. goto out_free;
  183. }
  184. ret = armpmu_request_irqs(pmu);
  185. if (ret)
  186. goto out_free_irqs;
  187. ret = armpmu_register(pmu);
  188. if (ret) {
  189. dev_err(dev, "failed to register PMU devices!\n");
  190. goto out_free_irqs;
  191. }
  192. return 0;
  193. out_free_irqs:
  194. armpmu_free_irqs(pmu);
  195. out_free:
  196. armpmu_free(pmu);
  197. return ret;
  198. }