pinctrl-digicolor.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for Conexant Digicolor General Purpose Pin Mapping
  4. *
  5. * Author: Baruch Siach <baruch@tkos.co.il>
  6. *
  7. * Copyright (C) 2015 Paradox Innovation Ltd.
  8. *
  9. * TODO:
  10. * - GPIO interrupt support
  11. * - Pin pad configuration (pull up/down, strength)
  12. */
  13. #include <linux/gpio/driver.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/mod_devicetable.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/pinctrl/machine.h>
  20. #include <linux/pinctrl/pinconf.h>
  21. #include <linux/pinctrl/pinconf-generic.h>
  22. #include <linux/pinctrl/pinctrl.h>
  23. #include <linux/pinctrl/pinmux.h>
  24. #include "pinctrl-utils.h"
  25. #define DRIVER_NAME "pinctrl-digicolor"
  26. #define GP_CLIENTSEL(clct) ((clct)*8 + 0x20)
  27. #define GP_DRIVE0(clct) (GP_CLIENTSEL(clct) + 2)
  28. #define GP_OUTPUT0(clct) (GP_CLIENTSEL(clct) + 3)
  29. #define GP_INPUT(clct) (GP_CLIENTSEL(clct) + 6)
  30. #define PIN_COLLECTIONS ('R' - 'A' + 1)
  31. #define PINS_PER_COLLECTION 8
  32. #define PINS_COUNT (PIN_COLLECTIONS * PINS_PER_COLLECTION)
  33. struct dc_pinmap {
  34. void __iomem *regs;
  35. struct device *dev;
  36. struct pinctrl_dev *pctl;
  37. struct pinctrl_desc *desc;
  38. const char *pin_names[PINS_COUNT];
  39. struct gpio_chip chip;
  40. spinlock_t lock;
  41. };
  42. static int dc_get_groups_count(struct pinctrl_dev *pctldev)
  43. {
  44. return PINS_COUNT;
  45. }
  46. static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
  47. unsigned selector)
  48. {
  49. struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
  50. /* Exactly one group per pin */
  51. return pmap->desc->pins[selector].name;
  52. }
  53. static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
  54. const unsigned **pins,
  55. unsigned *num_pins)
  56. {
  57. struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
  58. *pins = &pmap->desc->pins[selector].number;
  59. *num_pins = 1;
  60. return 0;
  61. }
  62. static const struct pinctrl_ops dc_pinctrl_ops = {
  63. .get_groups_count = dc_get_groups_count,
  64. .get_group_name = dc_get_group_name,
  65. .get_group_pins = dc_get_group_pins,
  66. .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
  67. .dt_free_map = pinctrl_utils_free_map,
  68. };
  69. static const char *const dc_functions[] = {
  70. "gpio",
  71. "client_a",
  72. "client_b",
  73. "client_c",
  74. };
  75. static int dc_get_functions_count(struct pinctrl_dev *pctldev)
  76. {
  77. return ARRAY_SIZE(dc_functions);
  78. }
  79. static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
  80. {
  81. return dc_functions[selector];
  82. }
  83. static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
  84. const char * const **groups,
  85. unsigned * const num_groups)
  86. {
  87. struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
  88. *groups = pmap->pin_names;
  89. *num_groups = PINS_COUNT;
  90. return 0;
  91. }
  92. static void dc_client_sel(int pin_num, int *reg, int *bit)
  93. {
  94. *bit = (pin_num % PINS_PER_COLLECTION) * 2;
  95. *reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
  96. if (*bit >= PINS_PER_COLLECTION) {
  97. *bit -= PINS_PER_COLLECTION;
  98. *reg += 1;
  99. }
  100. }
  101. static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
  102. unsigned group)
  103. {
  104. struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
  105. int bit_off, reg_off;
  106. u8 reg;
  107. dc_client_sel(group, &reg_off, &bit_off);
  108. reg = readb_relaxed(pmap->regs + reg_off);
  109. reg &= ~(3 << bit_off);
  110. reg |= (selector << bit_off);
  111. writeb_relaxed(reg, pmap->regs + reg_off);
  112. return 0;
  113. }
  114. static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
  115. struct pinctrl_gpio_range *range,
  116. unsigned offset)
  117. {
  118. struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
  119. int bit_off, reg_off;
  120. u8 reg;
  121. dc_client_sel(offset, &reg_off, &bit_off);
  122. reg = readb_relaxed(pmap->regs + reg_off);
  123. if ((reg & (3 << bit_off)) != 0)
  124. return -EBUSY;
  125. return 0;
  126. }
  127. static const struct pinmux_ops dc_pmxops = {
  128. .get_functions_count = dc_get_functions_count,
  129. .get_function_name = dc_get_fname,
  130. .get_function_groups = dc_get_groups,
  131. .set_mux = dc_set_mux,
  132. .gpio_request_enable = dc_pmx_request_gpio,
  133. };
  134. static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
  135. {
  136. struct dc_pinmap *pmap = gpiochip_get_data(chip);
  137. int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
  138. int bit_off = gpio % PINS_PER_COLLECTION;
  139. u8 drive;
  140. unsigned long flags;
  141. spin_lock_irqsave(&pmap->lock, flags);
  142. drive = readb_relaxed(pmap->regs + reg_off);
  143. drive &= ~BIT(bit_off);
  144. writeb_relaxed(drive, pmap->regs + reg_off);
  145. spin_unlock_irqrestore(&pmap->lock, flags);
  146. return 0;
  147. }
  148. static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
  149. static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
  150. int value)
  151. {
  152. struct dc_pinmap *pmap = gpiochip_get_data(chip);
  153. int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
  154. int bit_off = gpio % PINS_PER_COLLECTION;
  155. u8 drive;
  156. unsigned long flags;
  157. dc_gpio_set(chip, gpio, value);
  158. spin_lock_irqsave(&pmap->lock, flags);
  159. drive = readb_relaxed(pmap->regs + reg_off);
  160. drive |= BIT(bit_off);
  161. writeb_relaxed(drive, pmap->regs + reg_off);
  162. spin_unlock_irqrestore(&pmap->lock, flags);
  163. return 0;
  164. }
  165. static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
  166. {
  167. struct dc_pinmap *pmap = gpiochip_get_data(chip);
  168. int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
  169. int bit_off = gpio % PINS_PER_COLLECTION;
  170. u8 input;
  171. input = readb_relaxed(pmap->regs + reg_off);
  172. return !!(input & BIT(bit_off));
  173. }
  174. static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
  175. {
  176. struct dc_pinmap *pmap = gpiochip_get_data(chip);
  177. int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
  178. int bit_off = gpio % PINS_PER_COLLECTION;
  179. u8 output;
  180. unsigned long flags;
  181. spin_lock_irqsave(&pmap->lock, flags);
  182. output = readb_relaxed(pmap->regs + reg_off);
  183. if (value)
  184. output |= BIT(bit_off);
  185. else
  186. output &= ~BIT(bit_off);
  187. writeb_relaxed(output, pmap->regs + reg_off);
  188. spin_unlock_irqrestore(&pmap->lock, flags);
  189. }
  190. static int dc_gpiochip_add(struct dc_pinmap *pmap)
  191. {
  192. struct gpio_chip *chip = &pmap->chip;
  193. int ret;
  194. chip->label = DRIVER_NAME;
  195. chip->parent = pmap->dev;
  196. chip->request = gpiochip_generic_request;
  197. chip->free = gpiochip_generic_free;
  198. chip->direction_input = dc_gpio_direction_input;
  199. chip->direction_output = dc_gpio_direction_output;
  200. chip->get = dc_gpio_get;
  201. chip->set = dc_gpio_set;
  202. chip->base = -1;
  203. chip->ngpio = PINS_COUNT;
  204. spin_lock_init(&pmap->lock);
  205. ret = gpiochip_add_data(chip, pmap);
  206. if (ret < 0)
  207. return ret;
  208. ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
  209. PINS_COUNT);
  210. if (ret < 0) {
  211. gpiochip_remove(chip);
  212. return ret;
  213. }
  214. return 0;
  215. }
  216. static int dc_pinctrl_probe(struct platform_device *pdev)
  217. {
  218. struct dc_pinmap *pmap;
  219. struct pinctrl_pin_desc *pins;
  220. struct pinctrl_desc *pctl_desc;
  221. char *pin_names;
  222. int name_len = strlen("GP_xx") + 1;
  223. int i, j;
  224. pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
  225. if (!pmap)
  226. return -ENOMEM;
  227. pmap->regs = devm_platform_ioremap_resource(pdev, 0);
  228. if (IS_ERR(pmap->regs))
  229. return PTR_ERR(pmap->regs);
  230. pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
  231. GFP_KERNEL);
  232. if (!pins)
  233. return -ENOMEM;
  234. pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
  235. GFP_KERNEL);
  236. if (!pin_names)
  237. return -ENOMEM;
  238. for (i = 0; i < PIN_COLLECTIONS; i++) {
  239. for (j = 0; j < PINS_PER_COLLECTION; j++) {
  240. int pin_id = i*PINS_PER_COLLECTION + j;
  241. char *name = &pin_names[pin_id * name_len];
  242. snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
  243. pins[pin_id].number = pin_id;
  244. pins[pin_id].name = name;
  245. pmap->pin_names[pin_id] = name;
  246. }
  247. }
  248. pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
  249. if (!pctl_desc)
  250. return -ENOMEM;
  251. pctl_desc->name = DRIVER_NAME,
  252. pctl_desc->owner = THIS_MODULE,
  253. pctl_desc->pctlops = &dc_pinctrl_ops,
  254. pctl_desc->pmxops = &dc_pmxops,
  255. pctl_desc->npins = PINS_COUNT;
  256. pctl_desc->pins = pins;
  257. pmap->desc = pctl_desc;
  258. pmap->dev = &pdev->dev;
  259. pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
  260. if (IS_ERR(pmap->pctl)) {
  261. dev_err(&pdev->dev, "pinctrl driver registration failed\n");
  262. return PTR_ERR(pmap->pctl);
  263. }
  264. return dc_gpiochip_add(pmap);
  265. }
  266. static const struct of_device_id dc_pinctrl_ids[] = {
  267. { .compatible = "cnxt,cx92755-pinctrl" },
  268. { /* sentinel */ }
  269. };
  270. static struct platform_driver dc_pinctrl_driver = {
  271. .driver = {
  272. .name = DRIVER_NAME,
  273. .of_match_table = dc_pinctrl_ids,
  274. .suppress_bind_attrs = true,
  275. },
  276. .probe = dc_pinctrl_probe,
  277. };
  278. builtin_platform_driver(dc_pinctrl_driver);