events_base.c 54 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Xen event channels
  4. *
  5. * Xen models interrupts with abstract event channels. Because each
  6. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  7. * must dynamically map irqs<->event channels. The event channels
  8. * interface with the rest of the kernel by defining a xen interrupt
  9. * chip. When an event is received, it is mapped to an irq and sent
  10. * through the normal interrupt processing path.
  11. *
  12. * There are four kinds of events which can be mapped to an event
  13. * channel:
  14. *
  15. * 1. Inter-domain notifications. This includes all the virtual
  16. * device events, since they're driven by front-ends in another domain
  17. * (typically dom0).
  18. * 2. VIRQs, typically used for timers. These are per-cpu events.
  19. * 3. IPIs.
  20. * 4. PIRQs - Hardware interrupts.
  21. *
  22. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  23. */
  24. #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
  25. #include <linux/linkage.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/irq.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/string.h>
  30. #include <linux/memblock.h>
  31. #include <linux/slab.h>
  32. #include <linux/irqnr.h>
  33. #include <linux/pci.h>
  34. #include <linux/rcupdate.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/cpuhotplug.h>
  37. #include <linux/atomic.h>
  38. #include <linux/ktime.h>
  39. #ifdef CONFIG_X86
  40. #include <asm/desc.h>
  41. #include <asm/ptrace.h>
  42. #include <asm/idtentry.h>
  43. #include <asm/irq.h>
  44. #include <asm/io_apic.h>
  45. #include <asm/i8259.h>
  46. #include <asm/xen/cpuid.h>
  47. #include <asm/xen/pci.h>
  48. #endif
  49. #include <asm/sync_bitops.h>
  50. #include <asm/xen/hypercall.h>
  51. #include <asm/xen/hypervisor.h>
  52. #include <xen/page.h>
  53. #include <xen/xen.h>
  54. #include <xen/hvm.h>
  55. #include <xen/xen-ops.h>
  56. #include <xen/events.h>
  57. #include <xen/interface/xen.h>
  58. #include <xen/interface/event_channel.h>
  59. #include <xen/interface/hvm/hvm_op.h>
  60. #include <xen/interface/hvm/params.h>
  61. #include <xen/interface/physdev.h>
  62. #include <xen/interface/sched.h>
  63. #include <xen/interface/vcpu.h>
  64. #include <xen/xenbus.h>
  65. #include <asm/hw_irq.h>
  66. #include "events_internal.h"
  67. #undef MODULE_PARAM_PREFIX
  68. #define MODULE_PARAM_PREFIX "xen."
  69. /* Interrupt types. */
  70. enum xen_irq_type {
  71. IRQT_UNBOUND = 0,
  72. IRQT_PIRQ,
  73. IRQT_VIRQ,
  74. IRQT_IPI,
  75. IRQT_EVTCHN
  76. };
  77. /*
  78. * Packed IRQ information:
  79. * type - enum xen_irq_type
  80. * event channel - irq->event channel mapping
  81. * cpu - cpu this event channel is bound to
  82. * index - type-specific information:
  83. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  84. * guest, or GSI (real passthrough IRQ) of the device.
  85. * VIRQ - virq number
  86. * IPI - IPI vector
  87. * EVTCHN -
  88. */
  89. struct irq_info {
  90. struct list_head list;
  91. struct list_head eoi_list;
  92. struct rcu_work rwork;
  93. short refcnt;
  94. u8 spurious_cnt;
  95. u8 is_accounted;
  96. short type; /* type: IRQT_* */
  97. u8 mask_reason; /* Why is event channel masked */
  98. #define EVT_MASK_REASON_EXPLICIT 0x01
  99. #define EVT_MASK_REASON_TEMPORARY 0x02
  100. #define EVT_MASK_REASON_EOI_PENDING 0x04
  101. u8 is_active; /* Is event just being handled? */
  102. unsigned irq;
  103. evtchn_port_t evtchn; /* event channel */
  104. unsigned short cpu; /* cpu bound */
  105. unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */
  106. unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */
  107. u64 eoi_time; /* Time in jiffies when to EOI. */
  108. raw_spinlock_t lock;
  109. bool is_static; /* Is event channel static */
  110. union {
  111. unsigned short virq;
  112. enum ipi_vector ipi;
  113. struct {
  114. unsigned short pirq;
  115. unsigned short gsi;
  116. unsigned char vector;
  117. unsigned char flags;
  118. uint16_t domid;
  119. } pirq;
  120. struct xenbus_device *interdomain;
  121. } u;
  122. };
  123. #define PIRQ_NEEDS_EOI (1 << 0)
  124. #define PIRQ_SHAREABLE (1 << 1)
  125. #define PIRQ_MSI_GROUP (1 << 2)
  126. static uint __read_mostly event_loop_timeout = 2;
  127. module_param(event_loop_timeout, uint, 0644);
  128. static uint __read_mostly event_eoi_delay = 10;
  129. module_param(event_eoi_delay, uint, 0644);
  130. const struct evtchn_ops *evtchn_ops;
  131. /*
  132. * This lock protects updates to the following mapping and reference-count
  133. * arrays. The lock does not need to be acquired to read the mapping tables.
  134. */
  135. static DEFINE_MUTEX(irq_mapping_update_lock);
  136. /*
  137. * Lock hierarchy:
  138. *
  139. * irq_mapping_update_lock
  140. * IRQ-desc lock
  141. * percpu eoi_list_lock
  142. * irq_info->lock
  143. */
  144. static LIST_HEAD(xen_irq_list_head);
  145. /* IRQ <-> VIRQ mapping. */
  146. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  147. /* IRQ <-> IPI mapping */
  148. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  149. /* Cache for IPI event channels - needed for hot cpu unplug (avoid RCU usage). */
  150. static DEFINE_PER_CPU(evtchn_port_t [XEN_NR_IPIS], ipi_to_evtchn) = {[0 ... XEN_NR_IPIS-1] = 0};
  151. /* Event channel distribution data */
  152. static atomic_t channels_on_cpu[NR_CPUS];
  153. static int **evtchn_to_irq;
  154. #ifdef CONFIG_X86
  155. static unsigned long *pirq_eoi_map;
  156. #endif
  157. static bool (*pirq_needs_eoi)(struct irq_info *info);
  158. #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  159. #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  160. #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
  161. /* Xen will never allocate port zero for any purpose. */
  162. #define VALID_EVTCHN(chn) ((chn) != 0)
  163. static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY];
  164. static struct irq_chip xen_dynamic_chip;
  165. static struct irq_chip xen_lateeoi_chip;
  166. static struct irq_chip xen_percpu_chip;
  167. static struct irq_chip xen_pirq_chip;
  168. static void enable_dynirq(struct irq_data *data);
  169. static DEFINE_PER_CPU(unsigned int, irq_epoch);
  170. static void clear_evtchn_to_irq_row(int *evtchn_row)
  171. {
  172. unsigned col;
  173. for (col = 0; col < EVTCHN_PER_ROW; col++)
  174. WRITE_ONCE(evtchn_row[col], -1);
  175. }
  176. static void clear_evtchn_to_irq_all(void)
  177. {
  178. unsigned row;
  179. for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
  180. if (evtchn_to_irq[row] == NULL)
  181. continue;
  182. clear_evtchn_to_irq_row(evtchn_to_irq[row]);
  183. }
  184. }
  185. static int set_evtchn_to_irq(evtchn_port_t evtchn, unsigned int irq)
  186. {
  187. unsigned row;
  188. unsigned col;
  189. int *evtchn_row;
  190. if (evtchn >= xen_evtchn_max_channels())
  191. return -EINVAL;
  192. row = EVTCHN_ROW(evtchn);
  193. col = EVTCHN_COL(evtchn);
  194. if (evtchn_to_irq[row] == NULL) {
  195. /* Unallocated irq entries return -1 anyway */
  196. if (irq == -1)
  197. return 0;
  198. evtchn_row = (int *) __get_free_pages(GFP_KERNEL, 0);
  199. if (evtchn_row == NULL)
  200. return -ENOMEM;
  201. clear_evtchn_to_irq_row(evtchn_row);
  202. /*
  203. * We've prepared an empty row for the mapping. If a different
  204. * thread was faster inserting it, we can drop ours.
  205. */
  206. if (cmpxchg(&evtchn_to_irq[row], NULL, evtchn_row) != NULL)
  207. free_page((unsigned long) evtchn_row);
  208. }
  209. WRITE_ONCE(evtchn_to_irq[row][col], irq);
  210. return 0;
  211. }
  212. /* Get info for IRQ */
  213. static struct irq_info *info_for_irq(unsigned irq)
  214. {
  215. if (irq < nr_legacy_irqs())
  216. return legacy_info_ptrs[irq];
  217. else
  218. return irq_get_chip_data(irq);
  219. }
  220. static void set_info_for_irq(unsigned int irq, struct irq_info *info)
  221. {
  222. if (irq < nr_legacy_irqs())
  223. legacy_info_ptrs[irq] = info;
  224. else
  225. irq_set_chip_data(irq, info);
  226. }
  227. static struct irq_info *evtchn_to_info(evtchn_port_t evtchn)
  228. {
  229. int irq;
  230. if (evtchn >= xen_evtchn_max_channels())
  231. return NULL;
  232. if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
  233. return NULL;
  234. irq = READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]);
  235. return (irq < 0) ? NULL : info_for_irq(irq);
  236. }
  237. /* Per CPU channel accounting */
  238. static void channels_on_cpu_dec(struct irq_info *info)
  239. {
  240. if (!info->is_accounted)
  241. return;
  242. info->is_accounted = 0;
  243. if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
  244. return;
  245. WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], -1 , 0));
  246. }
  247. static void channels_on_cpu_inc(struct irq_info *info)
  248. {
  249. if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
  250. return;
  251. if (WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], 1,
  252. INT_MAX)))
  253. return;
  254. info->is_accounted = 1;
  255. }
  256. static void xen_irq_free_desc(unsigned int irq)
  257. {
  258. /* Legacy IRQ descriptors are managed by the arch. */
  259. if (irq >= nr_legacy_irqs())
  260. irq_free_desc(irq);
  261. }
  262. static void delayed_free_irq(struct work_struct *work)
  263. {
  264. struct irq_info *info = container_of(to_rcu_work(work), struct irq_info,
  265. rwork);
  266. unsigned int irq = info->irq;
  267. /* Remove the info pointer only now, with no potential users left. */
  268. set_info_for_irq(irq, NULL);
  269. kfree(info);
  270. xen_irq_free_desc(irq);
  271. }
  272. /* Constructors for packed IRQ information. */
  273. static int xen_irq_info_common_setup(struct irq_info *info,
  274. enum xen_irq_type type,
  275. evtchn_port_t evtchn,
  276. unsigned short cpu)
  277. {
  278. int ret;
  279. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  280. info->type = type;
  281. info->evtchn = evtchn;
  282. info->cpu = cpu;
  283. info->mask_reason = EVT_MASK_REASON_EXPLICIT;
  284. raw_spin_lock_init(&info->lock);
  285. ret = set_evtchn_to_irq(evtchn, info->irq);
  286. if (ret < 0)
  287. return ret;
  288. irq_clear_status_flags(info->irq, IRQ_NOREQUEST | IRQ_NOAUTOEN);
  289. return xen_evtchn_port_setup(evtchn);
  290. }
  291. static int xen_irq_info_evtchn_setup(struct irq_info *info,
  292. evtchn_port_t evtchn,
  293. struct xenbus_device *dev)
  294. {
  295. int ret;
  296. ret = xen_irq_info_common_setup(info, IRQT_EVTCHN, evtchn, 0);
  297. info->u.interdomain = dev;
  298. if (dev)
  299. atomic_inc(&dev->event_channels);
  300. return ret;
  301. }
  302. static int xen_irq_info_ipi_setup(struct irq_info *info, unsigned int cpu,
  303. evtchn_port_t evtchn, enum ipi_vector ipi)
  304. {
  305. info->u.ipi = ipi;
  306. per_cpu(ipi_to_irq, cpu)[ipi] = info->irq;
  307. per_cpu(ipi_to_evtchn, cpu)[ipi] = evtchn;
  308. return xen_irq_info_common_setup(info, IRQT_IPI, evtchn, 0);
  309. }
  310. static int xen_irq_info_virq_setup(struct irq_info *info, unsigned int cpu,
  311. evtchn_port_t evtchn, unsigned int virq)
  312. {
  313. info->u.virq = virq;
  314. per_cpu(virq_to_irq, cpu)[virq] = info->irq;
  315. return xen_irq_info_common_setup(info, IRQT_VIRQ, evtchn, 0);
  316. }
  317. static int xen_irq_info_pirq_setup(struct irq_info *info, evtchn_port_t evtchn,
  318. unsigned int pirq, unsigned int gsi,
  319. uint16_t domid, unsigned char flags)
  320. {
  321. info->u.pirq.pirq = pirq;
  322. info->u.pirq.gsi = gsi;
  323. info->u.pirq.domid = domid;
  324. info->u.pirq.flags = flags;
  325. return xen_irq_info_common_setup(info, IRQT_PIRQ, evtchn, 0);
  326. }
  327. static void xen_irq_info_cleanup(struct irq_info *info)
  328. {
  329. set_evtchn_to_irq(info->evtchn, -1);
  330. xen_evtchn_port_remove(info->evtchn, info->cpu);
  331. info->evtchn = 0;
  332. channels_on_cpu_dec(info);
  333. }
  334. /*
  335. * Accessors for packed IRQ information.
  336. */
  337. static evtchn_port_t evtchn_from_irq(unsigned int irq)
  338. {
  339. const struct irq_info *info = NULL;
  340. if (likely(irq < nr_irqs))
  341. info = info_for_irq(irq);
  342. if (!info)
  343. return 0;
  344. return info->evtchn;
  345. }
  346. unsigned int irq_from_evtchn(evtchn_port_t evtchn)
  347. {
  348. struct irq_info *info = evtchn_to_info(evtchn);
  349. return info ? info->irq : -1;
  350. }
  351. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  352. int irq_evtchn_from_virq(unsigned int cpu, unsigned int virq,
  353. evtchn_port_t *evtchn)
  354. {
  355. int irq = per_cpu(virq_to_irq, cpu)[virq];
  356. *evtchn = evtchn_from_irq(irq);
  357. return irq;
  358. }
  359. static enum ipi_vector ipi_from_irq(struct irq_info *info)
  360. {
  361. BUG_ON(info == NULL);
  362. BUG_ON(info->type != IRQT_IPI);
  363. return info->u.ipi;
  364. }
  365. static unsigned int virq_from_irq(struct irq_info *info)
  366. {
  367. BUG_ON(info == NULL);
  368. BUG_ON(info->type != IRQT_VIRQ);
  369. return info->u.virq;
  370. }
  371. static unsigned int pirq_from_irq(struct irq_info *info)
  372. {
  373. BUG_ON(info == NULL);
  374. BUG_ON(info->type != IRQT_PIRQ);
  375. return info->u.pirq.pirq;
  376. }
  377. unsigned int cpu_from_evtchn(evtchn_port_t evtchn)
  378. {
  379. struct irq_info *info = evtchn_to_info(evtchn);
  380. return info ? info->cpu : 0;
  381. }
  382. static void do_mask(struct irq_info *info, u8 reason)
  383. {
  384. unsigned long flags;
  385. raw_spin_lock_irqsave(&info->lock, flags);
  386. if (!info->mask_reason)
  387. mask_evtchn(info->evtchn);
  388. info->mask_reason |= reason;
  389. raw_spin_unlock_irqrestore(&info->lock, flags);
  390. }
  391. static void do_unmask(struct irq_info *info, u8 reason)
  392. {
  393. unsigned long flags;
  394. raw_spin_lock_irqsave(&info->lock, flags);
  395. info->mask_reason &= ~reason;
  396. if (!info->mask_reason)
  397. unmask_evtchn(info->evtchn);
  398. raw_spin_unlock_irqrestore(&info->lock, flags);
  399. }
  400. #ifdef CONFIG_X86
  401. static bool pirq_check_eoi_map(struct irq_info *info)
  402. {
  403. return test_bit(pirq_from_irq(info), pirq_eoi_map);
  404. }
  405. #endif
  406. static bool pirq_needs_eoi_flag(struct irq_info *info)
  407. {
  408. BUG_ON(info->type != IRQT_PIRQ);
  409. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  410. }
  411. static void bind_evtchn_to_cpu(struct irq_info *info, unsigned int cpu,
  412. bool force_affinity)
  413. {
  414. if (IS_ENABLED(CONFIG_SMP) && force_affinity) {
  415. struct irq_data *data = irq_get_irq_data(info->irq);
  416. irq_data_update_affinity(data, cpumask_of(cpu));
  417. irq_data_update_effective_affinity(data, cpumask_of(cpu));
  418. }
  419. xen_evtchn_port_bind_to_cpu(info->evtchn, cpu, info->cpu);
  420. channels_on_cpu_dec(info);
  421. info->cpu = cpu;
  422. channels_on_cpu_inc(info);
  423. }
  424. /**
  425. * notify_remote_via_irq - send event to remote end of event channel via irq
  426. * @irq: irq of event channel to send event to
  427. *
  428. * Unlike notify_remote_via_evtchn(), this is safe to use across
  429. * save/restore. Notifications on a broken connection are silently
  430. * dropped.
  431. */
  432. void notify_remote_via_irq(int irq)
  433. {
  434. evtchn_port_t evtchn = evtchn_from_irq(irq);
  435. if (VALID_EVTCHN(evtchn))
  436. notify_remote_via_evtchn(evtchn);
  437. }
  438. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  439. struct lateeoi_work {
  440. struct delayed_work delayed;
  441. spinlock_t eoi_list_lock;
  442. struct list_head eoi_list;
  443. };
  444. static DEFINE_PER_CPU(struct lateeoi_work, lateeoi);
  445. static void lateeoi_list_del(struct irq_info *info)
  446. {
  447. struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
  448. unsigned long flags;
  449. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  450. list_del_init(&info->eoi_list);
  451. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  452. }
  453. static void lateeoi_list_add(struct irq_info *info)
  454. {
  455. struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
  456. struct irq_info *elem;
  457. u64 now = get_jiffies_64();
  458. unsigned long delay;
  459. unsigned long flags;
  460. if (now < info->eoi_time)
  461. delay = info->eoi_time - now;
  462. else
  463. delay = 1;
  464. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  465. elem = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
  466. eoi_list);
  467. if (!elem || info->eoi_time < elem->eoi_time) {
  468. list_add(&info->eoi_list, &eoi->eoi_list);
  469. mod_delayed_work_on(info->eoi_cpu, system_wq,
  470. &eoi->delayed, delay);
  471. } else {
  472. list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) {
  473. if (elem->eoi_time <= info->eoi_time)
  474. break;
  475. }
  476. list_add(&info->eoi_list, &elem->eoi_list);
  477. }
  478. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  479. }
  480. static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious)
  481. {
  482. evtchn_port_t evtchn;
  483. unsigned int cpu;
  484. unsigned int delay = 0;
  485. evtchn = info->evtchn;
  486. if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list))
  487. return;
  488. if (spurious) {
  489. struct xenbus_device *dev = info->u.interdomain;
  490. unsigned int threshold = 1;
  491. if (dev && dev->spurious_threshold)
  492. threshold = dev->spurious_threshold;
  493. if ((1 << info->spurious_cnt) < (HZ << 2)) {
  494. if (info->spurious_cnt != 0xFF)
  495. info->spurious_cnt++;
  496. }
  497. if (info->spurious_cnt > threshold) {
  498. delay = 1 << (info->spurious_cnt - 1 - threshold);
  499. if (delay > HZ)
  500. delay = HZ;
  501. if (!info->eoi_time)
  502. info->eoi_cpu = smp_processor_id();
  503. info->eoi_time = get_jiffies_64() + delay;
  504. if (dev)
  505. atomic_add(delay, &dev->jiffies_eoi_delayed);
  506. }
  507. if (dev)
  508. atomic_inc(&dev->spurious_events);
  509. } else {
  510. info->spurious_cnt = 0;
  511. }
  512. cpu = info->eoi_cpu;
  513. if (info->eoi_time &&
  514. (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) {
  515. lateeoi_list_add(info);
  516. return;
  517. }
  518. info->eoi_time = 0;
  519. /* is_active hasn't been reset yet, do it now. */
  520. smp_store_release(&info->is_active, 0);
  521. do_unmask(info, EVT_MASK_REASON_EOI_PENDING);
  522. }
  523. static void xen_irq_lateeoi_worker(struct work_struct *work)
  524. {
  525. struct lateeoi_work *eoi;
  526. struct irq_info *info;
  527. u64 now = get_jiffies_64();
  528. unsigned long flags;
  529. eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed);
  530. rcu_read_lock();
  531. while (true) {
  532. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  533. info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
  534. eoi_list);
  535. if (info == NULL)
  536. break;
  537. if (now < info->eoi_time) {
  538. mod_delayed_work_on(info->eoi_cpu, system_wq,
  539. &eoi->delayed,
  540. info->eoi_time - now);
  541. break;
  542. }
  543. list_del_init(&info->eoi_list);
  544. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  545. info->eoi_time = 0;
  546. xen_irq_lateeoi_locked(info, false);
  547. }
  548. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  549. rcu_read_unlock();
  550. }
  551. static void xen_cpu_init_eoi(unsigned int cpu)
  552. {
  553. struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu);
  554. INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker);
  555. spin_lock_init(&eoi->eoi_list_lock);
  556. INIT_LIST_HEAD(&eoi->eoi_list);
  557. }
  558. void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags)
  559. {
  560. struct irq_info *info;
  561. rcu_read_lock();
  562. info = info_for_irq(irq);
  563. if (info)
  564. xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS);
  565. rcu_read_unlock();
  566. }
  567. EXPORT_SYMBOL_GPL(xen_irq_lateeoi);
  568. static struct irq_info *xen_irq_init(unsigned int irq)
  569. {
  570. struct irq_info *info;
  571. info = kzalloc(sizeof(*info), GFP_KERNEL);
  572. if (info) {
  573. info->irq = irq;
  574. info->type = IRQT_UNBOUND;
  575. info->refcnt = -1;
  576. INIT_RCU_WORK(&info->rwork, delayed_free_irq);
  577. set_info_for_irq(irq, info);
  578. /*
  579. * Interrupt affinity setting can be immediate. No point
  580. * in delaying it until an interrupt is handled.
  581. */
  582. irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
  583. INIT_LIST_HEAD(&info->eoi_list);
  584. list_add_tail(&info->list, &xen_irq_list_head);
  585. }
  586. return info;
  587. }
  588. static struct irq_info *xen_allocate_irq_dynamic(void)
  589. {
  590. int irq = irq_alloc_desc_from(0, -1);
  591. struct irq_info *info = NULL;
  592. if (irq >= 0) {
  593. info = xen_irq_init(irq);
  594. if (!info)
  595. xen_irq_free_desc(irq);
  596. }
  597. return info;
  598. }
  599. static struct irq_info *xen_allocate_irq_gsi(unsigned int gsi)
  600. {
  601. int irq;
  602. struct irq_info *info;
  603. /*
  604. * A PV guest has no concept of a GSI (since it has no ACPI
  605. * nor access to/knowledge of the physical APICs). Therefore
  606. * all IRQs are dynamically allocated from the entire IRQ
  607. * space.
  608. */
  609. if (xen_pv_domain() && !xen_initial_domain())
  610. return xen_allocate_irq_dynamic();
  611. /* Legacy IRQ descriptors are already allocated by the arch. */
  612. if (gsi < nr_legacy_irqs())
  613. irq = gsi;
  614. else
  615. irq = irq_alloc_desc_at(gsi, -1);
  616. info = xen_irq_init(irq);
  617. if (!info)
  618. xen_irq_free_desc(irq);
  619. return info;
  620. }
  621. static void xen_free_irq(struct irq_info *info)
  622. {
  623. if (WARN_ON(!info))
  624. return;
  625. if (!list_empty(&info->eoi_list))
  626. lateeoi_list_del(info);
  627. list_del(&info->list);
  628. WARN_ON(info->refcnt > 0);
  629. queue_rcu_work(system_wq, &info->rwork);
  630. }
  631. /* Not called for lateeoi events. */
  632. static void event_handler_exit(struct irq_info *info)
  633. {
  634. smp_store_release(&info->is_active, 0);
  635. clear_evtchn(info->evtchn);
  636. }
  637. static void pirq_query_unmask(struct irq_info *info)
  638. {
  639. struct physdev_irq_status_query irq_status;
  640. irq_status.irq = pirq_from_irq(info);
  641. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  642. irq_status.flags = 0;
  643. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  644. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  645. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  646. }
  647. static void do_eoi_pirq(struct irq_info *info)
  648. {
  649. struct physdev_eoi eoi = { .irq = pirq_from_irq(info) };
  650. int rc = 0;
  651. if (!VALID_EVTCHN(info->evtchn))
  652. return;
  653. event_handler_exit(info);
  654. if (pirq_needs_eoi(info)) {
  655. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  656. WARN_ON(rc);
  657. }
  658. }
  659. static void eoi_pirq(struct irq_data *data)
  660. {
  661. struct irq_info *info = info_for_irq(data->irq);
  662. do_eoi_pirq(info);
  663. }
  664. static void do_disable_dynirq(struct irq_info *info)
  665. {
  666. if (VALID_EVTCHN(info->evtchn))
  667. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  668. }
  669. static void disable_dynirq(struct irq_data *data)
  670. {
  671. struct irq_info *info = info_for_irq(data->irq);
  672. if (info)
  673. do_disable_dynirq(info);
  674. }
  675. static void mask_ack_pirq(struct irq_data *data)
  676. {
  677. struct irq_info *info = info_for_irq(data->irq);
  678. if (info) {
  679. do_disable_dynirq(info);
  680. do_eoi_pirq(info);
  681. }
  682. }
  683. static unsigned int __startup_pirq(struct irq_info *info)
  684. {
  685. struct evtchn_bind_pirq bind_pirq;
  686. evtchn_port_t evtchn = info->evtchn;
  687. int rc;
  688. if (VALID_EVTCHN(evtchn))
  689. goto out;
  690. bind_pirq.pirq = pirq_from_irq(info);
  691. /* NB. We are happy to share unless we are probing. */
  692. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  693. BIND_PIRQ__WILL_SHARE : 0;
  694. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  695. if (rc != 0) {
  696. pr_warn("Failed to obtain physical IRQ %d\n", info->irq);
  697. return 0;
  698. }
  699. evtchn = bind_pirq.port;
  700. pirq_query_unmask(info);
  701. rc = set_evtchn_to_irq(evtchn, info->irq);
  702. if (rc)
  703. goto err;
  704. info->evtchn = evtchn;
  705. bind_evtchn_to_cpu(info, 0, false);
  706. rc = xen_evtchn_port_setup(evtchn);
  707. if (rc)
  708. goto err;
  709. out:
  710. do_unmask(info, EVT_MASK_REASON_EXPLICIT);
  711. do_eoi_pirq(info);
  712. return 0;
  713. err:
  714. pr_err("irq%d: Failed to set port to irq mapping (%d)\n", info->irq,
  715. rc);
  716. xen_evtchn_close(evtchn);
  717. return 0;
  718. }
  719. static unsigned int startup_pirq(struct irq_data *data)
  720. {
  721. struct irq_info *info = info_for_irq(data->irq);
  722. return __startup_pirq(info);
  723. }
  724. static void shutdown_pirq(struct irq_data *data)
  725. {
  726. struct irq_info *info = info_for_irq(data->irq);
  727. evtchn_port_t evtchn = info->evtchn;
  728. BUG_ON(info->type != IRQT_PIRQ);
  729. if (!VALID_EVTCHN(evtchn))
  730. return;
  731. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  732. xen_irq_info_cleanup(info);
  733. xen_evtchn_close(evtchn);
  734. }
  735. static void enable_pirq(struct irq_data *data)
  736. {
  737. enable_dynirq(data);
  738. }
  739. static void disable_pirq(struct irq_data *data)
  740. {
  741. disable_dynirq(data);
  742. }
  743. int xen_irq_from_gsi(unsigned gsi)
  744. {
  745. struct irq_info *info;
  746. list_for_each_entry(info, &xen_irq_list_head, list) {
  747. if (info->type != IRQT_PIRQ)
  748. continue;
  749. if (info->u.pirq.gsi == gsi)
  750. return info->irq;
  751. }
  752. return -1;
  753. }
  754. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  755. static void __unbind_from_irq(struct irq_info *info, unsigned int irq)
  756. {
  757. evtchn_port_t evtchn;
  758. bool close_evtchn = false;
  759. if (!info) {
  760. xen_irq_free_desc(irq);
  761. return;
  762. }
  763. if (info->refcnt > 0) {
  764. info->refcnt--;
  765. if (info->refcnt != 0)
  766. return;
  767. }
  768. evtchn = info->evtchn;
  769. if (VALID_EVTCHN(evtchn)) {
  770. unsigned int cpu = info->cpu;
  771. struct xenbus_device *dev;
  772. if (!info->is_static)
  773. close_evtchn = true;
  774. switch (info->type) {
  775. case IRQT_VIRQ:
  776. per_cpu(virq_to_irq, cpu)[virq_from_irq(info)] = -1;
  777. break;
  778. case IRQT_IPI:
  779. per_cpu(ipi_to_irq, cpu)[ipi_from_irq(info)] = -1;
  780. per_cpu(ipi_to_evtchn, cpu)[ipi_from_irq(info)] = 0;
  781. break;
  782. case IRQT_EVTCHN:
  783. dev = info->u.interdomain;
  784. if (dev)
  785. atomic_dec(&dev->event_channels);
  786. break;
  787. default:
  788. break;
  789. }
  790. xen_irq_info_cleanup(info);
  791. if (close_evtchn)
  792. xen_evtchn_close(evtchn);
  793. }
  794. xen_free_irq(info);
  795. }
  796. /*
  797. * Do not make any assumptions regarding the relationship between the
  798. * IRQ number returned here and the Xen pirq argument.
  799. *
  800. * Note: We don't assign an event channel until the irq actually started
  801. * up. Return an existing irq if we've already got one for the gsi.
  802. *
  803. * Shareable implies level triggered, not shareable implies edge
  804. * triggered here.
  805. */
  806. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  807. unsigned pirq, int shareable, char *name)
  808. {
  809. struct irq_info *info;
  810. struct physdev_irq irq_op;
  811. int ret;
  812. mutex_lock(&irq_mapping_update_lock);
  813. ret = xen_irq_from_gsi(gsi);
  814. if (ret != -1) {
  815. pr_info("%s: returning irq %d for gsi %u\n",
  816. __func__, ret, gsi);
  817. goto out;
  818. }
  819. info = xen_allocate_irq_gsi(gsi);
  820. if (!info)
  821. goto out;
  822. irq_op.irq = info->irq;
  823. irq_op.vector = 0;
  824. /* Only the privileged domain can do this. For non-priv, the pcifront
  825. * driver provides a PCI bus that does the call to do exactly
  826. * this in the priv domain. */
  827. if (xen_initial_domain() &&
  828. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  829. xen_free_irq(info);
  830. ret = -ENOSPC;
  831. goto out;
  832. }
  833. ret = xen_irq_info_pirq_setup(info, 0, pirq, gsi, DOMID_SELF,
  834. shareable ? PIRQ_SHAREABLE : 0);
  835. if (ret < 0) {
  836. __unbind_from_irq(info, info->irq);
  837. goto out;
  838. }
  839. pirq_query_unmask(info);
  840. /* We try to use the handler with the appropriate semantic for the
  841. * type of interrupt: if the interrupt is an edge triggered
  842. * interrupt we use handle_edge_irq.
  843. *
  844. * On the other hand if the interrupt is level triggered we use
  845. * handle_fasteoi_irq like the native code does for this kind of
  846. * interrupts.
  847. *
  848. * Depending on the Xen version, pirq_needs_eoi might return true
  849. * not only for level triggered interrupts but for edge triggered
  850. * interrupts too. In any case Xen always honors the eoi mechanism,
  851. * not injecting any more pirqs of the same kind if the first one
  852. * hasn't received an eoi yet. Therefore using the fasteoi handler
  853. * is the right choice either way.
  854. */
  855. if (shareable)
  856. irq_set_chip_and_handler_name(info->irq, &xen_pirq_chip,
  857. handle_fasteoi_irq, name);
  858. else
  859. irq_set_chip_and_handler_name(info->irq, &xen_pirq_chip,
  860. handle_edge_irq, name);
  861. ret = info->irq;
  862. out:
  863. mutex_unlock(&irq_mapping_update_lock);
  864. return ret;
  865. }
  866. #ifdef CONFIG_PCI_MSI
  867. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  868. {
  869. int rc;
  870. struct physdev_get_free_pirq op_get_free_pirq;
  871. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  872. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  873. WARN_ONCE(rc == -ENOSYS,
  874. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  875. return rc ? -1 : op_get_free_pirq.pirq;
  876. }
  877. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  878. int pirq, int nvec, const char *name, domid_t domid)
  879. {
  880. int i, irq, ret;
  881. struct irq_info *info;
  882. mutex_lock(&irq_mapping_update_lock);
  883. irq = irq_alloc_descs(-1, 0, nvec, -1);
  884. if (irq < 0)
  885. goto out;
  886. for (i = 0; i < nvec; i++) {
  887. info = xen_irq_init(irq + i);
  888. if (!info) {
  889. ret = -ENOMEM;
  890. goto error_irq;
  891. }
  892. irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
  893. ret = xen_irq_info_pirq_setup(info, 0, pirq + i, 0, domid,
  894. i == 0 ? 0 : PIRQ_MSI_GROUP);
  895. if (ret < 0)
  896. goto error_irq;
  897. }
  898. ret = irq_set_msi_desc(irq, msidesc);
  899. if (ret < 0)
  900. goto error_irq;
  901. out:
  902. mutex_unlock(&irq_mapping_update_lock);
  903. return irq;
  904. error_irq:
  905. while (nvec--) {
  906. info = info_for_irq(irq + nvec);
  907. __unbind_from_irq(info, irq + nvec);
  908. }
  909. mutex_unlock(&irq_mapping_update_lock);
  910. return ret;
  911. }
  912. #endif
  913. int xen_destroy_irq(int irq)
  914. {
  915. struct physdev_unmap_pirq unmap_irq;
  916. struct irq_info *info = info_for_irq(irq);
  917. int rc = -ENOENT;
  918. mutex_lock(&irq_mapping_update_lock);
  919. /*
  920. * If trying to remove a vector in a MSI group different
  921. * than the first one skip the PIRQ unmap unless this vector
  922. * is the first one in the group.
  923. */
  924. if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
  925. unmap_irq.pirq = info->u.pirq.pirq;
  926. unmap_irq.domid = info->u.pirq.domid;
  927. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  928. /* If another domain quits without making the pci_disable_msix
  929. * call, the Xen hypervisor takes care of freeing the PIRQs
  930. * (free_domain_pirqs).
  931. */
  932. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  933. pr_info("domain %d does not have %d anymore\n",
  934. info->u.pirq.domid, info->u.pirq.pirq);
  935. else if (rc) {
  936. pr_warn("unmap irq failed %d\n", rc);
  937. goto out;
  938. }
  939. }
  940. xen_free_irq(info);
  941. out:
  942. mutex_unlock(&irq_mapping_update_lock);
  943. return rc;
  944. }
  945. int xen_pirq_from_irq(unsigned irq)
  946. {
  947. struct irq_info *info = info_for_irq(irq);
  948. return pirq_from_irq(info);
  949. }
  950. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  951. static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip,
  952. struct xenbus_device *dev, bool shared)
  953. {
  954. int ret = -ENOMEM;
  955. struct irq_info *info;
  956. if (evtchn >= xen_evtchn_max_channels())
  957. return -ENOMEM;
  958. mutex_lock(&irq_mapping_update_lock);
  959. info = evtchn_to_info(evtchn);
  960. if (!info) {
  961. info = xen_allocate_irq_dynamic();
  962. if (!info)
  963. goto out;
  964. irq_set_chip_and_handler_name(info->irq, chip,
  965. handle_edge_irq, "event");
  966. ret = xen_irq_info_evtchn_setup(info, evtchn, dev);
  967. if (ret < 0) {
  968. __unbind_from_irq(info, info->irq);
  969. goto out;
  970. }
  971. /*
  972. * New interdomain events are initially bound to vCPU0 This
  973. * is required to setup the event channel in the first
  974. * place and also important for UP guests because the
  975. * affinity setting is not invoked on them so nothing would
  976. * bind the channel.
  977. */
  978. bind_evtchn_to_cpu(info, 0, false);
  979. } else if (!WARN_ON(info->type != IRQT_EVTCHN)) {
  980. if (shared && !WARN_ON(info->refcnt < 0))
  981. info->refcnt++;
  982. }
  983. ret = info->irq;
  984. out:
  985. mutex_unlock(&irq_mapping_update_lock);
  986. return ret;
  987. }
  988. int bind_evtchn_to_irq(evtchn_port_t evtchn)
  989. {
  990. return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip, NULL, false);
  991. }
  992. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  993. int bind_evtchn_to_irq_lateeoi(evtchn_port_t evtchn)
  994. {
  995. return bind_evtchn_to_irq_chip(evtchn, &xen_lateeoi_chip, NULL, false);
  996. }
  997. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq_lateeoi);
  998. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  999. {
  1000. struct evtchn_bind_ipi bind_ipi;
  1001. evtchn_port_t evtchn;
  1002. struct irq_info *info;
  1003. int ret;
  1004. mutex_lock(&irq_mapping_update_lock);
  1005. ret = per_cpu(ipi_to_irq, cpu)[ipi];
  1006. if (ret == -1) {
  1007. info = xen_allocate_irq_dynamic();
  1008. if (!info)
  1009. goto out;
  1010. irq_set_chip_and_handler_name(info->irq, &xen_percpu_chip,
  1011. handle_percpu_irq, "ipi");
  1012. bind_ipi.vcpu = xen_vcpu_nr(cpu);
  1013. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1014. &bind_ipi) != 0)
  1015. BUG();
  1016. evtchn = bind_ipi.port;
  1017. ret = xen_irq_info_ipi_setup(info, cpu, evtchn, ipi);
  1018. if (ret < 0) {
  1019. __unbind_from_irq(info, info->irq);
  1020. goto out;
  1021. }
  1022. /*
  1023. * Force the affinity mask to the target CPU so proc shows
  1024. * the correct target.
  1025. */
  1026. bind_evtchn_to_cpu(info, cpu, true);
  1027. ret = info->irq;
  1028. } else {
  1029. info = info_for_irq(ret);
  1030. WARN_ON(info == NULL || info->type != IRQT_IPI);
  1031. }
  1032. out:
  1033. mutex_unlock(&irq_mapping_update_lock);
  1034. return ret;
  1035. }
  1036. static int bind_interdomain_evtchn_to_irq_chip(struct xenbus_device *dev,
  1037. evtchn_port_t remote_port,
  1038. struct irq_chip *chip,
  1039. bool shared)
  1040. {
  1041. struct evtchn_bind_interdomain bind_interdomain;
  1042. int err;
  1043. bind_interdomain.remote_dom = dev->otherend_id;
  1044. bind_interdomain.remote_port = remote_port;
  1045. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  1046. &bind_interdomain);
  1047. return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port,
  1048. chip, dev, shared);
  1049. }
  1050. int bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device *dev,
  1051. evtchn_port_t remote_port)
  1052. {
  1053. return bind_interdomain_evtchn_to_irq_chip(dev, remote_port,
  1054. &xen_lateeoi_chip, false);
  1055. }
  1056. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi);
  1057. static int find_virq(unsigned int virq, unsigned int cpu, evtchn_port_t *evtchn,
  1058. bool percpu)
  1059. {
  1060. struct evtchn_status status;
  1061. evtchn_port_t port;
  1062. bool exists = false;
  1063. memset(&status, 0, sizeof(status));
  1064. for (port = 0; port < xen_evtchn_max_channels(); port++) {
  1065. int rc;
  1066. status.dom = DOMID_SELF;
  1067. status.port = port;
  1068. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  1069. if (rc < 0)
  1070. continue;
  1071. if (status.status != EVTCHNSTAT_virq)
  1072. continue;
  1073. if (status.u.virq != virq)
  1074. continue;
  1075. if (status.vcpu == xen_vcpu_nr(cpu)) {
  1076. *evtchn = port;
  1077. return 0;
  1078. } else if (!percpu) {
  1079. exists = true;
  1080. }
  1081. }
  1082. return exists ? -EEXIST : -ENOENT;
  1083. }
  1084. /**
  1085. * xen_evtchn_nr_channels - number of usable event channel ports
  1086. *
  1087. * This may be less than the maximum supported by the current
  1088. * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
  1089. * supported.
  1090. */
  1091. unsigned xen_evtchn_nr_channels(void)
  1092. {
  1093. return evtchn_ops->nr_channels();
  1094. }
  1095. EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
  1096. int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
  1097. {
  1098. struct evtchn_bind_virq bind_virq;
  1099. evtchn_port_t evtchn = 0;
  1100. struct irq_info *info;
  1101. int ret;
  1102. mutex_lock(&irq_mapping_update_lock);
  1103. ret = per_cpu(virq_to_irq, cpu)[virq];
  1104. if (ret == -1) {
  1105. info = xen_allocate_irq_dynamic();
  1106. if (!info)
  1107. goto out;
  1108. if (percpu)
  1109. irq_set_chip_and_handler_name(info->irq, &xen_percpu_chip,
  1110. handle_percpu_irq, "virq");
  1111. else
  1112. irq_set_chip_and_handler_name(info->irq, &xen_dynamic_chip,
  1113. handle_edge_irq, "virq");
  1114. bind_virq.virq = virq;
  1115. bind_virq.vcpu = xen_vcpu_nr(cpu);
  1116. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1117. &bind_virq);
  1118. if (ret == 0)
  1119. evtchn = bind_virq.port;
  1120. else {
  1121. if (ret == -EEXIST)
  1122. ret = find_virq(virq, cpu, &evtchn, percpu);
  1123. if (ret) {
  1124. __unbind_from_irq(info, info->irq);
  1125. goto out;
  1126. }
  1127. }
  1128. ret = xen_irq_info_virq_setup(info, cpu, evtchn, virq);
  1129. if (ret < 0) {
  1130. __unbind_from_irq(info, info->irq);
  1131. goto out;
  1132. }
  1133. /*
  1134. * Force the affinity mask for percpu interrupts so proc
  1135. * shows the correct target.
  1136. */
  1137. bind_evtchn_to_cpu(info, cpu, percpu);
  1138. ret = info->irq;
  1139. } else {
  1140. info = info_for_irq(ret);
  1141. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  1142. }
  1143. out:
  1144. mutex_unlock(&irq_mapping_update_lock);
  1145. return ret;
  1146. }
  1147. static void unbind_from_irq(unsigned int irq)
  1148. {
  1149. struct irq_info *info;
  1150. mutex_lock(&irq_mapping_update_lock);
  1151. info = info_for_irq(irq);
  1152. __unbind_from_irq(info, irq);
  1153. mutex_unlock(&irq_mapping_update_lock);
  1154. }
  1155. static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn,
  1156. irq_handler_t handler,
  1157. unsigned long irqflags,
  1158. const char *devname, void *dev_id,
  1159. struct irq_chip *chip)
  1160. {
  1161. int irq, retval;
  1162. irq = bind_evtchn_to_irq_chip(evtchn, chip, NULL,
  1163. irqflags & IRQF_SHARED);
  1164. if (irq < 0)
  1165. return irq;
  1166. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1167. if (retval != 0) {
  1168. unbind_from_irq(irq);
  1169. return retval;
  1170. }
  1171. return irq;
  1172. }
  1173. int bind_evtchn_to_irqhandler(evtchn_port_t evtchn,
  1174. irq_handler_t handler,
  1175. unsigned long irqflags,
  1176. const char *devname, void *dev_id)
  1177. {
  1178. return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
  1179. devname, dev_id,
  1180. &xen_dynamic_chip);
  1181. }
  1182. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  1183. int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn,
  1184. irq_handler_t handler,
  1185. unsigned long irqflags,
  1186. const char *devname, void *dev_id)
  1187. {
  1188. return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
  1189. devname, dev_id,
  1190. &xen_lateeoi_chip);
  1191. }
  1192. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi);
  1193. static int bind_interdomain_evtchn_to_irqhandler_chip(
  1194. struct xenbus_device *dev, evtchn_port_t remote_port,
  1195. irq_handler_t handler, unsigned long irqflags,
  1196. const char *devname, void *dev_id, struct irq_chip *chip)
  1197. {
  1198. int irq, retval;
  1199. irq = bind_interdomain_evtchn_to_irq_chip(dev, remote_port, chip,
  1200. irqflags & IRQF_SHARED);
  1201. if (irq < 0)
  1202. return irq;
  1203. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1204. if (retval != 0) {
  1205. unbind_from_irq(irq);
  1206. return retval;
  1207. }
  1208. return irq;
  1209. }
  1210. int bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device *dev,
  1211. evtchn_port_t remote_port,
  1212. irq_handler_t handler,
  1213. unsigned long irqflags,
  1214. const char *devname,
  1215. void *dev_id)
  1216. {
  1217. return bind_interdomain_evtchn_to_irqhandler_chip(dev,
  1218. remote_port, handler, irqflags, devname,
  1219. dev_id, &xen_lateeoi_chip);
  1220. }
  1221. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi);
  1222. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  1223. irq_handler_t handler,
  1224. unsigned long irqflags, const char *devname, void *dev_id)
  1225. {
  1226. int irq, retval;
  1227. irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
  1228. if (irq < 0)
  1229. return irq;
  1230. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1231. if (retval != 0) {
  1232. unbind_from_irq(irq);
  1233. return retval;
  1234. }
  1235. return irq;
  1236. }
  1237. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  1238. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  1239. unsigned int cpu,
  1240. irq_handler_t handler,
  1241. unsigned long irqflags,
  1242. const char *devname,
  1243. void *dev_id)
  1244. {
  1245. int irq, retval;
  1246. irq = bind_ipi_to_irq(ipi, cpu);
  1247. if (irq < 0)
  1248. return irq;
  1249. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  1250. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1251. if (retval != 0) {
  1252. unbind_from_irq(irq);
  1253. return retval;
  1254. }
  1255. return irq;
  1256. }
  1257. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  1258. {
  1259. struct irq_info *info = info_for_irq(irq);
  1260. if (WARN_ON(!info))
  1261. return;
  1262. free_irq(irq, dev_id);
  1263. unbind_from_irq(irq);
  1264. }
  1265. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  1266. /**
  1267. * xen_set_irq_priority() - set an event channel priority.
  1268. * @irq:irq bound to an event channel.
  1269. * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
  1270. */
  1271. int xen_set_irq_priority(unsigned irq, unsigned priority)
  1272. {
  1273. struct evtchn_set_priority set_priority;
  1274. set_priority.port = evtchn_from_irq(irq);
  1275. set_priority.priority = priority;
  1276. return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
  1277. &set_priority);
  1278. }
  1279. EXPORT_SYMBOL_GPL(xen_set_irq_priority);
  1280. int evtchn_make_refcounted(evtchn_port_t evtchn, bool is_static)
  1281. {
  1282. struct irq_info *info = evtchn_to_info(evtchn);
  1283. if (!info)
  1284. return -ENOENT;
  1285. WARN_ON(info->refcnt != -1);
  1286. info->refcnt = 1;
  1287. info->is_static = is_static;
  1288. return 0;
  1289. }
  1290. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  1291. int evtchn_get(evtchn_port_t evtchn)
  1292. {
  1293. struct irq_info *info;
  1294. int err = -ENOENT;
  1295. if (evtchn >= xen_evtchn_max_channels())
  1296. return -EINVAL;
  1297. mutex_lock(&irq_mapping_update_lock);
  1298. info = evtchn_to_info(evtchn);
  1299. if (!info)
  1300. goto done;
  1301. err = -EINVAL;
  1302. if (info->refcnt <= 0 || info->refcnt == SHRT_MAX)
  1303. goto done;
  1304. info->refcnt++;
  1305. err = 0;
  1306. done:
  1307. mutex_unlock(&irq_mapping_update_lock);
  1308. return err;
  1309. }
  1310. EXPORT_SYMBOL_GPL(evtchn_get);
  1311. void evtchn_put(evtchn_port_t evtchn)
  1312. {
  1313. struct irq_info *info = evtchn_to_info(evtchn);
  1314. if (WARN_ON(!info))
  1315. return;
  1316. unbind_from_irq(info->irq);
  1317. }
  1318. EXPORT_SYMBOL_GPL(evtchn_put);
  1319. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  1320. {
  1321. evtchn_port_t evtchn;
  1322. #ifdef CONFIG_X86
  1323. if (unlikely(vector == XEN_NMI_VECTOR)) {
  1324. int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu),
  1325. NULL);
  1326. if (rc < 0)
  1327. printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
  1328. return;
  1329. }
  1330. #endif
  1331. evtchn = per_cpu(ipi_to_evtchn, cpu)[vector];
  1332. BUG_ON(evtchn == 0);
  1333. notify_remote_via_evtchn(evtchn);
  1334. }
  1335. struct evtchn_loop_ctrl {
  1336. ktime_t timeout;
  1337. unsigned count;
  1338. bool defer_eoi;
  1339. };
  1340. void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl)
  1341. {
  1342. struct irq_info *info = evtchn_to_info(port);
  1343. struct xenbus_device *dev;
  1344. if (!info)
  1345. return;
  1346. /*
  1347. * Check for timeout every 256 events.
  1348. * We are setting the timeout value only after the first 256
  1349. * events in order to not hurt the common case of few loop
  1350. * iterations. The 256 is basically an arbitrary value.
  1351. *
  1352. * In case we are hitting the timeout we need to defer all further
  1353. * EOIs in order to ensure to leave the event handling loop rather
  1354. * sooner than later.
  1355. */
  1356. if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) {
  1357. ktime_t kt = ktime_get();
  1358. if (!ctrl->timeout) {
  1359. kt = ktime_add_ms(kt,
  1360. jiffies_to_msecs(event_loop_timeout));
  1361. ctrl->timeout = kt;
  1362. } else if (kt > ctrl->timeout) {
  1363. ctrl->defer_eoi = true;
  1364. }
  1365. }
  1366. if (xchg_acquire(&info->is_active, 1))
  1367. return;
  1368. dev = (info->type == IRQT_EVTCHN) ? info->u.interdomain : NULL;
  1369. if (dev)
  1370. atomic_inc(&dev->events);
  1371. if (ctrl->defer_eoi) {
  1372. info->eoi_cpu = smp_processor_id();
  1373. info->irq_epoch = __this_cpu_read(irq_epoch);
  1374. info->eoi_time = get_jiffies_64() + event_eoi_delay;
  1375. }
  1376. generic_handle_irq(info->irq);
  1377. }
  1378. int xen_evtchn_do_upcall(void)
  1379. {
  1380. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1381. int ret = vcpu_info->evtchn_upcall_pending ? IRQ_HANDLED : IRQ_NONE;
  1382. int cpu = smp_processor_id();
  1383. struct evtchn_loop_ctrl ctrl = { 0 };
  1384. /*
  1385. * When closing an event channel the associated IRQ must not be freed
  1386. * until all cpus have left the event handling loop. This is ensured
  1387. * by taking the rcu_read_lock() while handling events, as freeing of
  1388. * the IRQ is handled via queue_rcu_work() _after_ closing the event
  1389. * channel.
  1390. */
  1391. rcu_read_lock();
  1392. do {
  1393. vcpu_info->evtchn_upcall_pending = 0;
  1394. xen_evtchn_handle_events(cpu, &ctrl);
  1395. BUG_ON(!irqs_disabled());
  1396. virt_rmb(); /* Hypervisor can set upcall pending. */
  1397. } while (vcpu_info->evtchn_upcall_pending);
  1398. rcu_read_unlock();
  1399. /*
  1400. * Increment irq_epoch only now to defer EOIs only for
  1401. * xen_irq_lateeoi() invocations occurring from inside the loop
  1402. * above.
  1403. */
  1404. __this_cpu_inc(irq_epoch);
  1405. return ret;
  1406. }
  1407. EXPORT_SYMBOL_GPL(xen_evtchn_do_upcall);
  1408. /* Rebind a new event channel to an existing irq. */
  1409. void rebind_evtchn_irq(evtchn_port_t evtchn, int irq)
  1410. {
  1411. struct irq_info *info = info_for_irq(irq);
  1412. if (WARN_ON(!info))
  1413. return;
  1414. /* Make sure the irq is masked, since the new event channel
  1415. will also be masked. */
  1416. disable_irq(irq);
  1417. mutex_lock(&irq_mapping_update_lock);
  1418. /* After resume the irq<->evtchn mappings are all cleared out */
  1419. BUG_ON(evtchn_to_info(evtchn));
  1420. /* Expect irq to have been bound before,
  1421. so there should be a proper type */
  1422. BUG_ON(info->type == IRQT_UNBOUND);
  1423. info->irq = irq;
  1424. (void)xen_irq_info_evtchn_setup(info, evtchn, NULL);
  1425. mutex_unlock(&irq_mapping_update_lock);
  1426. bind_evtchn_to_cpu(info, info->cpu, false);
  1427. /* Unmask the event channel. */
  1428. enable_irq(irq);
  1429. }
  1430. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1431. static int xen_rebind_evtchn_to_cpu(struct irq_info *info, unsigned int tcpu)
  1432. {
  1433. struct evtchn_bind_vcpu bind_vcpu;
  1434. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1435. if (!VALID_EVTCHN(evtchn))
  1436. return -1;
  1437. if (!xen_support_evtchn_rebind())
  1438. return -1;
  1439. /* Send future instances of this interrupt to other vcpu. */
  1440. bind_vcpu.port = evtchn;
  1441. bind_vcpu.vcpu = xen_vcpu_nr(tcpu);
  1442. /*
  1443. * Mask the event while changing the VCPU binding to prevent
  1444. * it being delivered on an unexpected VCPU.
  1445. */
  1446. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1447. /*
  1448. * If this fails, it usually just indicates that we're dealing with a
  1449. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1450. * it, but don't do the xenlinux-level rebind in that case.
  1451. */
  1452. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0) {
  1453. int old_cpu = info->cpu;
  1454. bind_evtchn_to_cpu(info, tcpu, false);
  1455. if (info->type == IRQT_VIRQ) {
  1456. int virq = info->u.virq;
  1457. int irq = per_cpu(virq_to_irq, old_cpu)[virq];
  1458. per_cpu(virq_to_irq, old_cpu)[virq] = -1;
  1459. per_cpu(virq_to_irq, tcpu)[virq] = irq;
  1460. }
  1461. }
  1462. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1463. return 0;
  1464. }
  1465. /*
  1466. * Find the CPU within @dest mask which has the least number of channels
  1467. * assigned. This is not precise as the per cpu counts can be modified
  1468. * concurrently.
  1469. */
  1470. static unsigned int select_target_cpu(const struct cpumask *dest)
  1471. {
  1472. unsigned int cpu, best_cpu = UINT_MAX, minch = UINT_MAX;
  1473. for_each_cpu_and(cpu, dest, cpu_online_mask) {
  1474. unsigned int curch = atomic_read(&channels_on_cpu[cpu]);
  1475. if (curch < minch) {
  1476. minch = curch;
  1477. best_cpu = cpu;
  1478. }
  1479. }
  1480. /*
  1481. * Catch the unlikely case that dest contains no online CPUs. Can't
  1482. * recurse.
  1483. */
  1484. if (best_cpu == UINT_MAX)
  1485. return select_target_cpu(cpu_online_mask);
  1486. return best_cpu;
  1487. }
  1488. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1489. bool force)
  1490. {
  1491. unsigned int tcpu = select_target_cpu(dest);
  1492. int ret;
  1493. ret = xen_rebind_evtchn_to_cpu(info_for_irq(data->irq), tcpu);
  1494. if (!ret)
  1495. irq_data_update_effective_affinity(data, cpumask_of(tcpu));
  1496. return ret;
  1497. }
  1498. static void enable_dynirq(struct irq_data *data)
  1499. {
  1500. struct irq_info *info = info_for_irq(data->irq);
  1501. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1502. if (VALID_EVTCHN(evtchn))
  1503. do_unmask(info, EVT_MASK_REASON_EXPLICIT);
  1504. }
  1505. static void do_ack_dynirq(struct irq_info *info)
  1506. {
  1507. evtchn_port_t evtchn = info->evtchn;
  1508. if (VALID_EVTCHN(evtchn))
  1509. event_handler_exit(info);
  1510. }
  1511. static void ack_dynirq(struct irq_data *data)
  1512. {
  1513. struct irq_info *info = info_for_irq(data->irq);
  1514. if (info)
  1515. do_ack_dynirq(info);
  1516. }
  1517. static void mask_ack_dynirq(struct irq_data *data)
  1518. {
  1519. struct irq_info *info = info_for_irq(data->irq);
  1520. if (info) {
  1521. do_disable_dynirq(info);
  1522. do_ack_dynirq(info);
  1523. }
  1524. }
  1525. static void lateeoi_ack_dynirq(struct irq_data *data)
  1526. {
  1527. struct irq_info *info = info_for_irq(data->irq);
  1528. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1529. if (VALID_EVTCHN(evtchn)) {
  1530. do_mask(info, EVT_MASK_REASON_EOI_PENDING);
  1531. /*
  1532. * Don't call event_handler_exit().
  1533. * Need to keep is_active non-zero in order to ignore re-raised
  1534. * events after cpu affinity changes while a lateeoi is pending.
  1535. */
  1536. clear_evtchn(evtchn);
  1537. }
  1538. }
  1539. static void lateeoi_mask_ack_dynirq(struct irq_data *data)
  1540. {
  1541. struct irq_info *info = info_for_irq(data->irq);
  1542. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1543. if (VALID_EVTCHN(evtchn)) {
  1544. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  1545. event_handler_exit(info);
  1546. }
  1547. }
  1548. static int retrigger_dynirq(struct irq_data *data)
  1549. {
  1550. struct irq_info *info = info_for_irq(data->irq);
  1551. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1552. if (!VALID_EVTCHN(evtchn))
  1553. return 0;
  1554. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1555. set_evtchn(evtchn);
  1556. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1557. return 1;
  1558. }
  1559. static void restore_pirqs(void)
  1560. {
  1561. int pirq, rc, irq, gsi;
  1562. struct physdev_map_pirq map_irq;
  1563. struct irq_info *info;
  1564. list_for_each_entry(info, &xen_irq_list_head, list) {
  1565. if (info->type != IRQT_PIRQ)
  1566. continue;
  1567. pirq = info->u.pirq.pirq;
  1568. gsi = info->u.pirq.gsi;
  1569. irq = info->irq;
  1570. /* save/restore of PT devices doesn't work, so at this point the
  1571. * only devices present are GSI based emulated devices */
  1572. if (!gsi)
  1573. continue;
  1574. map_irq.domid = DOMID_SELF;
  1575. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1576. map_irq.index = gsi;
  1577. map_irq.pirq = pirq;
  1578. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1579. if (rc) {
  1580. pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1581. gsi, irq, pirq, rc);
  1582. xen_free_irq(info);
  1583. continue;
  1584. }
  1585. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1586. __startup_pirq(info);
  1587. }
  1588. }
  1589. static void restore_cpu_virqs(unsigned int cpu)
  1590. {
  1591. struct evtchn_bind_virq bind_virq;
  1592. evtchn_port_t evtchn;
  1593. struct irq_info *info;
  1594. int virq, irq;
  1595. for (virq = 0; virq < NR_VIRQS; virq++) {
  1596. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1597. continue;
  1598. info = info_for_irq(irq);
  1599. BUG_ON(virq_from_irq(info) != virq);
  1600. /* Get a new binding from Xen. */
  1601. bind_virq.virq = virq;
  1602. bind_virq.vcpu = xen_vcpu_nr(cpu);
  1603. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1604. &bind_virq) != 0)
  1605. BUG();
  1606. evtchn = bind_virq.port;
  1607. /* Record the new mapping. */
  1608. xen_irq_info_virq_setup(info, cpu, evtchn, virq);
  1609. /* The affinity mask is still valid */
  1610. bind_evtchn_to_cpu(info, cpu, false);
  1611. }
  1612. }
  1613. static void restore_cpu_ipis(unsigned int cpu)
  1614. {
  1615. struct evtchn_bind_ipi bind_ipi;
  1616. evtchn_port_t evtchn;
  1617. struct irq_info *info;
  1618. int ipi, irq;
  1619. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1620. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1621. continue;
  1622. info = info_for_irq(irq);
  1623. BUG_ON(ipi_from_irq(info) != ipi);
  1624. /* Get a new binding from Xen. */
  1625. bind_ipi.vcpu = xen_vcpu_nr(cpu);
  1626. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1627. &bind_ipi) != 0)
  1628. BUG();
  1629. evtchn = bind_ipi.port;
  1630. /* Record the new mapping. */
  1631. xen_irq_info_ipi_setup(info, cpu, evtchn, ipi);
  1632. /* The affinity mask is still valid */
  1633. bind_evtchn_to_cpu(info, cpu, false);
  1634. }
  1635. }
  1636. /* Clear an irq's pending state, in preparation for polling on it */
  1637. void xen_clear_irq_pending(int irq)
  1638. {
  1639. struct irq_info *info = info_for_irq(irq);
  1640. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1641. if (VALID_EVTCHN(evtchn))
  1642. event_handler_exit(info);
  1643. }
  1644. EXPORT_SYMBOL(xen_clear_irq_pending);
  1645. bool xen_test_irq_pending(int irq)
  1646. {
  1647. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1648. bool ret = false;
  1649. if (VALID_EVTCHN(evtchn))
  1650. ret = test_evtchn(evtchn);
  1651. return ret;
  1652. }
  1653. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1654. * the irq will be disabled so it won't deliver an interrupt. */
  1655. void xen_poll_irq_timeout(int irq, u64 timeout)
  1656. {
  1657. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1658. if (VALID_EVTCHN(evtchn)) {
  1659. struct sched_poll poll;
  1660. poll.nr_ports = 1;
  1661. poll.timeout = timeout;
  1662. set_xen_guest_handle(poll.ports, &evtchn);
  1663. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1664. BUG();
  1665. }
  1666. }
  1667. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1668. /* Poll waiting for an irq to become pending. In the usual case, the
  1669. * irq will be disabled so it won't deliver an interrupt. */
  1670. void xen_poll_irq(int irq)
  1671. {
  1672. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1673. }
  1674. /* Check whether the IRQ line is shared with other guests. */
  1675. int xen_test_irq_shared(int irq)
  1676. {
  1677. struct irq_info *info = info_for_irq(irq);
  1678. struct physdev_irq_status_query irq_status;
  1679. if (WARN_ON(!info))
  1680. return -ENOENT;
  1681. irq_status.irq = info->u.pirq.pirq;
  1682. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1683. return 0;
  1684. return !(irq_status.flags & XENIRQSTAT_shared);
  1685. }
  1686. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1687. void xen_irq_resume(void)
  1688. {
  1689. unsigned int cpu;
  1690. struct irq_info *info;
  1691. /* New event-channel space is not 'live' yet. */
  1692. xen_evtchn_resume();
  1693. /* No IRQ <-> event-channel mappings. */
  1694. list_for_each_entry(info, &xen_irq_list_head, list) {
  1695. /* Zap event-channel binding */
  1696. info->evtchn = 0;
  1697. /* Adjust accounting */
  1698. channels_on_cpu_dec(info);
  1699. }
  1700. clear_evtchn_to_irq_all();
  1701. for_each_possible_cpu(cpu) {
  1702. restore_cpu_virqs(cpu);
  1703. restore_cpu_ipis(cpu);
  1704. }
  1705. restore_pirqs();
  1706. }
  1707. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1708. .name = "xen-dyn",
  1709. .irq_disable = disable_dynirq,
  1710. .irq_mask = disable_dynirq,
  1711. .irq_unmask = enable_dynirq,
  1712. .irq_ack = ack_dynirq,
  1713. .irq_mask_ack = mask_ack_dynirq,
  1714. .irq_set_affinity = set_affinity_irq,
  1715. .irq_retrigger = retrigger_dynirq,
  1716. };
  1717. static struct irq_chip xen_lateeoi_chip __read_mostly = {
  1718. /* The chip name needs to contain "xen-dyn" for irqbalance to work. */
  1719. .name = "xen-dyn-lateeoi",
  1720. .irq_disable = disable_dynirq,
  1721. .irq_mask = disable_dynirq,
  1722. .irq_unmask = enable_dynirq,
  1723. .irq_ack = lateeoi_ack_dynirq,
  1724. .irq_mask_ack = lateeoi_mask_ack_dynirq,
  1725. .irq_set_affinity = set_affinity_irq,
  1726. .irq_retrigger = retrigger_dynirq,
  1727. };
  1728. static struct irq_chip xen_pirq_chip __read_mostly = {
  1729. .name = "xen-pirq",
  1730. .irq_startup = startup_pirq,
  1731. .irq_shutdown = shutdown_pirq,
  1732. .irq_enable = enable_pirq,
  1733. .irq_disable = disable_pirq,
  1734. .irq_mask = disable_dynirq,
  1735. .irq_unmask = enable_dynirq,
  1736. .irq_ack = eoi_pirq,
  1737. .irq_eoi = eoi_pirq,
  1738. .irq_mask_ack = mask_ack_pirq,
  1739. .irq_set_affinity = set_affinity_irq,
  1740. .irq_retrigger = retrigger_dynirq,
  1741. };
  1742. static struct irq_chip xen_percpu_chip __read_mostly = {
  1743. .name = "xen-percpu",
  1744. .irq_disable = disable_dynirq,
  1745. .irq_mask = disable_dynirq,
  1746. .irq_unmask = enable_dynirq,
  1747. .irq_ack = ack_dynirq,
  1748. };
  1749. #ifdef CONFIG_X86
  1750. #ifdef CONFIG_XEN_PVHVM
  1751. /* Vector callbacks are better than PCI interrupts to receive event
  1752. * channel notifications because we can receive vector callbacks on any
  1753. * vcpu and we don't need PCI support or APIC interactions. */
  1754. void xen_setup_callback_vector(void)
  1755. {
  1756. uint64_t callback_via;
  1757. if (xen_have_vector_callback) {
  1758. callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
  1759. if (xen_set_callback_via(callback_via)) {
  1760. pr_err("Request for Xen HVM callback vector failed\n");
  1761. xen_have_vector_callback = false;
  1762. }
  1763. }
  1764. }
  1765. /*
  1766. * Setup per-vCPU vector-type callbacks. If this setup is unavailable,
  1767. * fallback to the global vector-type callback.
  1768. */
  1769. static __init void xen_init_setup_upcall_vector(void)
  1770. {
  1771. if (!xen_have_vector_callback)
  1772. return;
  1773. if ((cpuid_eax(xen_cpuid_base() + 4) & XEN_HVM_CPUID_UPCALL_VECTOR) &&
  1774. !xen_set_upcall_vector(0))
  1775. xen_percpu_upcall = true;
  1776. else if (xen_feature(XENFEAT_hvm_callback_vector))
  1777. xen_setup_callback_vector();
  1778. else
  1779. xen_have_vector_callback = false;
  1780. }
  1781. int xen_set_upcall_vector(unsigned int cpu)
  1782. {
  1783. int rc;
  1784. xen_hvm_evtchn_upcall_vector_t op = {
  1785. .vector = HYPERVISOR_CALLBACK_VECTOR,
  1786. .vcpu = per_cpu(xen_vcpu_id, cpu),
  1787. };
  1788. rc = HYPERVISOR_hvm_op(HVMOP_set_evtchn_upcall_vector, &op);
  1789. if (rc)
  1790. return rc;
  1791. /* Trick toolstack to think we are enlightened. */
  1792. if (!cpu)
  1793. rc = xen_set_callback_via(1);
  1794. return rc;
  1795. }
  1796. static __init void xen_alloc_callback_vector(void)
  1797. {
  1798. if (!xen_have_vector_callback)
  1799. return;
  1800. pr_info("Xen HVM callback vector for event delivery is enabled\n");
  1801. sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_xen_hvm_callback);
  1802. }
  1803. #else
  1804. void xen_setup_callback_vector(void) {}
  1805. static inline void xen_init_setup_upcall_vector(void) {}
  1806. int xen_set_upcall_vector(unsigned int cpu) {}
  1807. static inline void xen_alloc_callback_vector(void) {}
  1808. #endif /* CONFIG_XEN_PVHVM */
  1809. #endif /* CONFIG_X86 */
  1810. bool xen_fifo_events = true;
  1811. module_param_named(fifo_events, xen_fifo_events, bool, 0);
  1812. static int xen_evtchn_cpu_prepare(unsigned int cpu)
  1813. {
  1814. int ret = 0;
  1815. xen_cpu_init_eoi(cpu);
  1816. if (evtchn_ops->percpu_init)
  1817. ret = evtchn_ops->percpu_init(cpu);
  1818. return ret;
  1819. }
  1820. static int xen_evtchn_cpu_dead(unsigned int cpu)
  1821. {
  1822. int ret = 0;
  1823. if (evtchn_ops->percpu_deinit)
  1824. ret = evtchn_ops->percpu_deinit(cpu);
  1825. return ret;
  1826. }
  1827. void __init xen_init_IRQ(void)
  1828. {
  1829. int ret = -EINVAL;
  1830. evtchn_port_t evtchn;
  1831. if (xen_fifo_events)
  1832. ret = xen_evtchn_fifo_init();
  1833. if (ret < 0) {
  1834. xen_evtchn_2l_init();
  1835. xen_fifo_events = false;
  1836. }
  1837. xen_cpu_init_eoi(smp_processor_id());
  1838. cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE,
  1839. "xen/evtchn:prepare",
  1840. xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead);
  1841. evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
  1842. sizeof(*evtchn_to_irq), GFP_KERNEL);
  1843. BUG_ON(!evtchn_to_irq);
  1844. /* No event channels are 'live' right now. */
  1845. for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
  1846. mask_evtchn(evtchn);
  1847. pirq_needs_eoi = pirq_needs_eoi_flag;
  1848. #ifdef CONFIG_X86
  1849. if (xen_pv_domain()) {
  1850. if (xen_initial_domain())
  1851. pci_xen_initial_domain();
  1852. }
  1853. xen_init_setup_upcall_vector();
  1854. xen_alloc_callback_vector();
  1855. if (xen_hvm_domain()) {
  1856. native_init_IRQ();
  1857. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1858. * __acpi_register_gsi can point at the right function */
  1859. pci_xen_hvm_init();
  1860. } else {
  1861. int rc;
  1862. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1863. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1864. eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map);
  1865. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1866. if (rc != 0) {
  1867. free_page((unsigned long) pirq_eoi_map);
  1868. pirq_eoi_map = NULL;
  1869. } else
  1870. pirq_needs_eoi = pirq_check_eoi_map;
  1871. }
  1872. #endif
  1873. }