chip.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  4. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  5. *
  6. * This file contains the core interrupt handling code, for irq-chip based
  7. * architectures. Detailed information is available in
  8. * Documentation/core-api/genericirq.rst
  9. */
  10. #include <linux/irq.h>
  11. #include <linux/msi.h>
  12. #include <linux/module.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/irqdomain.h>
  16. #include <trace/events/irq.h>
  17. #include "internals.h"
  18. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  19. {
  20. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  21. return IRQ_NONE;
  22. }
  23. /*
  24. * Chained handlers should never call action on their IRQ. This default
  25. * action will emit warning if such thing happens.
  26. */
  27. struct irqaction chained_action = {
  28. .handler = bad_chained_irq,
  29. };
  30. /**
  31. * irq_set_chip - set the irq chip for an irq
  32. * @irq: irq number
  33. * @chip: pointer to irq chip description structure
  34. */
  35. int irq_set_chip(unsigned int irq, const struct irq_chip *chip)
  36. {
  37. unsigned long flags;
  38. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  39. if (!desc)
  40. return -EINVAL;
  41. desc->irq_data.chip = (struct irq_chip *)(chip ?: &no_irq_chip);
  42. irq_put_desc_unlock(desc, flags);
  43. /*
  44. * For !CONFIG_SPARSE_IRQ make the irq show up in
  45. * allocated_irqs.
  46. */
  47. irq_mark_irq(irq);
  48. return 0;
  49. }
  50. EXPORT_SYMBOL(irq_set_chip);
  51. /**
  52. * irq_set_irq_type - set the irq trigger type for an irq
  53. * @irq: irq number
  54. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  55. */
  56. int irq_set_irq_type(unsigned int irq, unsigned int type)
  57. {
  58. unsigned long flags;
  59. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  60. int ret = 0;
  61. if (!desc)
  62. return -EINVAL;
  63. ret = __irq_set_trigger(desc, type);
  64. irq_put_desc_busunlock(desc, flags);
  65. return ret;
  66. }
  67. EXPORT_SYMBOL(irq_set_irq_type);
  68. /**
  69. * irq_set_handler_data - set irq handler data for an irq
  70. * @irq: Interrupt number
  71. * @data: Pointer to interrupt specific data
  72. *
  73. * Set the hardware irq controller data for an irq
  74. */
  75. int irq_set_handler_data(unsigned int irq, void *data)
  76. {
  77. unsigned long flags;
  78. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  79. if (!desc)
  80. return -EINVAL;
  81. desc->irq_common_data.handler_data = data;
  82. irq_put_desc_unlock(desc, flags);
  83. return 0;
  84. }
  85. EXPORT_SYMBOL(irq_set_handler_data);
  86. /**
  87. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  88. * @irq_base: Interrupt number base
  89. * @irq_offset: Interrupt number offset
  90. * @entry: Pointer to MSI descriptor data
  91. *
  92. * Set the MSI descriptor entry for an irq at offset
  93. */
  94. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  95. struct msi_desc *entry)
  96. {
  97. unsigned long flags;
  98. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  99. if (!desc)
  100. return -EINVAL;
  101. desc->irq_common_data.msi_desc = entry;
  102. if (entry && !irq_offset)
  103. entry->irq = irq_base;
  104. irq_put_desc_unlock(desc, flags);
  105. return 0;
  106. }
  107. /**
  108. * irq_set_msi_desc - set MSI descriptor data for an irq
  109. * @irq: Interrupt number
  110. * @entry: Pointer to MSI descriptor data
  111. *
  112. * Set the MSI descriptor entry for an irq
  113. */
  114. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  115. {
  116. return irq_set_msi_desc_off(irq, 0, entry);
  117. }
  118. /**
  119. * irq_set_chip_data - set irq chip data for an irq
  120. * @irq: Interrupt number
  121. * @data: Pointer to chip specific data
  122. *
  123. * Set the hardware irq chip data for an irq
  124. */
  125. int irq_set_chip_data(unsigned int irq, void *data)
  126. {
  127. unsigned long flags;
  128. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  129. if (!desc)
  130. return -EINVAL;
  131. desc->irq_data.chip_data = data;
  132. irq_put_desc_unlock(desc, flags);
  133. return 0;
  134. }
  135. EXPORT_SYMBOL(irq_set_chip_data);
  136. struct irq_data *irq_get_irq_data(unsigned int irq)
  137. {
  138. struct irq_desc *desc = irq_to_desc(irq);
  139. return desc ? &desc->irq_data : NULL;
  140. }
  141. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  142. static void irq_state_clr_disabled(struct irq_desc *desc)
  143. {
  144. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  145. }
  146. static void irq_state_clr_masked(struct irq_desc *desc)
  147. {
  148. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  149. }
  150. static void irq_state_clr_started(struct irq_desc *desc)
  151. {
  152. irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
  153. }
  154. static void irq_state_set_started(struct irq_desc *desc)
  155. {
  156. irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
  157. }
  158. enum {
  159. IRQ_STARTUP_NORMAL,
  160. IRQ_STARTUP_MANAGED,
  161. IRQ_STARTUP_ABORT,
  162. };
  163. #ifdef CONFIG_SMP
  164. static int
  165. __irq_startup_managed(struct irq_desc *desc, const struct cpumask *aff,
  166. bool force)
  167. {
  168. struct irq_data *d = irq_desc_get_irq_data(desc);
  169. if (!irqd_affinity_is_managed(d))
  170. return IRQ_STARTUP_NORMAL;
  171. irqd_clr_managed_shutdown(d);
  172. if (!cpumask_intersects(aff, cpu_online_mask)) {
  173. /*
  174. * Catch code which fiddles with enable_irq() on a managed
  175. * and potentially shutdown IRQ. Chained interrupt
  176. * installment or irq auto probing should not happen on
  177. * managed irqs either.
  178. */
  179. if (WARN_ON_ONCE(force))
  180. return IRQ_STARTUP_ABORT;
  181. /*
  182. * The interrupt was requested, but there is no online CPU
  183. * in it's affinity mask. Put it into managed shutdown
  184. * state and let the cpu hotplug mechanism start it up once
  185. * a CPU in the mask becomes available.
  186. */
  187. return IRQ_STARTUP_ABORT;
  188. }
  189. /*
  190. * Managed interrupts have reserved resources, so this should not
  191. * happen.
  192. */
  193. if (WARN_ON(irq_domain_activate_irq(d, false)))
  194. return IRQ_STARTUP_ABORT;
  195. return IRQ_STARTUP_MANAGED;
  196. }
  197. #else
  198. static __always_inline int
  199. __irq_startup_managed(struct irq_desc *desc, const struct cpumask *aff,
  200. bool force)
  201. {
  202. return IRQ_STARTUP_NORMAL;
  203. }
  204. #endif
  205. static int __irq_startup(struct irq_desc *desc)
  206. {
  207. struct irq_data *d = irq_desc_get_irq_data(desc);
  208. int ret = 0;
  209. /* Warn if this interrupt is not activated but try nevertheless */
  210. WARN_ON_ONCE(!irqd_is_activated(d));
  211. if (d->chip->irq_startup) {
  212. ret = d->chip->irq_startup(d);
  213. irq_state_clr_disabled(desc);
  214. irq_state_clr_masked(desc);
  215. } else {
  216. irq_enable(desc);
  217. }
  218. irq_state_set_started(desc);
  219. return ret;
  220. }
  221. int irq_startup(struct irq_desc *desc, bool resend, bool force)
  222. {
  223. struct irq_data *d = irq_desc_get_irq_data(desc);
  224. const struct cpumask *aff = irq_data_get_affinity_mask(d);
  225. int ret = 0;
  226. desc->depth = 0;
  227. if (irqd_is_started(d)) {
  228. irq_enable(desc);
  229. } else {
  230. switch (__irq_startup_managed(desc, aff, force)) {
  231. case IRQ_STARTUP_NORMAL:
  232. if (d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP)
  233. irq_setup_affinity(desc);
  234. ret = __irq_startup(desc);
  235. if (!(d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP))
  236. irq_setup_affinity(desc);
  237. break;
  238. case IRQ_STARTUP_MANAGED:
  239. irq_do_set_affinity(d, aff, false);
  240. ret = __irq_startup(desc);
  241. break;
  242. case IRQ_STARTUP_ABORT:
  243. irqd_set_managed_shutdown(d);
  244. return 0;
  245. }
  246. }
  247. if (resend)
  248. check_irq_resend(desc, false);
  249. return ret;
  250. }
  251. int irq_activate(struct irq_desc *desc)
  252. {
  253. struct irq_data *d = irq_desc_get_irq_data(desc);
  254. if (!irqd_affinity_is_managed(d))
  255. return irq_domain_activate_irq(d, false);
  256. return 0;
  257. }
  258. int irq_activate_and_startup(struct irq_desc *desc, bool resend)
  259. {
  260. if (WARN_ON(irq_activate(desc)))
  261. return 0;
  262. return irq_startup(desc, resend, IRQ_START_FORCE);
  263. }
  264. static void __irq_disable(struct irq_desc *desc, bool mask);
  265. void irq_shutdown(struct irq_desc *desc)
  266. {
  267. if (irqd_is_started(&desc->irq_data)) {
  268. clear_irq_resend(desc);
  269. desc->depth = 1;
  270. if (desc->irq_data.chip->irq_shutdown) {
  271. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  272. irq_state_set_disabled(desc);
  273. irq_state_set_masked(desc);
  274. } else {
  275. __irq_disable(desc, true);
  276. }
  277. irq_state_clr_started(desc);
  278. }
  279. }
  280. void irq_shutdown_and_deactivate(struct irq_desc *desc)
  281. {
  282. irq_shutdown(desc);
  283. /*
  284. * This must be called even if the interrupt was never started up,
  285. * because the activation can happen before the interrupt is
  286. * available for request/startup. It has it's own state tracking so
  287. * it's safe to call it unconditionally.
  288. */
  289. irq_domain_deactivate_irq(&desc->irq_data);
  290. }
  291. void irq_enable(struct irq_desc *desc)
  292. {
  293. if (!irqd_irq_disabled(&desc->irq_data)) {
  294. unmask_irq(desc);
  295. } else {
  296. irq_state_clr_disabled(desc);
  297. if (desc->irq_data.chip->irq_enable) {
  298. desc->irq_data.chip->irq_enable(&desc->irq_data);
  299. irq_state_clr_masked(desc);
  300. } else {
  301. unmask_irq(desc);
  302. }
  303. }
  304. }
  305. static void __irq_disable(struct irq_desc *desc, bool mask)
  306. {
  307. if (irqd_irq_disabled(&desc->irq_data)) {
  308. if (mask)
  309. mask_irq(desc);
  310. } else {
  311. irq_state_set_disabled(desc);
  312. if (desc->irq_data.chip->irq_disable) {
  313. desc->irq_data.chip->irq_disable(&desc->irq_data);
  314. irq_state_set_masked(desc);
  315. } else if (mask) {
  316. mask_irq(desc);
  317. }
  318. }
  319. }
  320. /**
  321. * irq_disable - Mark interrupt disabled
  322. * @desc: irq descriptor which should be disabled
  323. *
  324. * If the chip does not implement the irq_disable callback, we
  325. * use a lazy disable approach. That means we mark the interrupt
  326. * disabled, but leave the hardware unmasked. That's an
  327. * optimization because we avoid the hardware access for the
  328. * common case where no interrupt happens after we marked it
  329. * disabled. If an interrupt happens, then the interrupt flow
  330. * handler masks the line at the hardware level and marks it
  331. * pending.
  332. *
  333. * If the interrupt chip does not implement the irq_disable callback,
  334. * a driver can disable the lazy approach for a particular irq line by
  335. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  336. * be used for devices which cannot disable the interrupt at the
  337. * device level under certain circumstances and have to use
  338. * disable_irq[_nosync] instead.
  339. */
  340. void irq_disable(struct irq_desc *desc)
  341. {
  342. __irq_disable(desc, irq_settings_disable_unlazy(desc));
  343. }
  344. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  345. {
  346. if (desc->irq_data.chip->irq_enable)
  347. desc->irq_data.chip->irq_enable(&desc->irq_data);
  348. else
  349. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  350. cpumask_set_cpu(cpu, desc->percpu_enabled);
  351. }
  352. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  353. {
  354. if (desc->irq_data.chip->irq_disable)
  355. desc->irq_data.chip->irq_disable(&desc->irq_data);
  356. else
  357. desc->irq_data.chip->irq_mask(&desc->irq_data);
  358. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  359. }
  360. static inline void mask_ack_irq(struct irq_desc *desc)
  361. {
  362. if (desc->irq_data.chip->irq_mask_ack) {
  363. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  364. irq_state_set_masked(desc);
  365. } else {
  366. mask_irq(desc);
  367. if (desc->irq_data.chip->irq_ack)
  368. desc->irq_data.chip->irq_ack(&desc->irq_data);
  369. }
  370. }
  371. void mask_irq(struct irq_desc *desc)
  372. {
  373. if (irqd_irq_masked(&desc->irq_data))
  374. return;
  375. if (desc->irq_data.chip->irq_mask) {
  376. desc->irq_data.chip->irq_mask(&desc->irq_data);
  377. irq_state_set_masked(desc);
  378. }
  379. }
  380. void unmask_irq(struct irq_desc *desc)
  381. {
  382. if (!irqd_irq_masked(&desc->irq_data))
  383. return;
  384. if (desc->irq_data.chip->irq_unmask) {
  385. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  386. irq_state_clr_masked(desc);
  387. }
  388. }
  389. void unmask_threaded_irq(struct irq_desc *desc)
  390. {
  391. struct irq_chip *chip = desc->irq_data.chip;
  392. if (chip->flags & IRQCHIP_EOI_THREADED)
  393. chip->irq_eoi(&desc->irq_data);
  394. unmask_irq(desc);
  395. }
  396. /*
  397. * handle_nested_irq - Handle a nested irq from a irq thread
  398. * @irq: the interrupt number
  399. *
  400. * Handle interrupts which are nested into a threaded interrupt
  401. * handler. The handler function is called inside the calling
  402. * threads context.
  403. */
  404. void handle_nested_irq(unsigned int irq)
  405. {
  406. struct irq_desc *desc = irq_to_desc(irq);
  407. struct irqaction *action;
  408. irqreturn_t action_ret;
  409. might_sleep();
  410. raw_spin_lock_irq(&desc->lock);
  411. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  412. action = desc->action;
  413. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  414. desc->istate |= IRQS_PENDING;
  415. raw_spin_unlock_irq(&desc->lock);
  416. return;
  417. }
  418. kstat_incr_irqs_this_cpu(desc);
  419. atomic_inc(&desc->threads_active);
  420. raw_spin_unlock_irq(&desc->lock);
  421. action_ret = IRQ_NONE;
  422. for_each_action_of_desc(desc, action)
  423. action_ret |= action->thread_fn(action->irq, action->dev_id);
  424. if (!irq_settings_no_debug(desc))
  425. note_interrupt(desc, action_ret);
  426. wake_threads_waitq(desc);
  427. }
  428. EXPORT_SYMBOL_GPL(handle_nested_irq);
  429. static bool irq_check_poll(struct irq_desc *desc)
  430. {
  431. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  432. return false;
  433. return irq_wait_for_poll(desc);
  434. }
  435. static bool irq_may_run(struct irq_desc *desc)
  436. {
  437. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  438. /*
  439. * If the interrupt is not in progress and is not an armed
  440. * wakeup interrupt, proceed.
  441. */
  442. if (!irqd_has_set(&desc->irq_data, mask))
  443. return true;
  444. /*
  445. * If the interrupt is an armed wakeup source, mark it pending
  446. * and suspended, disable it and notify the pm core about the
  447. * event.
  448. */
  449. if (irq_pm_check_wakeup(desc))
  450. return false;
  451. /*
  452. * Handle a potential concurrent poll on a different core.
  453. */
  454. return irq_check_poll(desc);
  455. }
  456. /**
  457. * handle_simple_irq - Simple and software-decoded IRQs.
  458. * @desc: the interrupt description structure for this irq
  459. *
  460. * Simple interrupts are either sent from a demultiplexing interrupt
  461. * handler or come from hardware, where no interrupt hardware control
  462. * is necessary.
  463. *
  464. * Note: The caller is expected to handle the ack, clear, mask and
  465. * unmask issues if necessary.
  466. */
  467. void handle_simple_irq(struct irq_desc *desc)
  468. {
  469. raw_spin_lock(&desc->lock);
  470. if (!irq_may_run(desc))
  471. goto out_unlock;
  472. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  473. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  474. desc->istate |= IRQS_PENDING;
  475. goto out_unlock;
  476. }
  477. kstat_incr_irqs_this_cpu(desc);
  478. handle_irq_event(desc);
  479. out_unlock:
  480. raw_spin_unlock(&desc->lock);
  481. }
  482. EXPORT_SYMBOL_GPL(handle_simple_irq);
  483. /**
  484. * handle_untracked_irq - Simple and software-decoded IRQs.
  485. * @desc: the interrupt description structure for this irq
  486. *
  487. * Untracked interrupts are sent from a demultiplexing interrupt
  488. * handler when the demultiplexer does not know which device it its
  489. * multiplexed irq domain generated the interrupt. IRQ's handled
  490. * through here are not subjected to stats tracking, randomness, or
  491. * spurious interrupt detection.
  492. *
  493. * Note: Like handle_simple_irq, the caller is expected to handle
  494. * the ack, clear, mask and unmask issues if necessary.
  495. */
  496. void handle_untracked_irq(struct irq_desc *desc)
  497. {
  498. raw_spin_lock(&desc->lock);
  499. if (!irq_may_run(desc))
  500. goto out_unlock;
  501. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  502. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  503. desc->istate |= IRQS_PENDING;
  504. goto out_unlock;
  505. }
  506. desc->istate &= ~IRQS_PENDING;
  507. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  508. raw_spin_unlock(&desc->lock);
  509. __handle_irq_event_percpu(desc);
  510. raw_spin_lock(&desc->lock);
  511. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  512. out_unlock:
  513. raw_spin_unlock(&desc->lock);
  514. }
  515. EXPORT_SYMBOL_GPL(handle_untracked_irq);
  516. /*
  517. * Called unconditionally from handle_level_irq() and only for oneshot
  518. * interrupts from handle_fasteoi_irq()
  519. */
  520. static void cond_unmask_irq(struct irq_desc *desc)
  521. {
  522. /*
  523. * We need to unmask in the following cases:
  524. * - Standard level irq (IRQF_ONESHOT is not set)
  525. * - Oneshot irq which did not wake the thread (caused by a
  526. * spurious interrupt or a primary handler handling it
  527. * completely).
  528. */
  529. if (!irqd_irq_disabled(&desc->irq_data) &&
  530. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  531. unmask_irq(desc);
  532. }
  533. /**
  534. * handle_level_irq - Level type irq handler
  535. * @desc: the interrupt description structure for this irq
  536. *
  537. * Level type interrupts are active as long as the hardware line has
  538. * the active level. This may require to mask the interrupt and unmask
  539. * it after the associated handler has acknowledged the device, so the
  540. * interrupt line is back to inactive.
  541. */
  542. void handle_level_irq(struct irq_desc *desc)
  543. {
  544. raw_spin_lock(&desc->lock);
  545. mask_ack_irq(desc);
  546. if (!irq_may_run(desc))
  547. goto out_unlock;
  548. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  549. /*
  550. * If its disabled or no action available
  551. * keep it masked and get out of here
  552. */
  553. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  554. desc->istate |= IRQS_PENDING;
  555. goto out_unlock;
  556. }
  557. kstat_incr_irqs_this_cpu(desc);
  558. handle_irq_event(desc);
  559. cond_unmask_irq(desc);
  560. out_unlock:
  561. raw_spin_unlock(&desc->lock);
  562. }
  563. EXPORT_SYMBOL_GPL(handle_level_irq);
  564. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  565. {
  566. if (!(desc->istate & IRQS_ONESHOT)) {
  567. chip->irq_eoi(&desc->irq_data);
  568. return;
  569. }
  570. /*
  571. * We need to unmask in the following cases:
  572. * - Oneshot irq which did not wake the thread (caused by a
  573. * spurious interrupt or a primary handler handling it
  574. * completely).
  575. */
  576. if (!irqd_irq_disabled(&desc->irq_data) &&
  577. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  578. chip->irq_eoi(&desc->irq_data);
  579. unmask_irq(desc);
  580. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  581. chip->irq_eoi(&desc->irq_data);
  582. }
  583. }
  584. /**
  585. * handle_fasteoi_irq - irq handler for transparent controllers
  586. * @desc: the interrupt description structure for this irq
  587. *
  588. * Only a single callback will be issued to the chip: an ->eoi()
  589. * call when the interrupt has been serviced. This enables support
  590. * for modern forms of interrupt handlers, which handle the flow
  591. * details in hardware, transparently.
  592. */
  593. void handle_fasteoi_irq(struct irq_desc *desc)
  594. {
  595. struct irq_chip *chip = desc->irq_data.chip;
  596. raw_spin_lock(&desc->lock);
  597. /*
  598. * When an affinity change races with IRQ handling, the next interrupt
  599. * can arrive on the new CPU before the original CPU has completed
  600. * handling the previous one - it may need to be resent.
  601. */
  602. if (!irq_may_run(desc)) {
  603. if (irqd_needs_resend_when_in_progress(&desc->irq_data))
  604. desc->istate |= IRQS_PENDING;
  605. goto out;
  606. }
  607. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  608. /*
  609. * If its disabled or no action available
  610. * then mask it and get out of here:
  611. */
  612. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  613. desc->istate |= IRQS_PENDING;
  614. mask_irq(desc);
  615. goto out;
  616. }
  617. kstat_incr_irqs_this_cpu(desc);
  618. if (desc->istate & IRQS_ONESHOT)
  619. mask_irq(desc);
  620. handle_irq_event(desc);
  621. cond_unmask_eoi_irq(desc, chip);
  622. /*
  623. * When the race described above happens this will resend the interrupt.
  624. */
  625. if (unlikely(desc->istate & IRQS_PENDING))
  626. check_irq_resend(desc, false);
  627. raw_spin_unlock(&desc->lock);
  628. return;
  629. out:
  630. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  631. chip->irq_eoi(&desc->irq_data);
  632. raw_spin_unlock(&desc->lock);
  633. }
  634. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  635. /**
  636. * handle_fasteoi_nmi - irq handler for NMI interrupt lines
  637. * @desc: the interrupt description structure for this irq
  638. *
  639. * A simple NMI-safe handler, considering the restrictions
  640. * from request_nmi.
  641. *
  642. * Only a single callback will be issued to the chip: an ->eoi()
  643. * call when the interrupt has been serviced. This enables support
  644. * for modern forms of interrupt handlers, which handle the flow
  645. * details in hardware, transparently.
  646. */
  647. void handle_fasteoi_nmi(struct irq_desc *desc)
  648. {
  649. struct irq_chip *chip = irq_desc_get_chip(desc);
  650. struct irqaction *action = desc->action;
  651. unsigned int irq = irq_desc_get_irq(desc);
  652. irqreturn_t res;
  653. __kstat_incr_irqs_this_cpu(desc);
  654. trace_irq_handler_entry(irq, action);
  655. /*
  656. * NMIs cannot be shared, there is only one action.
  657. */
  658. res = action->handler(irq, action->dev_id);
  659. trace_irq_handler_exit(irq, action, res);
  660. if (chip->irq_eoi)
  661. chip->irq_eoi(&desc->irq_data);
  662. }
  663. EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
  664. /**
  665. * handle_edge_irq - edge type IRQ handler
  666. * @desc: the interrupt description structure for this irq
  667. *
  668. * Interrupt occurs on the falling and/or rising edge of a hardware
  669. * signal. The occurrence is latched into the irq controller hardware
  670. * and must be acked in order to be reenabled. After the ack another
  671. * interrupt can happen on the same source even before the first one
  672. * is handled by the associated event handler. If this happens it
  673. * might be necessary to disable (mask) the interrupt depending on the
  674. * controller hardware. This requires to reenable the interrupt inside
  675. * of the loop which handles the interrupts which have arrived while
  676. * the handler was running. If all pending interrupts are handled, the
  677. * loop is left.
  678. */
  679. void handle_edge_irq(struct irq_desc *desc)
  680. {
  681. raw_spin_lock(&desc->lock);
  682. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  683. if (!irq_may_run(desc)) {
  684. desc->istate |= IRQS_PENDING;
  685. mask_ack_irq(desc);
  686. goto out_unlock;
  687. }
  688. /*
  689. * If its disabled or no action available then mask it and get
  690. * out of here.
  691. */
  692. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  693. desc->istate |= IRQS_PENDING;
  694. mask_ack_irq(desc);
  695. goto out_unlock;
  696. }
  697. kstat_incr_irqs_this_cpu(desc);
  698. /* Start handling the irq */
  699. desc->irq_data.chip->irq_ack(&desc->irq_data);
  700. do {
  701. if (unlikely(!desc->action)) {
  702. mask_irq(desc);
  703. goto out_unlock;
  704. }
  705. /*
  706. * When another irq arrived while we were handling
  707. * one, we could have masked the irq.
  708. * Reenable it, if it was not disabled in meantime.
  709. */
  710. if (unlikely(desc->istate & IRQS_PENDING)) {
  711. if (!irqd_irq_disabled(&desc->irq_data) &&
  712. irqd_irq_masked(&desc->irq_data))
  713. unmask_irq(desc);
  714. }
  715. handle_irq_event(desc);
  716. } while ((desc->istate & IRQS_PENDING) &&
  717. !irqd_irq_disabled(&desc->irq_data));
  718. out_unlock:
  719. raw_spin_unlock(&desc->lock);
  720. }
  721. EXPORT_SYMBOL(handle_edge_irq);
  722. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  723. /**
  724. * handle_edge_eoi_irq - edge eoi type IRQ handler
  725. * @desc: the interrupt description structure for this irq
  726. *
  727. * Similar as the above handle_edge_irq, but using eoi and w/o the
  728. * mask/unmask logic.
  729. */
  730. void handle_edge_eoi_irq(struct irq_desc *desc)
  731. {
  732. struct irq_chip *chip = irq_desc_get_chip(desc);
  733. raw_spin_lock(&desc->lock);
  734. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  735. if (!irq_may_run(desc)) {
  736. desc->istate |= IRQS_PENDING;
  737. goto out_eoi;
  738. }
  739. /*
  740. * If its disabled or no action available then mask it and get
  741. * out of here.
  742. */
  743. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  744. desc->istate |= IRQS_PENDING;
  745. goto out_eoi;
  746. }
  747. kstat_incr_irqs_this_cpu(desc);
  748. do {
  749. if (unlikely(!desc->action))
  750. goto out_eoi;
  751. handle_irq_event(desc);
  752. } while ((desc->istate & IRQS_PENDING) &&
  753. !irqd_irq_disabled(&desc->irq_data));
  754. out_eoi:
  755. chip->irq_eoi(&desc->irq_data);
  756. raw_spin_unlock(&desc->lock);
  757. }
  758. #endif
  759. /**
  760. * handle_percpu_irq - Per CPU local irq handler
  761. * @desc: the interrupt description structure for this irq
  762. *
  763. * Per CPU interrupts on SMP machines without locking requirements
  764. */
  765. void handle_percpu_irq(struct irq_desc *desc)
  766. {
  767. struct irq_chip *chip = irq_desc_get_chip(desc);
  768. /*
  769. * PER CPU interrupts are not serialized. Do not touch
  770. * desc->tot_count.
  771. */
  772. __kstat_incr_irqs_this_cpu(desc);
  773. if (chip->irq_ack)
  774. chip->irq_ack(&desc->irq_data);
  775. handle_irq_event_percpu(desc);
  776. if (chip->irq_eoi)
  777. chip->irq_eoi(&desc->irq_data);
  778. }
  779. /**
  780. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  781. * @desc: the interrupt description structure for this irq
  782. *
  783. * Per CPU interrupts on SMP machines without locking requirements. Same as
  784. * handle_percpu_irq() above but with the following extras:
  785. *
  786. * action->percpu_dev_id is a pointer to percpu variables which
  787. * contain the real device id for the cpu on which this handler is
  788. * called
  789. */
  790. void handle_percpu_devid_irq(struct irq_desc *desc)
  791. {
  792. struct irq_chip *chip = irq_desc_get_chip(desc);
  793. struct irqaction *action = desc->action;
  794. unsigned int irq = irq_desc_get_irq(desc);
  795. irqreturn_t res;
  796. /*
  797. * PER CPU interrupts are not serialized. Do not touch
  798. * desc->tot_count.
  799. */
  800. __kstat_incr_irqs_this_cpu(desc);
  801. if (chip->irq_ack)
  802. chip->irq_ack(&desc->irq_data);
  803. if (likely(action)) {
  804. trace_irq_handler_entry(irq, action);
  805. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  806. trace_irq_handler_exit(irq, action, res);
  807. } else {
  808. unsigned int cpu = smp_processor_id();
  809. bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
  810. if (enabled)
  811. irq_percpu_disable(desc, cpu);
  812. pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
  813. enabled ? " and unmasked" : "", irq, cpu);
  814. }
  815. if (chip->irq_eoi)
  816. chip->irq_eoi(&desc->irq_data);
  817. }
  818. /**
  819. * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
  820. * dev ids
  821. * @desc: the interrupt description structure for this irq
  822. *
  823. * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
  824. * as a percpu pointer.
  825. */
  826. void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
  827. {
  828. struct irq_chip *chip = irq_desc_get_chip(desc);
  829. struct irqaction *action = desc->action;
  830. unsigned int irq = irq_desc_get_irq(desc);
  831. irqreturn_t res;
  832. __kstat_incr_irqs_this_cpu(desc);
  833. trace_irq_handler_entry(irq, action);
  834. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  835. trace_irq_handler_exit(irq, action, res);
  836. if (chip->irq_eoi)
  837. chip->irq_eoi(&desc->irq_data);
  838. }
  839. static void
  840. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  841. int is_chained, const char *name)
  842. {
  843. if (!handle) {
  844. handle = handle_bad_irq;
  845. } else {
  846. struct irq_data *irq_data = &desc->irq_data;
  847. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  848. /*
  849. * With hierarchical domains we might run into a
  850. * situation where the outermost chip is not yet set
  851. * up, but the inner chips are there. Instead of
  852. * bailing we install the handler, but obviously we
  853. * cannot enable/startup the interrupt at this point.
  854. */
  855. while (irq_data) {
  856. if (irq_data->chip != &no_irq_chip)
  857. break;
  858. /*
  859. * Bail out if the outer chip is not set up
  860. * and the interrupt supposed to be started
  861. * right away.
  862. */
  863. if (WARN_ON(is_chained))
  864. return;
  865. /* Try the parent */
  866. irq_data = irq_data->parent_data;
  867. }
  868. #endif
  869. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  870. return;
  871. }
  872. /* Uninstall? */
  873. if (handle == handle_bad_irq) {
  874. if (desc->irq_data.chip != &no_irq_chip)
  875. mask_ack_irq(desc);
  876. irq_state_set_disabled(desc);
  877. if (is_chained) {
  878. desc->action = NULL;
  879. WARN_ON(irq_chip_pm_put(irq_desc_get_irq_data(desc)));
  880. }
  881. desc->depth = 1;
  882. }
  883. desc->handle_irq = handle;
  884. desc->name = name;
  885. if (handle != handle_bad_irq && is_chained) {
  886. unsigned int type = irqd_get_trigger_type(&desc->irq_data);
  887. /*
  888. * We're about to start this interrupt immediately,
  889. * hence the need to set the trigger configuration.
  890. * But the .set_type callback may have overridden the
  891. * flow handler, ignoring that we're dealing with a
  892. * chained interrupt. Reset it immediately because we
  893. * do know better.
  894. */
  895. if (type != IRQ_TYPE_NONE) {
  896. __irq_set_trigger(desc, type);
  897. desc->handle_irq = handle;
  898. }
  899. irq_settings_set_noprobe(desc);
  900. irq_settings_set_norequest(desc);
  901. irq_settings_set_nothread(desc);
  902. desc->action = &chained_action;
  903. WARN_ON(irq_chip_pm_get(irq_desc_get_irq_data(desc)));
  904. irq_activate_and_startup(desc, IRQ_RESEND);
  905. }
  906. }
  907. void
  908. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  909. const char *name)
  910. {
  911. unsigned long flags;
  912. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  913. if (!desc)
  914. return;
  915. __irq_do_set_handler(desc, handle, is_chained, name);
  916. irq_put_desc_busunlock(desc, flags);
  917. }
  918. EXPORT_SYMBOL_GPL(__irq_set_handler);
  919. void
  920. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  921. void *data)
  922. {
  923. unsigned long flags;
  924. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  925. if (!desc)
  926. return;
  927. desc->irq_common_data.handler_data = data;
  928. __irq_do_set_handler(desc, handle, 1, NULL);
  929. irq_put_desc_busunlock(desc, flags);
  930. }
  931. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  932. void
  933. irq_set_chip_and_handler_name(unsigned int irq, const struct irq_chip *chip,
  934. irq_flow_handler_t handle, const char *name)
  935. {
  936. irq_set_chip(irq, chip);
  937. __irq_set_handler(irq, handle, 0, name);
  938. }
  939. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  940. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  941. {
  942. unsigned long flags, trigger, tmp;
  943. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  944. if (!desc)
  945. return;
  946. /*
  947. * Warn when a driver sets the no autoenable flag on an already
  948. * active interrupt.
  949. */
  950. WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
  951. irq_settings_clr_and_set(desc, clr, set);
  952. trigger = irqd_get_trigger_type(&desc->irq_data);
  953. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  954. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  955. if (irq_settings_has_no_balance_set(desc))
  956. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  957. if (irq_settings_is_per_cpu(desc))
  958. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  959. if (irq_settings_can_move_pcntxt(desc))
  960. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  961. if (irq_settings_is_level(desc))
  962. irqd_set(&desc->irq_data, IRQD_LEVEL);
  963. tmp = irq_settings_get_trigger_mask(desc);
  964. if (tmp != IRQ_TYPE_NONE)
  965. trigger = tmp;
  966. irqd_set(&desc->irq_data, trigger);
  967. irq_put_desc_unlock(desc, flags);
  968. }
  969. EXPORT_SYMBOL_GPL(irq_modify_status);
  970. #ifdef CONFIG_DEPRECATED_IRQ_CPU_ONOFFLINE
  971. /**
  972. * irq_cpu_online - Invoke all irq_cpu_online functions.
  973. *
  974. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  975. * for each.
  976. */
  977. void irq_cpu_online(void)
  978. {
  979. struct irq_desc *desc;
  980. struct irq_chip *chip;
  981. unsigned long flags;
  982. unsigned int irq;
  983. for_each_active_irq(irq) {
  984. desc = irq_to_desc(irq);
  985. if (!desc)
  986. continue;
  987. raw_spin_lock_irqsave(&desc->lock, flags);
  988. chip = irq_data_get_irq_chip(&desc->irq_data);
  989. if (chip && chip->irq_cpu_online &&
  990. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  991. !irqd_irq_disabled(&desc->irq_data)))
  992. chip->irq_cpu_online(&desc->irq_data);
  993. raw_spin_unlock_irqrestore(&desc->lock, flags);
  994. }
  995. }
  996. /**
  997. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  998. *
  999. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  1000. * for each.
  1001. */
  1002. void irq_cpu_offline(void)
  1003. {
  1004. struct irq_desc *desc;
  1005. struct irq_chip *chip;
  1006. unsigned long flags;
  1007. unsigned int irq;
  1008. for_each_active_irq(irq) {
  1009. desc = irq_to_desc(irq);
  1010. if (!desc)
  1011. continue;
  1012. raw_spin_lock_irqsave(&desc->lock, flags);
  1013. chip = irq_data_get_irq_chip(&desc->irq_data);
  1014. if (chip && chip->irq_cpu_offline &&
  1015. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  1016. !irqd_irq_disabled(&desc->irq_data)))
  1017. chip->irq_cpu_offline(&desc->irq_data);
  1018. raw_spin_unlock_irqrestore(&desc->lock, flags);
  1019. }
  1020. }
  1021. #endif
  1022. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  1023. #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
  1024. /**
  1025. * handle_fasteoi_ack_irq - irq handler for edge hierarchy
  1026. * stacked on transparent controllers
  1027. *
  1028. * @desc: the interrupt description structure for this irq
  1029. *
  1030. * Like handle_fasteoi_irq(), but for use with hierarchy where
  1031. * the irq_chip also needs to have its ->irq_ack() function
  1032. * called.
  1033. */
  1034. void handle_fasteoi_ack_irq(struct irq_desc *desc)
  1035. {
  1036. struct irq_chip *chip = desc->irq_data.chip;
  1037. raw_spin_lock(&desc->lock);
  1038. if (!irq_may_run(desc))
  1039. goto out;
  1040. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  1041. /*
  1042. * If its disabled or no action available
  1043. * then mask it and get out of here:
  1044. */
  1045. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  1046. desc->istate |= IRQS_PENDING;
  1047. mask_irq(desc);
  1048. goto out;
  1049. }
  1050. kstat_incr_irqs_this_cpu(desc);
  1051. if (desc->istate & IRQS_ONESHOT)
  1052. mask_irq(desc);
  1053. /* Start handling the irq */
  1054. desc->irq_data.chip->irq_ack(&desc->irq_data);
  1055. handle_irq_event(desc);
  1056. cond_unmask_eoi_irq(desc, chip);
  1057. raw_spin_unlock(&desc->lock);
  1058. return;
  1059. out:
  1060. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1061. chip->irq_eoi(&desc->irq_data);
  1062. raw_spin_unlock(&desc->lock);
  1063. }
  1064. EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
  1065. /**
  1066. * handle_fasteoi_mask_irq - irq handler for level hierarchy
  1067. * stacked on transparent controllers
  1068. *
  1069. * @desc: the interrupt description structure for this irq
  1070. *
  1071. * Like handle_fasteoi_irq(), but for use with hierarchy where
  1072. * the irq_chip also needs to have its ->irq_mask_ack() function
  1073. * called.
  1074. */
  1075. void handle_fasteoi_mask_irq(struct irq_desc *desc)
  1076. {
  1077. struct irq_chip *chip = desc->irq_data.chip;
  1078. raw_spin_lock(&desc->lock);
  1079. mask_ack_irq(desc);
  1080. if (!irq_may_run(desc))
  1081. goto out;
  1082. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  1083. /*
  1084. * If its disabled or no action available
  1085. * then mask it and get out of here:
  1086. */
  1087. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  1088. desc->istate |= IRQS_PENDING;
  1089. mask_irq(desc);
  1090. goto out;
  1091. }
  1092. kstat_incr_irqs_this_cpu(desc);
  1093. if (desc->istate & IRQS_ONESHOT)
  1094. mask_irq(desc);
  1095. handle_irq_event(desc);
  1096. cond_unmask_eoi_irq(desc, chip);
  1097. raw_spin_unlock(&desc->lock);
  1098. return;
  1099. out:
  1100. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1101. chip->irq_eoi(&desc->irq_data);
  1102. raw_spin_unlock(&desc->lock);
  1103. }
  1104. EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
  1105. #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
  1106. /**
  1107. * irq_chip_set_parent_state - set the state of a parent interrupt.
  1108. *
  1109. * @data: Pointer to interrupt specific data
  1110. * @which: State to be restored (one of IRQCHIP_STATE_*)
  1111. * @val: Value corresponding to @which
  1112. *
  1113. * Conditional success, if the underlying irqchip does not implement it.
  1114. */
  1115. int irq_chip_set_parent_state(struct irq_data *data,
  1116. enum irqchip_irq_state which,
  1117. bool val)
  1118. {
  1119. data = data->parent_data;
  1120. if (!data || !data->chip->irq_set_irqchip_state)
  1121. return 0;
  1122. return data->chip->irq_set_irqchip_state(data, which, val);
  1123. }
  1124. EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
  1125. /**
  1126. * irq_chip_get_parent_state - get the state of a parent interrupt.
  1127. *
  1128. * @data: Pointer to interrupt specific data
  1129. * @which: one of IRQCHIP_STATE_* the caller wants to know
  1130. * @state: a pointer to a boolean where the state is to be stored
  1131. *
  1132. * Conditional success, if the underlying irqchip does not implement it.
  1133. */
  1134. int irq_chip_get_parent_state(struct irq_data *data,
  1135. enum irqchip_irq_state which,
  1136. bool *state)
  1137. {
  1138. data = data->parent_data;
  1139. if (!data || !data->chip->irq_get_irqchip_state)
  1140. return 0;
  1141. return data->chip->irq_get_irqchip_state(data, which, state);
  1142. }
  1143. EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
  1144. /**
  1145. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  1146. * NULL)
  1147. * @data: Pointer to interrupt specific data
  1148. */
  1149. void irq_chip_enable_parent(struct irq_data *data)
  1150. {
  1151. data = data->parent_data;
  1152. if (data->chip->irq_enable)
  1153. data->chip->irq_enable(data);
  1154. else
  1155. data->chip->irq_unmask(data);
  1156. }
  1157. EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
  1158. /**
  1159. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  1160. * NULL)
  1161. * @data: Pointer to interrupt specific data
  1162. */
  1163. void irq_chip_disable_parent(struct irq_data *data)
  1164. {
  1165. data = data->parent_data;
  1166. if (data->chip->irq_disable)
  1167. data->chip->irq_disable(data);
  1168. else
  1169. data->chip->irq_mask(data);
  1170. }
  1171. EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
  1172. /**
  1173. * irq_chip_ack_parent - Acknowledge the parent interrupt
  1174. * @data: Pointer to interrupt specific data
  1175. */
  1176. void irq_chip_ack_parent(struct irq_data *data)
  1177. {
  1178. data = data->parent_data;
  1179. data->chip->irq_ack(data);
  1180. }
  1181. EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
  1182. /**
  1183. * irq_chip_mask_parent - Mask the parent interrupt
  1184. * @data: Pointer to interrupt specific data
  1185. */
  1186. void irq_chip_mask_parent(struct irq_data *data)
  1187. {
  1188. data = data->parent_data;
  1189. data->chip->irq_mask(data);
  1190. }
  1191. EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
  1192. /**
  1193. * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
  1194. * @data: Pointer to interrupt specific data
  1195. */
  1196. void irq_chip_mask_ack_parent(struct irq_data *data)
  1197. {
  1198. data = data->parent_data;
  1199. data->chip->irq_mask_ack(data);
  1200. }
  1201. EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
  1202. /**
  1203. * irq_chip_unmask_parent - Unmask the parent interrupt
  1204. * @data: Pointer to interrupt specific data
  1205. */
  1206. void irq_chip_unmask_parent(struct irq_data *data)
  1207. {
  1208. data = data->parent_data;
  1209. data->chip->irq_unmask(data);
  1210. }
  1211. EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
  1212. /**
  1213. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  1214. * @data: Pointer to interrupt specific data
  1215. */
  1216. void irq_chip_eoi_parent(struct irq_data *data)
  1217. {
  1218. data = data->parent_data;
  1219. data->chip->irq_eoi(data);
  1220. }
  1221. EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
  1222. /**
  1223. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  1224. * @data: Pointer to interrupt specific data
  1225. * @dest: The affinity mask to set
  1226. * @force: Flag to enforce setting (disable online checks)
  1227. *
  1228. * Conditional, as the underlying parent chip might not implement it.
  1229. */
  1230. int irq_chip_set_affinity_parent(struct irq_data *data,
  1231. const struct cpumask *dest, bool force)
  1232. {
  1233. data = data->parent_data;
  1234. if (data->chip->irq_set_affinity)
  1235. return data->chip->irq_set_affinity(data, dest, force);
  1236. return -ENOSYS;
  1237. }
  1238. EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
  1239. /**
  1240. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  1241. * @data: Pointer to interrupt specific data
  1242. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  1243. *
  1244. * Conditional, as the underlying parent chip might not implement it.
  1245. */
  1246. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  1247. {
  1248. data = data->parent_data;
  1249. if (data->chip->irq_set_type)
  1250. return data->chip->irq_set_type(data, type);
  1251. return -ENOSYS;
  1252. }
  1253. EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
  1254. /**
  1255. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  1256. * @data: Pointer to interrupt specific data
  1257. *
  1258. * Iterate through the domain hierarchy of the interrupt and check
  1259. * whether a hw retrigger function exists. If yes, invoke it.
  1260. */
  1261. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  1262. {
  1263. for (data = data->parent_data; data; data = data->parent_data)
  1264. if (data->chip && data->chip->irq_retrigger)
  1265. return data->chip->irq_retrigger(data);
  1266. return 0;
  1267. }
  1268. EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
  1269. /**
  1270. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  1271. * @data: Pointer to interrupt specific data
  1272. * @vcpu_info: The vcpu affinity information
  1273. */
  1274. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  1275. {
  1276. data = data->parent_data;
  1277. if (data->chip->irq_set_vcpu_affinity)
  1278. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  1279. return -ENOSYS;
  1280. }
  1281. EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
  1282. /**
  1283. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  1284. * @data: Pointer to interrupt specific data
  1285. * @on: Whether to set or reset the wake-up capability of this irq
  1286. *
  1287. * Conditional, as the underlying parent chip might not implement it.
  1288. */
  1289. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  1290. {
  1291. data = data->parent_data;
  1292. if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
  1293. return 0;
  1294. if (data->chip->irq_set_wake)
  1295. return data->chip->irq_set_wake(data, on);
  1296. return -ENOSYS;
  1297. }
  1298. EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
  1299. /**
  1300. * irq_chip_request_resources_parent - Request resources on the parent interrupt
  1301. * @data: Pointer to interrupt specific data
  1302. */
  1303. int irq_chip_request_resources_parent(struct irq_data *data)
  1304. {
  1305. data = data->parent_data;
  1306. if (data->chip->irq_request_resources)
  1307. return data->chip->irq_request_resources(data);
  1308. /* no error on missing optional irq_chip::irq_request_resources */
  1309. return 0;
  1310. }
  1311. EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
  1312. /**
  1313. * irq_chip_release_resources_parent - Release resources on the parent interrupt
  1314. * @data: Pointer to interrupt specific data
  1315. */
  1316. void irq_chip_release_resources_parent(struct irq_data *data)
  1317. {
  1318. data = data->parent_data;
  1319. if (data->chip->irq_release_resources)
  1320. data->chip->irq_release_resources(data);
  1321. }
  1322. EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
  1323. #endif
  1324. /**
  1325. * irq_chip_compose_msi_msg - Compose msi message for a irq chip
  1326. * @data: Pointer to interrupt specific data
  1327. * @msg: Pointer to the MSI message
  1328. *
  1329. * For hierarchical domains we find the first chip in the hierarchy
  1330. * which implements the irq_compose_msi_msg callback. For non
  1331. * hierarchical we use the top level chip.
  1332. */
  1333. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  1334. {
  1335. struct irq_data *pos;
  1336. for (pos = NULL; !pos && data; data = irqd_get_parent_data(data)) {
  1337. if (data->chip && data->chip->irq_compose_msi_msg)
  1338. pos = data;
  1339. }
  1340. if (!pos)
  1341. return -ENOSYS;
  1342. pos->chip->irq_compose_msi_msg(pos, msg);
  1343. return 0;
  1344. }
  1345. static struct device *irq_get_pm_device(struct irq_data *data)
  1346. {
  1347. if (data->domain)
  1348. return data->domain->pm_dev;
  1349. return NULL;
  1350. }
  1351. /**
  1352. * irq_chip_pm_get - Enable power for an IRQ chip
  1353. * @data: Pointer to interrupt specific data
  1354. *
  1355. * Enable the power to the IRQ chip referenced by the interrupt data
  1356. * structure.
  1357. */
  1358. int irq_chip_pm_get(struct irq_data *data)
  1359. {
  1360. struct device *dev = irq_get_pm_device(data);
  1361. int retval = 0;
  1362. if (IS_ENABLED(CONFIG_PM) && dev)
  1363. retval = pm_runtime_resume_and_get(dev);
  1364. return retval;
  1365. }
  1366. /**
  1367. * irq_chip_pm_put - Disable power for an IRQ chip
  1368. * @data: Pointer to interrupt specific data
  1369. *
  1370. * Disable the power to the IRQ chip referenced by the interrupt data
  1371. * structure, belongs. Note that power will only be disabled, once this
  1372. * function has been called for all IRQs that have called irq_chip_pm_get().
  1373. */
  1374. int irq_chip_pm_put(struct irq_data *data)
  1375. {
  1376. struct device *dev = irq_get_pm_device(data);
  1377. int retval = 0;
  1378. if (IS_ENABLED(CONFIG_PM) && dev)
  1379. retval = pm_runtime_put(dev);
  1380. return (retval < 0) ? retval : 0;
  1381. }