gus_io.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  4. * I/O routines for GF1/InterWave synthesizer chips
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/time.h>
  8. #include <sound/core.h>
  9. #include <sound/gus.h>
  10. void snd_gf1_delay(struct snd_gus_card * gus)
  11. {
  12. int i;
  13. for (i = 0; i < 6; i++) {
  14. mb();
  15. inb(GUSP(gus, DRAM));
  16. }
  17. }
  18. /*
  19. * =======================================================================
  20. */
  21. /*
  22. * ok.. stop of control registers (wave & ramp) need some special things..
  23. * big UltraClick (tm) elimination...
  24. */
  25. static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  26. {
  27. unsigned char value;
  28. outb(reg | 0x80, gus->gf1.reg_regsel);
  29. mb();
  30. value = inb(gus->gf1.reg_data8);
  31. mb();
  32. outb(reg, gus->gf1.reg_regsel);
  33. mb();
  34. outb((value | 0x03) & ~(0x80 | 0x20), gus->gf1.reg_data8);
  35. mb();
  36. }
  37. static inline void __snd_gf1_write8(struct snd_gus_card * gus,
  38. unsigned char reg,
  39. unsigned char data)
  40. {
  41. outb(reg, gus->gf1.reg_regsel);
  42. mb();
  43. outb(data, gus->gf1.reg_data8);
  44. mb();
  45. }
  46. static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus,
  47. unsigned char reg)
  48. {
  49. outb(reg, gus->gf1.reg_regsel);
  50. mb();
  51. return inb(gus->gf1.reg_data8);
  52. }
  53. static inline void __snd_gf1_write16(struct snd_gus_card * gus,
  54. unsigned char reg, unsigned int data)
  55. {
  56. outb(reg, gus->gf1.reg_regsel);
  57. mb();
  58. outw((unsigned short) data, gus->gf1.reg_data16);
  59. mb();
  60. }
  61. static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus,
  62. unsigned char reg)
  63. {
  64. outb(reg, gus->gf1.reg_regsel);
  65. mb();
  66. return inw(gus->gf1.reg_data16);
  67. }
  68. static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus,
  69. unsigned char reg, unsigned char data)
  70. {
  71. outb(reg, gus->gf1.reg_timerctrl);
  72. inb(gus->gf1.reg_timerctrl);
  73. inb(gus->gf1.reg_timerctrl);
  74. outb(data, gus->gf1.reg_timerdata);
  75. inb(gus->gf1.reg_timerctrl);
  76. inb(gus->gf1.reg_timerctrl);
  77. }
  78. static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
  79. unsigned int addr, int w_16bit)
  80. {
  81. if (gus->gf1.enh_mode) {
  82. if (w_16bit)
  83. addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f);
  84. __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, (unsigned char) ((addr >> 26) & 0x03));
  85. } else if (w_16bit)
  86. addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1);
  87. __snd_gf1_write16(gus, reg, (unsigned short) (addr >> 11));
  88. __snd_gf1_write16(gus, reg + 1, (unsigned short) (addr << 5));
  89. }
  90. static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus,
  91. unsigned char reg, short w_16bit)
  92. {
  93. unsigned int res;
  94. res = ((unsigned int) __snd_gf1_look16(gus, reg | 0x80) << 11) & 0xfff800;
  95. res |= ((unsigned int) __snd_gf1_look16(gus, (reg + 1) | 0x80) >> 5) & 0x0007ff;
  96. if (gus->gf1.enh_mode) {
  97. res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26;
  98. if (w_16bit)
  99. res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f);
  100. } else if (w_16bit)
  101. res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f);
  102. return res;
  103. }
  104. /*
  105. * =======================================================================
  106. */
  107. void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  108. {
  109. __snd_gf1_ctrl_stop(gus, reg);
  110. }
  111. void snd_gf1_write8(struct snd_gus_card * gus,
  112. unsigned char reg,
  113. unsigned char data)
  114. {
  115. __snd_gf1_write8(gus, reg, data);
  116. }
  117. unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg)
  118. {
  119. return __snd_gf1_look8(gus, reg);
  120. }
  121. void snd_gf1_write16(struct snd_gus_card * gus,
  122. unsigned char reg,
  123. unsigned int data)
  124. {
  125. __snd_gf1_write16(gus, reg, data);
  126. }
  127. unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg)
  128. {
  129. return __snd_gf1_look16(gus, reg);
  130. }
  131. void snd_gf1_adlib_write(struct snd_gus_card * gus,
  132. unsigned char reg,
  133. unsigned char data)
  134. {
  135. __snd_gf1_adlib_write(gus, reg, data);
  136. }
  137. void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
  138. unsigned int addr, short w_16bit)
  139. {
  140. __snd_gf1_write_addr(gus, reg, addr, w_16bit);
  141. }
  142. unsigned int snd_gf1_read_addr(struct snd_gus_card * gus,
  143. unsigned char reg,
  144. short w_16bit)
  145. {
  146. return __snd_gf1_read_addr(gus, reg, w_16bit);
  147. }
  148. /*
  149. */
  150. void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  151. {
  152. unsigned long flags;
  153. spin_lock_irqsave(&gus->reg_lock, flags);
  154. __snd_gf1_ctrl_stop(gus, reg);
  155. spin_unlock_irqrestore(&gus->reg_lock, flags);
  156. }
  157. void snd_gf1_i_write8(struct snd_gus_card * gus,
  158. unsigned char reg,
  159. unsigned char data)
  160. {
  161. unsigned long flags;
  162. spin_lock_irqsave(&gus->reg_lock, flags);
  163. __snd_gf1_write8(gus, reg, data);
  164. spin_unlock_irqrestore(&gus->reg_lock, flags);
  165. }
  166. unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg)
  167. {
  168. unsigned long flags;
  169. unsigned char res;
  170. spin_lock_irqsave(&gus->reg_lock, flags);
  171. res = __snd_gf1_look8(gus, reg);
  172. spin_unlock_irqrestore(&gus->reg_lock, flags);
  173. return res;
  174. }
  175. void snd_gf1_i_write16(struct snd_gus_card * gus,
  176. unsigned char reg,
  177. unsigned int data)
  178. {
  179. unsigned long flags;
  180. spin_lock_irqsave(&gus->reg_lock, flags);
  181. __snd_gf1_write16(gus, reg, data);
  182. spin_unlock_irqrestore(&gus->reg_lock, flags);
  183. }
  184. unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
  185. {
  186. unsigned long flags;
  187. unsigned short res;
  188. spin_lock_irqsave(&gus->reg_lock, flags);
  189. res = __snd_gf1_look16(gus, reg);
  190. spin_unlock_irqrestore(&gus->reg_lock, flags);
  191. return res;
  192. }
  193. #if 0
  194. void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
  195. unsigned char reg,
  196. unsigned char data)
  197. {
  198. unsigned long flags;
  199. spin_lock_irqsave(&gus->reg_lock, flags);
  200. __snd_gf1_adlib_write(gus, reg, data);
  201. spin_unlock_irqrestore(&gus->reg_lock, flags);
  202. }
  203. void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
  204. unsigned int addr, short w_16bit)
  205. {
  206. unsigned long flags;
  207. spin_lock_irqsave(&gus->reg_lock, flags);
  208. __snd_gf1_write_addr(gus, reg, addr, w_16bit);
  209. spin_unlock_irqrestore(&gus->reg_lock, flags);
  210. }
  211. #endif /* 0 */
  212. #ifdef CONFIG_SND_DEBUG
  213. static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
  214. unsigned char reg, short w_16bit)
  215. {
  216. unsigned int res;
  217. unsigned long flags;
  218. spin_lock_irqsave(&gus->reg_lock, flags);
  219. res = __snd_gf1_read_addr(gus, reg, w_16bit);
  220. spin_unlock_irqrestore(&gus->reg_lock, flags);
  221. return res;
  222. }
  223. #endif
  224. /*
  225. */
  226. void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
  227. {
  228. outb(0x43, gus->gf1.reg_regsel);
  229. mb();
  230. outw((unsigned short) addr, gus->gf1.reg_data16);
  231. mb();
  232. outb(0x44, gus->gf1.reg_regsel);
  233. mb();
  234. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  235. mb();
  236. }
  237. void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data)
  238. {
  239. unsigned long flags;
  240. spin_lock_irqsave(&gus->reg_lock, flags);
  241. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  242. mb();
  243. outw((unsigned short) addr, gus->gf1.reg_data16);
  244. mb();
  245. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  246. mb();
  247. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  248. mb();
  249. outb(data, gus->gf1.reg_dram);
  250. spin_unlock_irqrestore(&gus->reg_lock, flags);
  251. }
  252. unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr)
  253. {
  254. unsigned long flags;
  255. unsigned char res;
  256. spin_lock_irqsave(&gus->reg_lock, flags);
  257. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  258. mb();
  259. outw((unsigned short) addr, gus->gf1.reg_data16);
  260. mb();
  261. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  262. mb();
  263. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  264. mb();
  265. res = inb(gus->gf1.reg_dram);
  266. spin_unlock_irqrestore(&gus->reg_lock, flags);
  267. return res;
  268. }
  269. #if 0
  270. void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data)
  271. {
  272. unsigned long flags;
  273. if (!gus->interwave)
  274. dev_dbg(gus->card->dev, "%s - GF1!!!\n", __func__);
  275. spin_lock_irqsave(&gus->reg_lock, flags);
  276. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  277. mb();
  278. outw((unsigned short) addr, gus->gf1.reg_data16);
  279. mb();
  280. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  281. mb();
  282. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  283. mb();
  284. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  285. mb();
  286. outw(data, gus->gf1.reg_data16);
  287. spin_unlock_irqrestore(&gus->reg_lock, flags);
  288. }
  289. unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr)
  290. {
  291. unsigned long flags;
  292. unsigned short res;
  293. if (!gus->interwave)
  294. dev_dbg(gus->card->dev, "%s - GF1!!!\n", __func__);
  295. spin_lock_irqsave(&gus->reg_lock, flags);
  296. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  297. mb();
  298. outw((unsigned short) addr, gus->gf1.reg_data16);
  299. mb();
  300. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  301. mb();
  302. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  303. mb();
  304. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  305. mb();
  306. res = inw(gus->gf1.reg_data16);
  307. spin_unlock_irqrestore(&gus->reg_lock, flags);
  308. return res;
  309. }
  310. void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr,
  311. unsigned short value, unsigned int count)
  312. {
  313. unsigned long port;
  314. unsigned long flags;
  315. if (!gus->interwave)
  316. dev_dbg(gus->card->dev, "%s - GF1!!!\n", __func__);
  317. addr &= ~1;
  318. count >>= 1;
  319. port = GUSP(gus, GF1DATALOW);
  320. spin_lock_irqsave(&gus->reg_lock, flags);
  321. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  322. mb();
  323. outw((unsigned short) addr, gus->gf1.reg_data16);
  324. mb();
  325. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  326. mb();
  327. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  328. mb();
  329. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  330. while (count--)
  331. outw(value, port);
  332. spin_unlock_irqrestore(&gus->reg_lock, flags);
  333. }
  334. #endif /* 0 */
  335. void snd_gf1_select_active_voices(struct snd_gus_card * gus)
  336. {
  337. unsigned short voices;
  338. static const unsigned short voices_tbl[32 - 14 + 1] =
  339. {
  340. 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
  341. 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
  342. };
  343. voices = gus->gf1.active_voices;
  344. if (voices > 32)
  345. voices = 32;
  346. if (voices < 14)
  347. voices = 14;
  348. if (gus->gf1.enh_mode)
  349. voices = 32;
  350. gus->gf1.active_voices = voices;
  351. gus->gf1.playback_freq =
  352. gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14];
  353. if (!gus->gf1.enh_mode) {
  354. snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, 0xc0 | (voices - 1));
  355. udelay(100);
  356. }
  357. }
  358. #ifdef CONFIG_SND_DEBUG
  359. void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
  360. {
  361. unsigned char mode;
  362. int voice, ctrl;
  363. voice = gus->gf1.active_voice;
  364. dev_info(gus->card->dev,
  365. " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n",
  366. voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
  367. dev_info(gus->card->dev,
  368. " -%i- GF1 frequency = 0x%x\n",
  369. voice, snd_gf1_i_read16(gus, 1));
  370. dev_info(gus->card->dev,
  371. " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n",
  372. voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4),
  373. snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4),
  374. snd_gf1_i_read_addr(gus, 4, ctrl & 4),
  375. snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
  376. dev_info(gus->card->dev,
  377. " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n",
  378. voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8),
  379. snd_gf1_i_read8(gus, 6));
  380. dev_info(gus->card->dev,
  381. " -%i- GF1 volume = 0x%x\n",
  382. voice, snd_gf1_i_read16(gus, 9));
  383. dev_info(gus->card->dev,
  384. " -%i- GF1 position = 0x%x (0x%x)\n",
  385. voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4),
  386. snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
  387. if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
  388. mode = snd_gf1_i_read8(gus, 0x15);
  389. dev_info(gus->card->dev,
  390. " -%i- GFA1 mode = 0x%x\n",
  391. voice, mode);
  392. if (mode & 0x01) { /* Effect processor */
  393. dev_info(gus->card->dev,
  394. " -%i- GFA1 effect address = 0x%x\n",
  395. voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
  396. dev_info(gus->card->dev,
  397. " -%i- GFA1 effect volume = 0x%x\n",
  398. voice, snd_gf1_i_read16(gus, 0x16));
  399. dev_info(gus->card->dev,
  400. " -%i- GFA1 effect volume final = 0x%x\n",
  401. voice, snd_gf1_i_read16(gus, 0x1d));
  402. dev_info(gus->card->dev,
  403. " -%i- GFA1 effect accumulator = 0x%x\n",
  404. voice, snd_gf1_i_read8(gus, 0x14));
  405. }
  406. if (mode & 0x20) {
  407. dev_info(gus->card->dev,
  408. " -%i- GFA1 left offset = 0x%x (%i)\n",
  409. voice, snd_gf1_i_read16(gus, 0x13),
  410. snd_gf1_i_read16(gus, 0x13) >> 4);
  411. dev_info(gus->card->dev,
  412. " -%i- GFA1 left offset final = 0x%x (%i)\n",
  413. voice, snd_gf1_i_read16(gus, 0x1c),
  414. snd_gf1_i_read16(gus, 0x1c) >> 4);
  415. dev_info(gus->card->dev,
  416. " -%i- GFA1 right offset = 0x%x (%i)\n",
  417. voice, snd_gf1_i_read16(gus, 0x0c),
  418. snd_gf1_i_read16(gus, 0x0c) >> 4);
  419. dev_info(gus->card->dev,
  420. " -%i- GFA1 right offset final = 0x%x (%i)\n",
  421. voice, snd_gf1_i_read16(gus, 0x1b),
  422. snd_gf1_i_read16(gus, 0x1b) >> 4);
  423. } else
  424. dev_info(gus->card->dev,
  425. " -%i- GF1 pan = 0x%x\n",
  426. voice, snd_gf1_i_read8(gus, 0x0c));
  427. } else
  428. dev_info(gus->card->dev,
  429. " -%i- GF1 pan = 0x%x\n",
  430. voice, snd_gf1_i_read8(gus, 0x0c));
  431. }
  432. #if 0
  433. void snd_gf1_print_global_registers(struct snd_gus_card * gus)
  434. {
  435. unsigned char global_mode = 0x00;
  436. dev_info(gus->card->dev,
  437. " -G- GF1 active voices = 0x%x\n",
  438. snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
  439. if (gus->interwave) {
  440. global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
  441. dev_info(gus->card->dev,
  442. " -G- GF1 global mode = 0x%x\n",
  443. global_mode);
  444. }
  445. if (global_mode & 0x02) /* LFO enabled? */
  446. dev_info(gus->card->dev,
  447. " -G- GF1 LFO base = 0x%x\n",
  448. snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
  449. dev_info(gus->card->dev,
  450. " -G- GF1 voices IRQ read = 0x%x\n",
  451. snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
  452. dev_info(gus->card->dev,
  453. " -G- GF1 DRAM DMA control = 0x%x\n",
  454. snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
  455. dev_info(gus->card->dev,
  456. " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n",
  457. snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH),
  458. snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
  459. dev_info(gus->card->dev,
  460. " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n",
  461. snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH),
  462. snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
  463. if (!gus->interwave)
  464. dev_info(gus->card->dev,
  465. " -G- GF1 record DMA control = 0x%x\n",
  466. snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
  467. dev_info(gus->card->dev,
  468. " -G- GF1 DRAM IO 16 = 0x%x\n",
  469. snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
  470. if (gus->gf1.enh_mode) {
  471. dev_info(gus->card->dev,
  472. " -G- GFA1 memory config = 0x%x\n",
  473. snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
  474. dev_info(gus->card->dev,
  475. " -G- GFA1 memory control = 0x%x\n",
  476. snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
  477. dev_info(gus->card->dev,
  478. " -G- GFA1 FIFO record base = 0x%x\n",
  479. snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
  480. dev_info(gus->card->dev,
  481. " -G- GFA1 FIFO playback base = 0x%x\n",
  482. snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
  483. dev_info(gus->card->dev,
  484. " -G- GFA1 interleave control = 0x%x\n",
  485. snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
  486. }
  487. }
  488. void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
  489. {
  490. dev_info(gus->card->dev,
  491. " -S- mix control = 0x%x\n",
  492. inb(GUSP(gus, MIXCNTRLREG)));
  493. dev_info(gus->card->dev,
  494. " -S- IRQ status = 0x%x\n",
  495. inb(GUSP(gus, IRQSTAT)));
  496. dev_info(gus->card->dev,
  497. " -S- timer control = 0x%x\n",
  498. inb(GUSP(gus, TIMERCNTRL)));
  499. dev_info(gus->card->dev,
  500. " -S- timer data = 0x%x\n",
  501. inb(GUSP(gus, TIMERDATA)));
  502. dev_info(gus->card->dev,
  503. " -S- status read = 0x%x\n",
  504. inb(GUSP(gus, REGCNTRLS)));
  505. dev_info(gus->card->dev,
  506. " -S- Sound Blaster control = 0x%x\n",
  507. snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
  508. dev_info(gus->card->dev,
  509. " -S- AdLib timer 1/2 = 0x%x/0x%x\n",
  510. snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1),
  511. snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
  512. dev_info(gus->card->dev,
  513. " -S- reset = 0x%x\n",
  514. snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
  515. if (gus->interwave) {
  516. dev_info(gus->card->dev,
  517. " -S- compatibility = 0x%x\n",
  518. snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
  519. dev_info(gus->card->dev,
  520. " -S- decode control = 0x%x\n",
  521. snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
  522. dev_info(gus->card->dev,
  523. " -S- version number = 0x%x\n",
  524. snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
  525. dev_info(gus->card->dev,
  526. " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n",
  527. snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A),
  528. snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
  529. dev_info(gus->card->dev,
  530. " -S- emulation IRQ = 0x%x\n",
  531. snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));
  532. }
  533. }
  534. #endif /* 0 */
  535. #endif