arch-riscv.h 8.1 KB

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  1. /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
  2. /*
  3. * RISCV (32 and 64) specific definitions for NOLIBC
  4. * Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
  5. */
  6. #ifndef _NOLIBC_ARCH_RISCV_H
  7. #define _NOLIBC_ARCH_RISCV_H
  8. #include "compiler.h"
  9. #include "crt.h"
  10. /* Syscalls for RISCV :
  11. * - stack is 16-byte aligned
  12. * - syscall number is passed in a7
  13. * - arguments are in a0, a1, a2, a3, a4, a5
  14. * - the system call is performed by calling ecall
  15. * - syscall return comes in a0
  16. * - the arguments are cast to long and assigned into the target
  17. * registers which are then simply passed as registers to the asm code,
  18. * so that we don't have to experience issues with register constraints.
  19. */
  20. #define my_syscall0(num) \
  21. ({ \
  22. register long _num __asm__ ("a7") = (num); \
  23. register long _arg1 __asm__ ("a0"); \
  24. \
  25. __asm__ volatile ( \
  26. "ecall\n\t" \
  27. : "=r"(_arg1) \
  28. : "r"(_num) \
  29. : "memory", "cc" \
  30. ); \
  31. _arg1; \
  32. })
  33. #define my_syscall1(num, arg1) \
  34. ({ \
  35. register long _num __asm__ ("a7") = (num); \
  36. register long _arg1 __asm__ ("a0") = (long)(arg1); \
  37. \
  38. __asm__ volatile ( \
  39. "ecall\n" \
  40. : "+r"(_arg1) \
  41. : "r"(_num) \
  42. : "memory", "cc" \
  43. ); \
  44. _arg1; \
  45. })
  46. #define my_syscall2(num, arg1, arg2) \
  47. ({ \
  48. register long _num __asm__ ("a7") = (num); \
  49. register long _arg1 __asm__ ("a0") = (long)(arg1); \
  50. register long _arg2 __asm__ ("a1") = (long)(arg2); \
  51. \
  52. __asm__ volatile ( \
  53. "ecall\n" \
  54. : "+r"(_arg1) \
  55. : "r"(_arg2), \
  56. "r"(_num) \
  57. : "memory", "cc" \
  58. ); \
  59. _arg1; \
  60. })
  61. #define my_syscall3(num, arg1, arg2, arg3) \
  62. ({ \
  63. register long _num __asm__ ("a7") = (num); \
  64. register long _arg1 __asm__ ("a0") = (long)(arg1); \
  65. register long _arg2 __asm__ ("a1") = (long)(arg2); \
  66. register long _arg3 __asm__ ("a2") = (long)(arg3); \
  67. \
  68. __asm__ volatile ( \
  69. "ecall\n\t" \
  70. : "+r"(_arg1) \
  71. : "r"(_arg2), "r"(_arg3), \
  72. "r"(_num) \
  73. : "memory", "cc" \
  74. ); \
  75. _arg1; \
  76. })
  77. #define my_syscall4(num, arg1, arg2, arg3, arg4) \
  78. ({ \
  79. register long _num __asm__ ("a7") = (num); \
  80. register long _arg1 __asm__ ("a0") = (long)(arg1); \
  81. register long _arg2 __asm__ ("a1") = (long)(arg2); \
  82. register long _arg3 __asm__ ("a2") = (long)(arg3); \
  83. register long _arg4 __asm__ ("a3") = (long)(arg4); \
  84. \
  85. __asm__ volatile ( \
  86. "ecall\n" \
  87. : "+r"(_arg1) \
  88. : "r"(_arg2), "r"(_arg3), "r"(_arg4), \
  89. "r"(_num) \
  90. : "memory", "cc" \
  91. ); \
  92. _arg1; \
  93. })
  94. #define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
  95. ({ \
  96. register long _num __asm__ ("a7") = (num); \
  97. register long _arg1 __asm__ ("a0") = (long)(arg1); \
  98. register long _arg2 __asm__ ("a1") = (long)(arg2); \
  99. register long _arg3 __asm__ ("a2") = (long)(arg3); \
  100. register long _arg4 __asm__ ("a3") = (long)(arg4); \
  101. register long _arg5 __asm__ ("a4") = (long)(arg5); \
  102. \
  103. __asm__ volatile ( \
  104. "ecall\n" \
  105. : "+r"(_arg1) \
  106. : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
  107. "r"(_num) \
  108. : "memory", "cc" \
  109. ); \
  110. _arg1; \
  111. })
  112. #define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
  113. ({ \
  114. register long _num __asm__ ("a7") = (num); \
  115. register long _arg1 __asm__ ("a0") = (long)(arg1); \
  116. register long _arg2 __asm__ ("a1") = (long)(arg2); \
  117. register long _arg3 __asm__ ("a2") = (long)(arg3); \
  118. register long _arg4 __asm__ ("a3") = (long)(arg4); \
  119. register long _arg5 __asm__ ("a4") = (long)(arg5); \
  120. register long _arg6 __asm__ ("a5") = (long)(arg6); \
  121. \
  122. __asm__ volatile ( \
  123. "ecall\n" \
  124. : "+r"(_arg1) \
  125. : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
  126. "r"(_num) \
  127. : "memory", "cc" \
  128. ); \
  129. _arg1; \
  130. })
  131. /* startup code */
  132. void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)
  133. {
  134. __asm__ volatile (
  135. ".option push\n"
  136. ".option norelax\n"
  137. "lla gp, __global_pointer$\n"
  138. ".option pop\n"
  139. "mv a0, sp\n" /* save stack pointer to a0, as arg1 of _start_c */
  140. "andi sp, a0, -16\n" /* sp must be 16-byte aligned */
  141. "call _start_c\n" /* transfer to c runtime */
  142. );
  143. __nolibc_entrypoint_epilogue();
  144. }
  145. #endif /* _NOLIBC_ARCH_RISCV_H */