Kconfig 18 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config SUPERH
  3. def_bool y
  4. select ARCH_32BIT_OFF_T
  5. select ARCH_HAS_CPU_CACHE_ALIASING
  6. select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
  7. select ARCH_HAS_BINFMT_FLAT if !MMU
  8. select ARCH_HAS_CPU_FINALIZE_INIT
  9. select ARCH_HAS_CURRENT_STACK_POINTER
  10. select ARCH_HAS_GIGANTIC_PAGE
  11. select ARCH_HAS_GCOV_PROFILE_ALL
  12. select ARCH_HAS_PTE_SPECIAL
  13. select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  14. select ARCH_HIBERNATION_POSSIBLE if MMU
  15. select ARCH_MIGHT_HAVE_PC_PARPORT
  16. select ARCH_WANT_IPC_PARSE_VERSION
  17. select ARCH_NEED_CMPXCHG_1_EMU
  18. select CPU_NO_EFFICIENT_FFS
  19. select DMA_DECLARE_COHERENT
  20. select GENERIC_ATOMIC64
  21. select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
  22. select GENERIC_IDLE_POLL_SETUP
  23. select GENERIC_IRQ_SHOW
  24. select GENERIC_LIB_ASHLDI3
  25. select GENERIC_LIB_ASHRDI3
  26. select GENERIC_LIB_LSHRDI3
  27. select GENERIC_PCI_IOMAP if PCI
  28. select GENERIC_SCHED_CLOCK
  29. select GENERIC_SMP_IDLE_THREAD
  30. select GUP_GET_PXX_LOW_HIGH if X2TLB
  31. select HAS_IOPORT if HAS_IOPORT_MAP
  32. select GENERIC_IOREMAP if MMU
  33. select HAVE_ARCH_AUDITSYSCALL
  34. select HAVE_ARCH_KGDB
  35. select HAVE_ARCH_SECCOMP_FILTER
  36. select HAVE_ARCH_TRACEHOOK
  37. select HAVE_DEBUG_BUGVERBOSE
  38. select HAVE_DEBUG_KMEMLEAK
  39. select HAVE_DYNAMIC_FTRACE
  40. select HAVE_GUP_FAST if MMU
  41. select HAVE_FUNCTION_GRAPH_TRACER
  42. select HAVE_FUNCTION_TRACER
  43. select HAVE_FTRACE_MCOUNT_RECORD
  44. select HAVE_HW_BREAKPOINT
  45. select HAVE_IOREMAP_PROT if MMU && !X2TLB
  46. select HAVE_KERNEL_BZIP2
  47. select HAVE_KERNEL_GZIP
  48. select HAVE_KERNEL_LZMA
  49. select HAVE_KERNEL_LZO
  50. select HAVE_KERNEL_XZ
  51. select HAVE_KPROBES
  52. select HAVE_KRETPROBES
  53. select HAVE_MIXED_BREAKPOINTS_REGS
  54. select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
  55. select HAVE_NMI
  56. select HAVE_PATA_PLATFORM
  57. select HAVE_PERF_EVENTS
  58. select HAVE_REGS_AND_STACK_ACCESS_API
  59. select HAVE_UID16
  60. select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
  61. select HAVE_STACKPROTECTOR
  62. select HAVE_SYSCALL_TRACEPOINTS
  63. select IRQ_FORCED_THREADING
  64. select LOCK_MM_AND_FIND_VMA
  65. select MODULES_USE_ELF_RELA
  66. select NEED_SG_DMA_LENGTH
  67. select NO_DMA if !MMU && !DMA_COHERENT
  68. select NO_GENERIC_PCI_IOPORT_MAP if PCI
  69. select OLD_SIGACTION
  70. select OLD_SIGSUSPEND
  71. select PCI_DOMAINS if PCI
  72. select PERF_EVENTS
  73. select PERF_USE_VMALLOC
  74. select RTC_LIB
  75. select SPARSE_IRQ
  76. select TRACE_IRQFLAGS_SUPPORT
  77. help
  78. The SuperH is a RISC processor targeted for use in embedded systems
  79. and consumer electronics; it was also used in the Sega Dreamcast
  80. gaming console. The SuperH port has a home page at
  81. <http://www.linux-sh.org/>.
  82. config GENERIC_BUG
  83. def_bool y
  84. depends on BUG
  85. config GENERIC_HWEIGHT
  86. def_bool y
  87. config GENERIC_CALIBRATE_DELAY
  88. bool
  89. config GENERIC_LOCKBREAK
  90. def_bool y
  91. depends on SMP && PREEMPTION
  92. config ARCH_SUSPEND_POSSIBLE
  93. def_bool n
  94. config ARCH_HIBERNATION_POSSIBLE
  95. def_bool n
  96. config SYS_SUPPORTS_APM_EMULATION
  97. bool
  98. select ARCH_SUSPEND_POSSIBLE
  99. config SYS_SUPPORTS_SMP
  100. bool
  101. config SYS_SUPPORTS_NUMA
  102. bool
  103. config STACKTRACE_SUPPORT
  104. def_bool y
  105. config LOCKDEP_SUPPORT
  106. def_bool y
  107. config ARCH_HAS_ILOG2_U32
  108. def_bool n
  109. config ARCH_HAS_ILOG2_U64
  110. def_bool n
  111. config NO_IOPORT_MAP
  112. def_bool !PCI
  113. depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \
  114. !SH_DREAMCAST
  115. config IO_TRAPPED
  116. bool
  117. config SWAP_IO_SPACE
  118. bool
  119. config DMA_COHERENT
  120. bool
  121. config DMA_NONCOHERENT
  122. def_bool !NO_DMA && !DMA_COHERENT
  123. select ARCH_HAS_DMA_PREP_COHERENT
  124. select ARCH_HAS_SYNC_DMA_FOR_DEVICE
  125. select DMA_DIRECT_REMAP
  126. config PGTABLE_LEVELS
  127. default 3 if X2TLB
  128. default 2
  129. menu "System type"
  130. #
  131. # Processor families
  132. #
  133. config CPU_SH2
  134. bool
  135. select SH_INTC
  136. config CPU_SH2A
  137. bool
  138. select CPU_SH2
  139. select UNCACHED_MAPPING
  140. config CPU_J2
  141. bool
  142. select CPU_SH2
  143. select OF
  144. select OF_EARLY_FLATTREE
  145. config CPU_SH3
  146. bool
  147. select CPU_HAS_INTEVT
  148. select CPU_HAS_SR_RB
  149. select SH_INTC
  150. select SYS_SUPPORTS_SH_TMU
  151. config CPU_SH4
  152. bool
  153. select ARCH_SUPPORTS_HUGETLBFS if MMU
  154. select CPU_HAS_INTEVT
  155. select CPU_HAS_SR_RB
  156. select CPU_HAS_FPU if !CPU_SH4AL_DSP
  157. select SH_INTC
  158. select SYS_SUPPORTS_SH_TMU
  159. config CPU_SH4A
  160. bool
  161. select CPU_SH4
  162. config CPU_SH4AL_DSP
  163. bool
  164. select CPU_SH4A
  165. select CPU_HAS_DSP
  166. config CPU_SHX2
  167. bool
  168. config CPU_SHX3
  169. bool
  170. select DMA_COHERENT
  171. select SYS_SUPPORTS_SMP
  172. select SYS_SUPPORTS_NUMA
  173. config ARCH_SHMOBILE
  174. bool
  175. select ARCH_SUSPEND_POSSIBLE
  176. select PM
  177. config CPU_HAS_PMU
  178. depends on CPU_SH4 || CPU_SH4A
  179. default y
  180. bool
  181. choice
  182. prompt "Processor sub-type selection"
  183. #
  184. # Processor subtypes
  185. #
  186. # SH-2 Processor Support
  187. config CPU_SUBTYPE_SH7619
  188. bool "Support SH7619 processor"
  189. select CPU_SH2
  190. select SYS_SUPPORTS_SH_CMT
  191. config CPU_SUBTYPE_J2
  192. bool "Support J2 processor"
  193. select CPU_J2
  194. select SYS_SUPPORTS_SMP
  195. select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  196. # SH-2A Processor Support
  197. config CPU_SUBTYPE_SH7201
  198. bool "Support SH7201 processor"
  199. select CPU_SH2A
  200. select CPU_HAS_FPU
  201. select SYS_SUPPORTS_SH_MTU2
  202. config CPU_SUBTYPE_SH7203
  203. bool "Support SH7203 processor"
  204. select CPU_SH2A
  205. select CPU_HAS_FPU
  206. select SYS_SUPPORTS_SH_CMT
  207. select SYS_SUPPORTS_SH_MTU2
  208. select PINCTRL
  209. config CPU_SUBTYPE_SH7206
  210. bool "Support SH7206 processor"
  211. select CPU_SH2A
  212. select SYS_SUPPORTS_SH_CMT
  213. select SYS_SUPPORTS_SH_MTU2
  214. config CPU_SUBTYPE_SH7263
  215. bool "Support SH7263 processor"
  216. select CPU_SH2A
  217. select CPU_HAS_FPU
  218. select SYS_SUPPORTS_SH_CMT
  219. select SYS_SUPPORTS_SH_MTU2
  220. config CPU_SUBTYPE_SH7264
  221. bool "Support SH7264 processor"
  222. select CPU_SH2A
  223. select CPU_HAS_FPU
  224. select SYS_SUPPORTS_SH_CMT
  225. select SYS_SUPPORTS_SH_MTU2
  226. select PINCTRL
  227. config CPU_SUBTYPE_SH7269
  228. bool "Support SH7269 processor"
  229. select CPU_SH2A
  230. select CPU_HAS_FPU
  231. select SYS_SUPPORTS_SH_CMT
  232. select SYS_SUPPORTS_SH_MTU2
  233. select PINCTRL
  234. config CPU_SUBTYPE_MXG
  235. bool "Support MX-G processor"
  236. select CPU_SH2A
  237. select SYS_SUPPORTS_SH_MTU2
  238. help
  239. Select MX-G if running on an R8A03022BG part.
  240. # SH-3 Processor Support
  241. config CPU_SUBTYPE_SH7705
  242. bool "Support SH7705 processor"
  243. select CPU_SH3
  244. config CPU_SUBTYPE_SH7706
  245. bool "Support SH7706 processor"
  246. select CPU_SH3
  247. help
  248. Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
  249. config CPU_SUBTYPE_SH7707
  250. bool "Support SH7707 processor"
  251. select CPU_SH3
  252. help
  253. Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
  254. config CPU_SUBTYPE_SH7708
  255. bool "Support SH7708 processor"
  256. select CPU_SH3
  257. help
  258. Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
  259. if you have a 100 Mhz SH-3 HD6417708R CPU.
  260. config CPU_SUBTYPE_SH7709
  261. bool "Support SH7709 processor"
  262. select CPU_SH3
  263. help
  264. Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
  265. config CPU_SUBTYPE_SH7710
  266. bool "Support SH7710 processor"
  267. select CPU_SH3
  268. select CPU_HAS_DSP
  269. help
  270. Select SH7710 if you have a SH3-DSP SH7710 CPU.
  271. config CPU_SUBTYPE_SH7712
  272. bool "Support SH7712 processor"
  273. select CPU_SH3
  274. select CPU_HAS_DSP
  275. help
  276. Select SH7712 if you have a SH3-DSP SH7712 CPU.
  277. config CPU_SUBTYPE_SH7720
  278. bool "Support SH7720 processor"
  279. select CPU_SH3
  280. select CPU_HAS_DSP
  281. select SYS_SUPPORTS_SH_CMT
  282. select USB_OHCI_SH if USB_OHCI_HCD
  283. select PINCTRL
  284. help
  285. Select SH7720 if you have a SH3-DSP SH7720 CPU.
  286. config CPU_SUBTYPE_SH7721
  287. bool "Support SH7721 processor"
  288. select CPU_SH3
  289. select CPU_HAS_DSP
  290. select SYS_SUPPORTS_SH_CMT
  291. select USB_OHCI_SH if USB_OHCI_HCD
  292. help
  293. Select SH7721 if you have a SH3-DSP SH7721 CPU.
  294. # SH-4 Processor Support
  295. config CPU_SUBTYPE_SH7750
  296. bool "Support SH7750 processor"
  297. select CPU_SH4
  298. help
  299. Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
  300. config CPU_SUBTYPE_SH7091
  301. bool "Support SH7091 processor"
  302. select CPU_SH4
  303. help
  304. Select SH7091 if you have an SH-4 based Sega device (such as
  305. the Dreamcast, Naomi, and Naomi 2).
  306. config CPU_SUBTYPE_SH7750R
  307. bool "Support SH7750R processor"
  308. select CPU_SH4
  309. config CPU_SUBTYPE_SH7750S
  310. bool "Support SH7750S processor"
  311. select CPU_SH4
  312. config CPU_SUBTYPE_SH7751
  313. bool "Support SH7751 processor"
  314. select CPU_SH4
  315. help
  316. Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
  317. or if you have a HD6417751R CPU.
  318. config CPU_SUBTYPE_SH7751R
  319. bool "Support SH7751R processor"
  320. select CPU_SH4
  321. config CPU_SUBTYPE_SH7760
  322. bool "Support SH7760 processor"
  323. select CPU_SH4
  324. # SH-4A Processor Support
  325. config CPU_SUBTYPE_SH7723
  326. bool "Support SH7723 processor"
  327. select CPU_SH4A
  328. select CPU_SHX2
  329. select ARCH_SHMOBILE
  330. select ARCH_SPARSEMEM_ENABLE
  331. select SYS_SUPPORTS_SH_CMT
  332. select PINCTRL
  333. help
  334. Select SH7723 if you have an SH-MobileR2 CPU.
  335. config CPU_SUBTYPE_SH7724
  336. bool "Support SH7724 processor"
  337. select CPU_SH4A
  338. select CPU_SHX2
  339. select ARCH_SHMOBILE
  340. select ARCH_SPARSEMEM_ENABLE
  341. select SYS_SUPPORTS_SH_CMT
  342. select PINCTRL
  343. help
  344. Select SH7724 if you have an SH-MobileR2R CPU.
  345. config CPU_SUBTYPE_SH7734
  346. bool "Support SH7734 processor"
  347. select CPU_SH4A
  348. select CPU_SHX2
  349. select PINCTRL
  350. help
  351. Select SH7734 if you have a SH4A SH7734 CPU.
  352. config CPU_SUBTYPE_SH7757
  353. bool "Support SH7757 processor"
  354. select CPU_SH4A
  355. select CPU_SHX2
  356. select PINCTRL
  357. help
  358. Select SH7757 if you have a SH4A SH7757 CPU.
  359. config CPU_SUBTYPE_SH7763
  360. bool "Support SH7763 processor"
  361. select CPU_SH4A
  362. select USB_OHCI_SH if USB_OHCI_HCD
  363. help
  364. Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
  365. config CPU_SUBTYPE_SH7770
  366. bool "Support SH7770 processor"
  367. select CPU_SH4A
  368. config CPU_SUBTYPE_SH7780
  369. bool "Support SH7780 processor"
  370. select CPU_SH4A
  371. config CPU_SUBTYPE_SH7785
  372. bool "Support SH7785 processor"
  373. select CPU_SH4A
  374. select CPU_SHX2
  375. select ARCH_SPARSEMEM_ENABLE
  376. select SYS_SUPPORTS_NUMA
  377. select PINCTRL
  378. config CPU_SUBTYPE_SH7786
  379. bool "Support SH7786 processor"
  380. select CPU_SH4A
  381. select CPU_SHX3
  382. select CPU_HAS_PTEAEX
  383. select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  384. select USB_OHCI_SH if USB_OHCI_HCD
  385. select USB_EHCI_SH if USB_EHCI_HCD
  386. select PINCTRL
  387. config CPU_SUBTYPE_SHX3
  388. bool "Support SH-X3 processor"
  389. select CPU_SH4A
  390. select CPU_SHX3
  391. select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  392. select GPIOLIB
  393. select PINCTRL
  394. # SH4AL-DSP Processor Support
  395. config CPU_SUBTYPE_SH7343
  396. bool "Support SH7343 processor"
  397. select CPU_SH4AL_DSP
  398. select ARCH_SHMOBILE
  399. select SYS_SUPPORTS_SH_CMT
  400. config CPU_SUBTYPE_SH7722
  401. bool "Support SH7722 processor"
  402. select CPU_SH4AL_DSP
  403. select CPU_SHX2
  404. select ARCH_SHMOBILE
  405. select ARCH_SPARSEMEM_ENABLE
  406. select SYS_SUPPORTS_NUMA
  407. select SYS_SUPPORTS_SH_CMT
  408. select PINCTRL
  409. config CPU_SUBTYPE_SH7366
  410. bool "Support SH7366 processor"
  411. select CPU_SH4AL_DSP
  412. select CPU_SHX2
  413. select ARCH_SHMOBILE
  414. select ARCH_SPARSEMEM_ENABLE
  415. select SYS_SUPPORTS_NUMA
  416. select SYS_SUPPORTS_SH_CMT
  417. endchoice
  418. source "arch/sh/mm/Kconfig"
  419. source "arch/sh/Kconfig.cpu"
  420. source "arch/sh/boards/Kconfig"
  421. menu "Timer and clock configuration"
  422. config SH_PCLK_FREQ
  423. int "Peripheral clock frequency (in Hz)"
  424. depends on SH_CLK_CPG_LEGACY
  425. default "31250000" if CPU_SUBTYPE_SH7619
  426. default "33333333" if CPU_SUBTYPE_SH7770 || \
  427. CPU_SUBTYPE_SH7760 || \
  428. CPU_SUBTYPE_SH7705 || \
  429. CPU_SUBTYPE_SH7203 || \
  430. CPU_SUBTYPE_SH7206 || \
  431. CPU_SUBTYPE_SH7263 || \
  432. CPU_SUBTYPE_MXG
  433. default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
  434. default "50000000"
  435. help
  436. This option is used to specify the peripheral clock frequency.
  437. This is necessary for determining the reference clock value on
  438. platforms lacking an RTC.
  439. config SH_CLK_CPG
  440. def_bool y
  441. config SH_CLK_CPG_LEGACY
  442. depends on SH_CLK_CPG
  443. def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
  444. !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
  445. !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
  446. !CPU_SUBTYPE_SH7269
  447. endmenu
  448. menu "CPU Frequency scaling"
  449. source "drivers/cpufreq/Kconfig"
  450. endmenu
  451. source "arch/sh/drivers/Kconfig"
  452. endmenu
  453. menu "Kernel features"
  454. source "kernel/Kconfig.hz"
  455. config ARCH_SUPPORTS_KEXEC
  456. def_bool MMU
  457. config ARCH_SUPPORTS_CRASH_DUMP
  458. def_bool BROKEN_ON_SMP
  459. config ARCH_DEFAULT_CRASH_DUMP
  460. def_bool y
  461. config ARCH_SUPPORTS_KEXEC_JUMP
  462. def_bool y
  463. config PHYSICAL_START
  464. hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
  465. default MEMORY_START
  466. help
  467. This gives the physical address where the kernel is loaded
  468. and is ordinarily the same as MEMORY_START.
  469. Different values are primarily used in the case of kexec on panic
  470. where the fail safe kernel needs to run at a different address
  471. than the panic-ed kernel.
  472. config SMP
  473. bool "Symmetric multi-processing support"
  474. depends on SYS_SUPPORTS_SMP
  475. help
  476. This enables support for systems with more than one CPU. If you have
  477. a system with only one CPU, say N. If you have a system with more
  478. than one CPU, say Y.
  479. If you say N here, the kernel will run on uni- and multiprocessor
  480. machines, but will use only one CPU of a multiprocessor machine. If
  481. you say Y here, the kernel will run on many, but not all,
  482. uniprocessor machines. On a uniprocessor machine, the kernel
  483. will run faster if you say N here.
  484. People using multiprocessor machines who say Y here should also say
  485. Y to "Enhanced Real Time Clock Support", below.
  486. See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
  487. available at <https://www.tldp.org/docs.html#howto>.
  488. If you don't know what to do here, say N.
  489. config NR_CPUS
  490. int "Maximum number of CPUs (2-32)"
  491. range 2 32
  492. depends on SMP
  493. default "4" if CPU_SUBTYPE_SHX3
  494. default "2"
  495. help
  496. This allows you to specify the maximum number of CPUs which this
  497. kernel will support. The maximum supported value is 32 and the
  498. minimum value which makes sense is 2.
  499. This is purely to save memory - each supported CPU adds
  500. approximately eight kilobytes to the kernel image.
  501. config HOTPLUG_CPU
  502. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  503. depends on SMP
  504. help
  505. Say Y here to experiment with turning CPUs off and on. CPUs
  506. can be controlled through /sys/devices/system/cpu.
  507. config GUSA
  508. def_bool y
  509. depends on !SMP
  510. help
  511. This enables support for gUSA (general UserSpace Atomicity).
  512. This is the default implementation for both UP and non-ll/sc
  513. CPUs, and is used by the libc, amongst others.
  514. For additional information, design information can be found
  515. in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
  516. This should only be disabled for special cases where alternate
  517. atomicity implementations exist.
  518. config GUSA_RB
  519. bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
  520. depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
  521. help
  522. Enabling this option will allow the kernel to implement some
  523. atomic operations using a software implementation of load-locked/
  524. store-conditional (LLSC). On machines which do not have hardware
  525. LLSC, this should be more efficient than the other alternative of
  526. disabling interrupts around the atomic sequence.
  527. config HW_PERF_EVENTS
  528. bool "Enable hardware performance counter support for perf events"
  529. depends on PERF_EVENTS && CPU_HAS_PMU
  530. default y
  531. help
  532. Enable hardware performance counter support for perf events. If
  533. disabled, perf events will use software events only.
  534. source "drivers/sh/Kconfig"
  535. endmenu
  536. menu "Boot options"
  537. config USE_BUILTIN_DTB
  538. bool "Use builtin DTB"
  539. default n
  540. depends on SH_DEVICE_TREE
  541. help
  542. Link a device tree blob for particular hardware into the kernel,
  543. suppressing use of the DTB pointer provided by the bootloader.
  544. This option should only be used with legacy bootloaders that are
  545. not capable of providing a DTB to the kernel, or for experimental
  546. hardware without stable device tree bindings.
  547. config BUILTIN_DTB_SOURCE
  548. string "Source file for builtin DTB"
  549. default ""
  550. depends on USE_BUILTIN_DTB
  551. help
  552. Base name (without suffix, relative to arch/sh/boot/dts) for the
  553. a DTS file that will be used to produce the DTB linked into the
  554. kernel.
  555. config ZERO_PAGE_OFFSET
  556. hex
  557. default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
  558. SH_7751_SOLUTION_ENGINE
  559. default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
  560. default "0x00002000" if PAGE_SIZE_8KB
  561. default "0x00001000"
  562. help
  563. This sets the default offset of zero page.
  564. config BOOT_LINK_OFFSET
  565. hex
  566. default "0x00210000" if SH_SHMIN
  567. default "0x00810000" if SH_7780_SOLUTION_ENGINE
  568. default "0x009e0000" if SH_TITAN
  569. default "0x01800000" if SH_SDK7780
  570. default "0x02000000" if SH_EDOSK7760
  571. default "0x00800000"
  572. help
  573. This option allows you to set the link address offset of the zImage.
  574. This can be useful if you are on a board which has a small amount of
  575. memory.
  576. config ENTRY_OFFSET
  577. hex
  578. default "0x00001000" if PAGE_SIZE_4KB
  579. default "0x00002000" if PAGE_SIZE_8KB
  580. default "0x00004000" if PAGE_SIZE_16KB
  581. default "0x00010000" if PAGE_SIZE_64KB
  582. default "0x00000000"
  583. config ROMIMAGE_MMCIF
  584. bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
  585. depends on CPU_SUBTYPE_SH7724
  586. help
  587. Say Y here to include experimental MMCIF loading code in
  588. romImage. With this enabled it is possible to write the romImage
  589. kernel image to an MMC card and boot the kernel straight from
  590. the reset vector. At reset the processor Mask ROM will load the
  591. first part of the romImage which in turn loads the rest the kernel
  592. image to RAM using the MMCIF hardware block.
  593. choice
  594. prompt "Kernel command line"
  595. default CMDLINE_OVERWRITE
  596. help
  597. Setting this option allows the kernel command line arguments
  598. to be set.
  599. config CMDLINE_OVERWRITE
  600. bool "Overwrite bootloader kernel arguments"
  601. help
  602. Given string will overwrite any arguments passed in by
  603. a bootloader.
  604. config CMDLINE_EXTEND
  605. bool "Extend bootloader kernel arguments"
  606. help
  607. Given string will be concatenated with arguments passed in
  608. by a bootloader.
  609. config CMDLINE_FROM_BOOTLOADER
  610. bool "Use bootloader kernel arguments"
  611. help
  612. Uses the command-line options passed by the boot loader.
  613. endchoice
  614. config CMDLINE
  615. string "Kernel command line arguments string"
  616. depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
  617. default "console=ttySC1,115200"
  618. endmenu
  619. menu "Bus options"
  620. config MAPLE
  621. bool "Maple Bus support"
  622. depends on SH_DREAMCAST
  623. help
  624. The Maple Bus is SEGA's serial communication bus for peripherals
  625. on the Dreamcast. Without this bus support you won't be able to
  626. get your Dreamcast keyboard etc to work, so most users
  627. probably want to say 'Y' here, unless you are only using the
  628. Dreamcast with a serial line terminal or a remote network
  629. connection.
  630. endmenu
  631. menu "Power management options (EXPERIMENTAL)"
  632. source "kernel/power/Kconfig"
  633. source "drivers/cpuidle/Kconfig"
  634. endmenu