owl-dma.yaml 1.7 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/dma/owl-dma.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Actions Semi Owl SoCs DMA controller
  7. description: |
  8. The OWL DMA is a general-purpose direct memory access controller capable of
  9. supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
  10. independent DMA channels for the S500 and S900 SoC variants.
  11. maintainers:
  12. - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  13. allOf:
  14. - $ref: dma-controller.yaml#
  15. properties:
  16. compatible:
  17. enum:
  18. - actions,s500-dma
  19. - actions,s700-dma
  20. - actions,s900-dma
  21. reg:
  22. maxItems: 1
  23. interrupts:
  24. description:
  25. controller supports 4 interrupts, which are freely assignable to the
  26. DMA channels.
  27. maxItems: 4
  28. "#dma-cells":
  29. const: 1
  30. dma-channels:
  31. maximum: 12
  32. dma-requests:
  33. maximum: 46
  34. clocks:
  35. maxItems: 1
  36. description:
  37. Phandle and Specifier of the clock feeding the DMA controller.
  38. power-domains:
  39. maxItems: 1
  40. required:
  41. - compatible
  42. - reg
  43. - interrupts
  44. - "#dma-cells"
  45. - dma-channels
  46. - dma-requests
  47. - clocks
  48. unevaluatedProperties: false
  49. examples:
  50. - |
  51. #include <dt-bindings/interrupt-controller/arm-gic.h>
  52. dma: dma-controller@e0260000 {
  53. compatible = "actions,s900-dma";
  54. reg = <0xe0260000 0x1000>;
  55. interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
  56. <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
  57. <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
  58. <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
  59. #dma-cells = <1>;
  60. dma-channels = <12>;
  61. dma-requests = <46>;
  62. clocks = <&clock 22>;
  63. };
  64. ...