qcom,gpi.yaml 3.2 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm Technologies Inc GPI DMA controller
  7. maintainers:
  8. - Vinod Koul <vkoul@kernel.org>
  9. description: |
  10. QCOM GPI DMA controller provides DMA capabilities for
  11. peripheral buses such as I2C, UART, and SPI.
  12. allOf:
  13. - $ref: dma-controller.yaml#
  14. properties:
  15. compatible:
  16. oneOf:
  17. - enum:
  18. - qcom,sdm845-gpi-dma
  19. - qcom,sm6350-gpi-dma
  20. - items:
  21. - enum:
  22. - qcom,qcm2290-gpi-dma
  23. - qcom,qdu1000-gpi-dma
  24. - qcom,sc7280-gpi-dma
  25. - qcom,sdx75-gpi-dma
  26. - qcom,sm6115-gpi-dma
  27. - qcom,sm6375-gpi-dma
  28. - qcom,sm8350-gpi-dma
  29. - qcom,sm8450-gpi-dma
  30. - qcom,sm8550-gpi-dma
  31. - qcom,sm8650-gpi-dma
  32. - qcom,x1e80100-gpi-dma
  33. - const: qcom,sm6350-gpi-dma
  34. - items:
  35. - enum:
  36. - qcom,sdm670-gpi-dma
  37. - qcom,sm6125-gpi-dma
  38. - qcom,sm8150-gpi-dma
  39. - qcom,sm8250-gpi-dma
  40. - const: qcom,sdm845-gpi-dma
  41. reg:
  42. maxItems: 1
  43. interrupts:
  44. description:
  45. Interrupt lines for each GPI instance
  46. minItems: 1
  47. maxItems: 13
  48. "#dma-cells":
  49. const: 3
  50. description: >
  51. DMA clients must use the format described in dma.txt, giving a phandle
  52. to the DMA controller plus the following 3 integer cells:
  53. - channel: if set to 0xffffffff, any available channel will be allocated
  54. for the client. Otherwise, the exact channel specified will be used.
  55. - seid: serial id of the client as defined in the SoC documentation.
  56. - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
  57. iommus:
  58. maxItems: 1
  59. dma-channels:
  60. maximum: 31
  61. dma-channel-mask:
  62. maxItems: 1
  63. dma-coherent: true
  64. required:
  65. - compatible
  66. - reg
  67. - interrupts
  68. - "#dma-cells"
  69. - iommus
  70. - dma-channels
  71. - dma-channel-mask
  72. additionalProperties: false
  73. examples:
  74. - |
  75. #include <dt-bindings/interrupt-controller/arm-gic.h>
  76. #include <dt-bindings/dma/qcom-gpi.h>
  77. gpi_dma0: dma-controller@800000 {
  78. compatible = "qcom,sdm845-gpi-dma";
  79. #dma-cells = <3>;
  80. reg = <0x00800000 0x60000>;
  81. iommus = <&apps_smmu 0x0016 0x0>;
  82. dma-channels = <13>;
  83. dma-channel-mask = <0xfa>;
  84. interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
  85. <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
  86. <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
  87. <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
  88. <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
  89. <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
  90. <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
  91. <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
  92. <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
  93. <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
  94. <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
  95. <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
  96. <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
  97. };
  98. ...