sprd,gpio-eic.yaml 3.6 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. # Copyright 2022 Unisoc Inc.
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: Unisoc EIC controller
  8. maintainers:
  9. - Orson Zhai <orsonzhai@gmail.com>
  10. - Baolin Wang <baolin.wang7@gmail.com>
  11. - Chunyan Zhang <zhang.lyra@gmail.com>
  12. description: |
  13. The EIC is the abbreviation of external interrupt controller, which can
  14. be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
  15. one is in digital chip, and another one is in PMIC. The digital chip EIC
  16. controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
  17. EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
  18. module.
  19. The EIC-debounce sub-module provides up to 8 source input signal
  20. connections. A debounce mechanism is used to capture the input signals'
  21. stable status (millisecond resolution) and a single-trigger mechanism
  22. is introduced into this sub-module to enhance the input event detection
  23. reliability. In addition, this sub-module's clock can be shut off
  24. automatically to reduce power dissipation. Moreover the debounce range
  25. is from 1ms to 4s with a step size of 1ms. The input signal will be
  26. ignored if it is asserted for less than 1 ms.
  27. The EIC-latch sub-module is used to latch some special power down signals
  28. and generate interrupts, since the EIC-latch does not depend on the APB
  29. clock to capture signals.
  30. The EIC-async sub-module uses a 32kHz clock to capture the short signals
  31. (microsecond resolution) to generate interrupts by level or edge trigger.
  32. The EIC-sync is similar with GPIO's input function, which is a synchronized
  33. signal input register. It can generate interrupts by level or edge trigger
  34. when detecting input signals.
  35. properties:
  36. compatible:
  37. oneOf:
  38. - enum:
  39. - sprd,sc9860-eic-debounce
  40. - sprd,sc9860-eic-latch
  41. - sprd,sc9860-eic-async
  42. - sprd,sc9860-eic-sync
  43. - sprd,sc2731-eic
  44. - items:
  45. - enum:
  46. - sprd,ums512-eic-debounce
  47. - const: sprd,sc9860-eic-debounce
  48. - items:
  49. - enum:
  50. - sprd,ums512-eic-latch
  51. - const: sprd,sc9860-eic-latch
  52. - items:
  53. - enum:
  54. - sprd,ums512-eic-async
  55. - const: sprd,sc9860-eic-async
  56. - items:
  57. - enum:
  58. - sprd,ums512-eic-sync
  59. - const: sprd,sc9860-eic-sync
  60. - items:
  61. - enum:
  62. - sprd,sc2730-eic
  63. - const: sprd,sc2731-eic
  64. reg:
  65. minItems: 1
  66. maxItems: 3
  67. description:
  68. EIC controller can support maximum 3 banks which has its own
  69. address base.
  70. gpio-controller: true
  71. "#gpio-cells":
  72. const: 2
  73. interrupt-controller: true
  74. "#interrupt-cells":
  75. const: 2
  76. interrupts:
  77. maxItems: 1
  78. description:
  79. The interrupt shared by all GPIO lines for this controller.
  80. required:
  81. - compatible
  82. - reg
  83. - gpio-controller
  84. - "#gpio-cells"
  85. - interrupt-controller
  86. - "#interrupt-cells"
  87. - interrupts
  88. additionalProperties: false
  89. examples:
  90. - |
  91. #include <dt-bindings/interrupt-controller/arm-gic.h>
  92. soc {
  93. #address-cells = <2>;
  94. #size-cells = <2>;
  95. eic_debounce: gpio@40210000 {
  96. compatible = "sprd,sc9860-eic-debounce";
  97. reg = <0 0x40210000 0 0x80>;
  98. gpio-controller;
  99. #gpio-cells = <2>;
  100. interrupt-controller;
  101. #interrupt-cells = <2>;
  102. interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  103. };
  104. };
  105. ...