i2c-exynos5.yaml 3.6 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Samsung's High Speed I2C controller
  7. maintainers:
  8. - Krzysztof Kozlowski <krzk@kernel.org>
  9. description: |
  10. The Samsung's High Speed I2C controller is used to interface with I2C devices
  11. at various speeds ranging from 100kHz to 3.4MHz.
  12. In case the HSI2C controller is encapsulated within USI block (it's the case
  13. e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
  14. define USI node in device tree file, choosing "i2c" configuration. Please see
  15. Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
  16. properties:
  17. compatible:
  18. oneOf:
  19. - enum:
  20. - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
  21. - samsung,exynos5260-hsi2c # Exynos5260
  22. - samsung,exynos7-hsi2c # Exynos7
  23. - samsung,exynosautov9-hsi2c
  24. - items:
  25. - enum:
  26. - samsung,exynos5433-hsi2c
  27. - tesla,fsd-hsi2c
  28. - const: samsung,exynos7-hsi2c
  29. - items:
  30. - enum:
  31. - google,gs101-hsi2c
  32. - samsung,exynos850-hsi2c
  33. - const: samsung,exynosautov9-hsi2c
  34. - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
  35. deprecated: true
  36. reg:
  37. maxItems: 1
  38. interrupts:
  39. maxItems: 1
  40. clock-frequency:
  41. default: 100000
  42. description:
  43. Desired operating frequency in Hz of the bus.
  44. If not specified, the bus operates in fast-speed mode at 100kHz.
  45. If specified, the bus operates in high-speed mode only if the
  46. clock-frequency is >= 1MHz.
  47. clocks:
  48. minItems: 1
  49. items:
  50. - description: I2C operating clock
  51. - description: Bus clock (APB)
  52. clock-names:
  53. minItems: 1
  54. items:
  55. - const: hsi2c
  56. - const: hsi2c_pclk
  57. required:
  58. - compatible
  59. - reg
  60. - interrupts
  61. - clocks
  62. allOf:
  63. - $ref: /schemas/i2c/i2c-controller.yaml#
  64. - if:
  65. properties:
  66. compatible:
  67. contains:
  68. enum:
  69. - samsung,exynosautov9-hsi2c
  70. then:
  71. properties:
  72. clocks:
  73. minItems: 2
  74. clock-names:
  75. minItems: 2
  76. required:
  77. - clock-names
  78. else:
  79. properties:
  80. clocks:
  81. maxItems: 1
  82. unevaluatedProperties: false
  83. examples:
  84. - |
  85. #include <dt-bindings/clock/exynos5420.h>
  86. #include <dt-bindings/interrupt-controller/arm-gic.h>
  87. #include <dt-bindings/interrupt-controller/irq.h>
  88. hsi2c_8: i2c@12e00000 {
  89. compatible = "samsung,exynos5250-hsi2c";
  90. reg = <0x12e00000 0x1000>;
  91. interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. clock-frequency = <100000>;
  95. clocks = <&clock CLK_USI4>;
  96. clock-names = "hsi2c";
  97. pmic@66 {
  98. /* compatible = "samsung,s2mps11-pmic"; */
  99. reg = <0x66>;
  100. };
  101. };
  102. - |
  103. #include <dt-bindings/clock/exynos850.h>
  104. #include <dt-bindings/interrupt-controller/arm-gic.h>
  105. hsi2c_2: i2c@138c0000 {
  106. compatible = "samsung,exynosautov9-hsi2c";
  107. reg = <0x138c0000 0xc0>;
  108. interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
  112. <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
  113. clock-names = "hsi2c", "hsi2c_pclk";
  114. pmic@66 {
  115. /* compatible = "samsung,s2mps11-pmic"; */
  116. reg = <0x66>;
  117. };
  118. };