fsl,ls-msi.yaml 1.8 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-msi.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Freescale Layerscape SCFG PCIe MSI controller
  7. description: |
  8. This interrupt controller hardware is a second level interrupt controller that
  9. is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based
  10. platforms. If interrupt-parent is not provided, the default parent interrupt
  11. controller will be used.
  12. Each PCIe node needs to have property msi-parent that points to
  13. MSI controller node
  14. maintainers:
  15. - Frank Li <Frank.Li@nxp.com>
  16. properties:
  17. compatible:
  18. enum:
  19. - fsl,ls1012a-msi
  20. - fsl,ls1021a-msi
  21. - fsl,ls1043a-msi
  22. - fsl,ls1043a-v1.1-msi
  23. - fsl,ls1046a-msi
  24. reg:
  25. maxItems: 1
  26. '#msi-cells':
  27. const: 1
  28. interrupts:
  29. items:
  30. - description: Shared MSI interrupt group 0
  31. - description: Shared MSI interrupt group 1
  32. - description: Shared MSI interrupt group 2
  33. - description: Shared MSI interrupt group 3
  34. minItems: 1
  35. required:
  36. - compatible
  37. - reg
  38. - msi-controller
  39. - interrupts
  40. allOf:
  41. - $ref: msi-controller.yaml
  42. - if:
  43. properties:
  44. compatible:
  45. contains:
  46. enum:
  47. - fsl,ls1046a-msi
  48. then:
  49. properties:
  50. interrupts:
  51. minItems: 4
  52. else:
  53. properties:
  54. interrupts:
  55. maxItems: 1
  56. unevaluatedProperties: false
  57. examples:
  58. - |
  59. #include <dt-bindings/interrupt-controller/arm-gic.h>
  60. interrupt-controller@1571000 {
  61. compatible = "fsl,ls1043a-msi";
  62. reg = <0x1571000 0x8>;
  63. msi-controller;
  64. #msi-cells = <1>;
  65. interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
  66. };