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- # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
- %YAML 1.2
- ---
- $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#
- $schema: http://devicetree.org/meta-schemas/core.yaml#
- title: Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
- maintainers:
- - Rahul Tanwar <rtanwar@maxlinear.com>
- description: |
- Intel's Advanced Programmable Interrupt Controller (APIC) is a
- family of interrupt controllers. The APIC is a split
- architecture design, with a local component (LAPIC) integrated
- into the processor itself and an external I/O APIC. Local APIC
- (lapic) receives interrupts from the processor's interrupt pins,
- from internal sources and from an external I/O APIC (ioapic).
- And it sends these to the processor core for handling.
- See [1] Chapter 8 for more details.
- Many of the Intel's generic devices like hpet, ioapic, lapic have
- the ce4100 name in their compatible property names because they
- first appeared in CE4100 SoC.
- This schema defines bindings for I/O APIC interrupt controller.
- [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
- properties:
- compatible:
- const: intel,ce4100-ioapic
- reg:
- maxItems: 1
- interrupt-controller: true
- '#interrupt-cells':
- const: 2
- interrupts:
- maxItems: 1
- required:
- - compatible
- - reg
- - interrupt-controller
- - '#interrupt-cells'
- additionalProperties: false
- examples:
- - |
- ioapic1: interrupt-controller@fec00000 {
- compatible = "intel,ce4100-ioapic";
- reg = <0xfec00000 0x1000>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
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