mti,cpu-interrupt-controller.yaml 1.1 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: MIPS CPU Interrupt Controller
  7. description: >
  8. On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
  9. IRQs from a devicetree file and create a irq_domain for IRQ controller.
  10. With the irq_domain in place we can describe how the 8 IRQs are wired to the
  11. platforms internal interrupt controller cascade.
  12. maintainers:
  13. - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
  14. properties:
  15. compatible:
  16. const: mti,cpu-interrupt-controller
  17. '#interrupt-cells':
  18. const: 1
  19. '#address-cells':
  20. const: 0
  21. interrupt-controller: true
  22. additionalProperties: false
  23. required:
  24. - compatible
  25. - '#interrupt-cells'
  26. - '#address-cells'
  27. - interrupt-controller
  28. examples:
  29. - |
  30. interrupt-controller {
  31. compatible = "mti,cpu-interrupt-controller";
  32. #address-cells = <0>;
  33. #interrupt-cells = <1>;
  34. interrupt-controller;
  35. };