renesas,irqc.yaml 2.8 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: R-Mobile/R-Car/RZ/G interrupt controller
  7. maintainers:
  8. - Geert Uytterhoeven <geert+renesas@glider.be>
  9. properties:
  10. compatible:
  11. items:
  12. - enum:
  13. - renesas,irqc-r8a73a4 # R-Mobile APE6
  14. - renesas,irqc-r8a7742 # RZ/G1H
  15. - renesas,irqc-r8a7743 # RZ/G1M
  16. - renesas,irqc-r8a7744 # RZ/G1N
  17. - renesas,irqc-r8a7745 # RZ/G1E
  18. - renesas,irqc-r8a77470 # RZ/G1C
  19. - renesas,irqc-r8a7790 # R-Car H2
  20. - renesas,irqc-r8a7791 # R-Car M2-W
  21. - renesas,irqc-r8a7792 # R-Car V2H
  22. - renesas,irqc-r8a7793 # R-Car M2-N
  23. - renesas,irqc-r8a7794 # R-Car E2
  24. - renesas,intc-ex-r8a774a1 # RZ/G2M
  25. - renesas,intc-ex-r8a774b1 # RZ/G2N
  26. - renesas,intc-ex-r8a774c0 # RZ/G2E
  27. - renesas,intc-ex-r8a774e1 # RZ/G2H
  28. - renesas,intc-ex-r8a7795 # R-Car H3
  29. - renesas,intc-ex-r8a7796 # R-Car M3-W
  30. - renesas,intc-ex-r8a77961 # R-Car M3-W+
  31. - renesas,intc-ex-r8a77965 # R-Car M3-N
  32. - renesas,intc-ex-r8a77970 # R-Car V3M
  33. - renesas,intc-ex-r8a77980 # R-Car V3H
  34. - renesas,intc-ex-r8a77990 # R-Car E3
  35. - renesas,intc-ex-r8a77995 # R-Car D3
  36. - renesas,intc-ex-r8a779a0 # R-Car V3U
  37. - renesas,intc-ex-r8a779f0 # R-Car S4-8
  38. - renesas,intc-ex-r8a779g0 # R-Car V4H
  39. - renesas,intc-ex-r8a779h0 # R-Car V4M
  40. - const: renesas,irqc
  41. '#interrupt-cells':
  42. # an interrupt index and flags, as defined in interrupts.txt in
  43. # this directory
  44. const: 2
  45. interrupt-controller: true
  46. reg:
  47. maxItems: 1
  48. interrupts:
  49. minItems: 1
  50. maxItems: 32
  51. clocks:
  52. maxItems: 1
  53. power-domains:
  54. maxItems: 1
  55. resets:
  56. maxItems: 1
  57. required:
  58. - compatible
  59. - '#interrupt-cells'
  60. - interrupt-controller
  61. - reg
  62. - interrupts
  63. - clocks
  64. additionalProperties: false
  65. examples:
  66. - |
  67. #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
  68. #include <dt-bindings/interrupt-controller/arm-gic.h>
  69. #include <dt-bindings/interrupt-controller/irq.h>
  70. irqc0: interrupt-controller@e61c0000 {
  71. compatible = "renesas,irqc-r8a7790", "renesas,irqc";
  72. #interrupt-cells = <2>;
  73. interrupt-controller;
  74. reg = <0xe61c0000 0x200>;
  75. interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  76. <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  77. <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  78. <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
  79. clocks = <&cpg CPG_MOD 407>;
  80. };