sunplus,sp7021-intc.yaml 1.6 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. # Copyright (C) Sunplus Co., Ltd. 2021
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: Sunplus SP7021 SoC Interrupt Controller
  8. maintainers:
  9. - Qin Jian <qinjian@cqplus1.com>
  10. properties:
  11. compatible:
  12. items:
  13. - const: sunplus,sp7021-intc
  14. reg:
  15. maxItems: 2
  16. description:
  17. Specifies base physical address(s) and size of the controller regs.
  18. The 1st region include type/polarity/priority/mask regs.
  19. The 2nd region include clear/masked_ext0/masked_ext1/group regs.
  20. interrupt-controller: true
  21. "#interrupt-cells":
  22. const: 2
  23. description:
  24. The first cell is the IRQ number, the second cell is the trigger
  25. type as defined in interrupt.txt in this directory.
  26. interrupts:
  27. maxItems: 2
  28. description:
  29. EXT_INT0 & EXT_INT1, 2 interrupts references to primary interrupt
  30. controller.
  31. required:
  32. - compatible
  33. - reg
  34. - interrupt-controller
  35. - "#interrupt-cells"
  36. - interrupts
  37. additionalProperties: false
  38. examples:
  39. - |
  40. #include <dt-bindings/interrupt-controller/arm-gic.h>
  41. intc: interrupt-controller@9c000780 {
  42. compatible = "sunplus,sp7021-intc";
  43. reg = <0x9c000780 0x80>, <0x9c000a80 0x80>;
  44. interrupt-controller;
  45. #interrupt-cells = <2>;
  46. interrupt-parent = <&gic>;
  47. interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, /* EXT_INT0 */
  48. <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; /* EXT_INT1 */
  49. };
  50. ...